RDMA/hns: Fix error code of CMD
[ Upstream commit667d6164b8
] The error code is fixed to EIO when CMD fails to excute. This patch converts the error status reported by firmware to linux errno. Fixes:a04ff739f2
("RDMA/hns: Add command queue support for hip08 RoCE driver") Link: https://lore.kernel.org/r/20221126102911.2921820-6-xuhaoyue1@hisilicon.com Signed-off-by: Chengchang Tang <tangchengchang@huawei.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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b9634f99b6
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@ -1257,6 +1257,30 @@ static void update_cmdq_status(struct hns_roce_dev *hr_dev)
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hr_dev->cmd.state = HNS_ROCE_CMDQ_STATE_FATAL_ERR;
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hr_dev->cmd.state = HNS_ROCE_CMDQ_STATE_FATAL_ERR;
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}
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}
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static int hns_roce_cmd_err_convert_errno(u16 desc_ret)
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{
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struct hns_roce_cmd_errcode errcode_table[] = {
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{CMD_EXEC_SUCCESS, 0},
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{CMD_NO_AUTH, -EPERM},
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{CMD_NOT_EXIST, -EOPNOTSUPP},
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{CMD_CRQ_FULL, -EXFULL},
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{CMD_NEXT_ERR, -ENOSR},
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{CMD_NOT_EXEC, -ENOTBLK},
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{CMD_PARA_ERR, -EINVAL},
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{CMD_RESULT_ERR, -ERANGE},
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{CMD_TIMEOUT, -ETIME},
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{CMD_HILINK_ERR, -ENOLINK},
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{CMD_INFO_ILLEGAL, -ENXIO},
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{CMD_INVALID, -EBADR},
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};
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u16 i;
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for (i = 0; i < ARRAY_SIZE(errcode_table); i++)
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if (desc_ret == errcode_table[i].return_status)
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return errcode_table[i].errno;
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return -EIO;
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}
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static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
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static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
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struct hns_roce_cmq_desc *desc, int num)
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struct hns_roce_cmq_desc *desc, int num)
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{
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{
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@ -1301,7 +1325,7 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
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dev_err_ratelimited(hr_dev->dev,
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dev_err_ratelimited(hr_dev->dev,
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"Cmdq IO error, opcode = %x, return = %x\n",
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"Cmdq IO error, opcode = %x, return = %x\n",
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desc->opcode, desc_ret);
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desc->opcode, desc_ret);
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ret = -EIO;
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ret = hns_roce_cmd_err_convert_errno(desc_ret);
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}
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}
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} else {
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} else {
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/* FW/HW reset or incorrect number of desc */
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/* FW/HW reset or incorrect number of desc */
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@ -276,6 +276,11 @@ enum hns_roce_cmd_return_status {
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CMD_OTHER_ERR = 0xff
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CMD_OTHER_ERR = 0xff
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};
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};
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struct hns_roce_cmd_errcode {
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enum hns_roce_cmd_return_status return_status;
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int errno;
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};
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enum hns_roce_sgid_type {
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enum hns_roce_sgid_type {
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GID_TYPE_FLAG_ROCE_V1 = 0,
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GID_TYPE_FLAG_ROCE_V1 = 0,
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GID_TYPE_FLAG_ROCE_V2_IPV4,
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GID_TYPE_FLAG_ROCE_V2_IPV4,
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