drm/nv50-/disp: use the number of dac, sor, pior rather than hardcoded values
The values are already stored on chipset specific basis in the ctor. Make the most of them and simplify the code further by using a temporary variable to avoid code duplication. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -628,7 +628,7 @@ nv50_disp_base_init(struct nouveau_object *object)
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}
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/* ... PIOR caps */
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for (i = 0; i < 3; i++) {
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for (i = 0; i < priv->pior.nr; i++) {
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tmp = nv_rd32(priv, 0x61e000 + (i * 0x800));
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nv_wr32(priv, 0x6101f0 + (i * 0x04), tmp);
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}
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@ -834,10 +834,11 @@ exec_script(struct nv50_disp_priv *priv, int head, int id)
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u8 ver, hdr, cnt, len;
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u16 data;
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u32 ctrl = 0x00000000;
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u32 reg;
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int i;
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/* DAC */
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for (i = 0; !(ctrl & (1 << head)) && i < 3; i++)
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for (i = 0; !(ctrl & (1 << head)) && i < priv->dac.nr; i++)
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ctrl = nv_rd32(priv, 0x610b5c + (i * 8));
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/* SOR */
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@ -845,19 +846,18 @@ exec_script(struct nv50_disp_priv *priv, int head, int id)
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if (nv_device(priv)->chipset < 0x90 ||
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nv_device(priv)->chipset == 0x92 ||
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nv_device(priv)->chipset == 0xa0) {
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for (i = 0; !(ctrl & (1 << head)) && i < 2; i++)
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ctrl = nv_rd32(priv, 0x610b74 + (i * 8));
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i += 4;
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reg = 0x610b74;
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} else {
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for (i = 0; !(ctrl & (1 << head)) && i < 4; i++)
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ctrl = nv_rd32(priv, 0x610798 + (i * 8));
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i += 4;
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reg = 0x610798;
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}
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for (i = 0; !(ctrl & (1 << head)) && i < priv->sor.nr; i++)
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ctrl = nv_rd32(priv, reg + (i * 8));
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i += 4;
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}
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/* PIOR */
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if (!(ctrl & (1 << head))) {
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for (i = 0; !(ctrl & (1 << head)) && i < 3; i++)
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for (i = 0; !(ctrl & (1 << head)) && i < priv->pior.nr; i++)
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ctrl = nv_rd32(priv, 0x610b84 + (i * 8));
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i += 8;
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}
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@ -893,10 +893,11 @@ exec_clkcmp(struct nv50_disp_priv *priv, int head, int id, u32 pclk,
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u8 ver, hdr, cnt, len;
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u32 ctrl = 0x00000000;
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u32 data, conf = ~0;
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u32 reg;
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int i;
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/* DAC */
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for (i = 0; !(ctrl & (1 << head)) && i < 3; i++)
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for (i = 0; !(ctrl & (1 << head)) && i < priv->dac.nr; i++)
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ctrl = nv_rd32(priv, 0x610b58 + (i * 8));
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/* SOR */
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@ -904,19 +905,18 @@ exec_clkcmp(struct nv50_disp_priv *priv, int head, int id, u32 pclk,
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if (nv_device(priv)->chipset < 0x90 ||
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nv_device(priv)->chipset == 0x92 ||
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nv_device(priv)->chipset == 0xa0) {
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for (i = 0; !(ctrl & (1 << head)) && i < 2; i++)
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ctrl = nv_rd32(priv, 0x610b70 + (i * 8));
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i += 4;
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reg = 0x610b70;
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} else {
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for (i = 0; !(ctrl & (1 << head)) && i < 4; i++)
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ctrl = nv_rd32(priv, 0x610794 + (i * 8));
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i += 4;
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reg = 0x610794;
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}
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for (i = 0; !(ctrl & (1 << head)) && i < priv->sor.nr; i++)
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ctrl = nv_rd32(priv, reg + (i * 8));
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i += 4;
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}
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/* PIOR */
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if (!(ctrl & (1 << head))) {
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for (i = 0; !(ctrl & (1 << head)) && i < 3; i++)
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for (i = 0; !(ctrl & (1 << head)) && i < priv->pior.nr; i++)
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ctrl = nv_rd32(priv, 0x610b80 + (i * 8));
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i += 8;
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}
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