regulator: tps65218: Enable suspend configuration
TPS65218 has a pre-defined power-up / power-down sequence which in a typical application does not need to be changed. However, it is possible to define custom sequences under I2C control. The power-up sequence is defined by strobes and delay times. Each output rail is assigned to a strobe to determine the order in which the rails are enabled. Every regulator has sequence registers and every regulator has a default strobe value and gets disabled when a particular power down sequence occurs. To keep a regulator on during suspend we write value 0 to strobe so that the regulator is out of all sequencers and is not impacted by any power down sequence. Hence saving the default strobe value during probe so that when we want to regulator to be enabled during suspend we write 0 to strobe and when we want it to get disabled during suspend we write the default saved strobe value. This allows platform data to specify which power rails should be on or off during RTC only suspend. This is necessary to keep DDR state while in RTC only suspend. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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3de5609959
Коммит
b9a0d35941
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@ -31,7 +31,7 @@ enum tps65218_regulators { DCDC1, DCDC2, DCDC3, DCDC4,
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DCDC5, DCDC6, LDO1, LS3 };
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#define TPS65218_REGULATOR(_name, _id, _type, _ops, _n, _vr, _vm, _er, _em, \
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_cr, _cm, _lr, _nlr, _delay, _fuv) \
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_cr, _cm, _lr, _nlr, _delay, _fuv, _sr, _sm) \
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{ \
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.name = _name, \
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.id = _id, \
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@ -49,7 +49,9 @@ enum tps65218_regulators { DCDC1, DCDC2, DCDC3, DCDC4,
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.linear_ranges = _lr, \
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.n_linear_ranges = _nlr, \
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.ramp_delay = _delay, \
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.fixed_uV = _fuv \
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.fixed_uV = _fuv, \
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.bypass_reg = _sr, \
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.bypass_mask = _sm, \
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} \
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#define TPS65218_INFO(_id, _nm, _min, _max) \
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@ -157,6 +159,36 @@ static int tps65218_pmic_disable(struct regulator_dev *dev)
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dev->desc->enable_mask, TPS65218_PROTECT_L1);
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}
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static int tps65218_pmic_set_suspend_enable(struct regulator_dev *dev)
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{
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struct tps65218 *tps = rdev_get_drvdata(dev);
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unsigned int rid = rdev_get_id(dev);
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if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1)
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return -EINVAL;
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return tps65218_clear_bits(tps, dev->desc->bypass_reg,
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dev->desc->bypass_mask,
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TPS65218_PROTECT_L1);
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}
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static int tps65218_pmic_set_suspend_disable(struct regulator_dev *dev)
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{
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struct tps65218 *tps = rdev_get_drvdata(dev);
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unsigned int rid = rdev_get_id(dev);
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if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1)
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return -EINVAL;
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if (!tps->info[rid]->strobe)
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return -EINVAL;
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return tps65218_set_bits(tps, dev->desc->bypass_reg,
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dev->desc->bypass_mask,
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tps->info[rid]->strobe,
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TPS65218_PROTECT_L1);
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}
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/* Operations permitted on DCDC1, DCDC2 */
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static struct regulator_ops tps65218_dcdc12_ops = {
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.is_enabled = regulator_is_enabled_regmap,
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@ -167,6 +199,8 @@ static struct regulator_ops tps65218_dcdc12_ops = {
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.list_voltage = regulator_list_voltage_linear_range,
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.map_voltage = regulator_map_voltage_linear_range,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.set_suspend_enable = tps65218_pmic_set_suspend_enable,
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.set_suspend_disable = tps65218_pmic_set_suspend_disable,
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};
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/* Operations permitted on DCDC3, DCDC4 and LDO1 */
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@ -178,6 +212,8 @@ static struct regulator_ops tps65218_ldo1_dcdc34_ops = {
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.set_voltage_sel = tps65218_pmic_set_voltage_sel,
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.list_voltage = regulator_list_voltage_linear_range,
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.map_voltage = regulator_map_voltage_linear_range,
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.set_suspend_enable = tps65218_pmic_set_suspend_enable,
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.set_suspend_disable = tps65218_pmic_set_suspend_disable,
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};
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static const int ls3_currents[] = { 100, 200, 500, 1000 };
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@ -247,6 +283,8 @@ static struct regulator_ops tps65218_dcdc56_pmic_ops = {
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.is_enabled = regulator_is_enabled_regmap,
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.enable = tps65218_pmic_enable,
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.disable = tps65218_pmic_disable,
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.set_suspend_enable = tps65218_pmic_set_suspend_enable,
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.set_suspend_disable = tps65218_pmic_set_suspend_disable,
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};
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static const struct regulator_desc regulators[] = {
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@ -254,42 +292,47 @@ static const struct regulator_desc regulators[] = {
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tps65218_dcdc12_ops, 64, TPS65218_REG_CONTROL_DCDC1,
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TPS65218_CONTROL_DCDC1_MASK, TPS65218_REG_ENABLE1,
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TPS65218_ENABLE1_DC1_EN, 0, 0, dcdc1_dcdc2_ranges,
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2, 4000, 0),
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2, 4000, 0, TPS65218_REG_SEQ3,
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TPS65218_SEQ3_DC1_SEQ_MASK),
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TPS65218_REGULATOR("DCDC2", TPS65218_DCDC_2, REGULATOR_VOLTAGE,
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tps65218_dcdc12_ops, 64, TPS65218_REG_CONTROL_DCDC2,
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TPS65218_CONTROL_DCDC2_MASK, TPS65218_REG_ENABLE1,
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TPS65218_ENABLE1_DC2_EN, 0, 0, dcdc1_dcdc2_ranges,
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2, 4000, 0),
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2, 4000, 0, TPS65218_REG_SEQ3,
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TPS65218_SEQ3_DC2_SEQ_MASK),
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TPS65218_REGULATOR("DCDC3", TPS65218_DCDC_3, REGULATOR_VOLTAGE,
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tps65218_ldo1_dcdc34_ops, 64,
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TPS65218_REG_CONTROL_DCDC3,
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TPS65218_CONTROL_DCDC3_MASK, TPS65218_REG_ENABLE1,
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TPS65218_ENABLE1_DC3_EN, 0, 0, ldo1_dcdc3_ranges, 2,
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0, 0),
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0, 0, TPS65218_REG_SEQ4, TPS65218_SEQ4_DC3_SEQ_MASK),
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TPS65218_REGULATOR("DCDC4", TPS65218_DCDC_4, REGULATOR_VOLTAGE,
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tps65218_ldo1_dcdc34_ops, 53,
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TPS65218_REG_CONTROL_DCDC4,
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TPS65218_CONTROL_DCDC4_MASK, TPS65218_REG_ENABLE1,
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TPS65218_ENABLE1_DC4_EN, 0, 0, dcdc4_ranges, 2,
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0, 0),
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0, 0, TPS65218_REG_SEQ4, TPS65218_SEQ4_DC4_SEQ_MASK),
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TPS65218_REGULATOR("DCDC5", TPS65218_DCDC_5, REGULATOR_VOLTAGE,
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tps65218_dcdc56_pmic_ops, 1, -1, -1,
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TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC5_EN, 0, 0,
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NULL, 0, 0, 1000000),
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NULL, 0, 0, 1000000, TPS65218_REG_SEQ5,
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TPS65218_SEQ5_DC5_SEQ_MASK),
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TPS65218_REGULATOR("DCDC6", TPS65218_DCDC_6, REGULATOR_VOLTAGE,
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tps65218_dcdc56_pmic_ops, 1, -1, -1,
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TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC6_EN, 0, 0,
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NULL, 0, 0, 1800000),
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NULL, 0, 0, 1800000, TPS65218_REG_SEQ5,
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TPS65218_SEQ5_DC6_SEQ_MASK),
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TPS65218_REGULATOR("LDO1", TPS65218_LDO_1, REGULATOR_VOLTAGE,
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tps65218_ldo1_dcdc34_ops, 64,
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TPS65218_REG_CONTROL_LDO1,
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TPS65218_CONTROL_LDO1_MASK, TPS65218_REG_ENABLE2,
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TPS65218_ENABLE2_LDO1_EN, 0, 0, ldo1_dcdc3_ranges,
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2, 0, 0),
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2, 0, 0, TPS65218_REG_SEQ6,
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TPS65218_SEQ6_LDO1_SEQ_MASK),
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TPS65218_REGULATOR("LS3", TPS65218_LS_3, REGULATOR_CURRENT,
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tps65218_ls3_ops, 0, 0, 0, TPS65218_REG_ENABLE2,
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TPS65218_ENABLE2_LS3_EN, TPS65218_REG_CONFIG2,
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TPS65218_CONFIG2_LS3ILIM_MASK, NULL, 0, 0, 0),
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TPS65218_CONFIG2_LS3ILIM_MASK, NULL, 0, 0, 0, 0, 0),
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};
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static int tps65218_regulator_probe(struct platform_device *pdev)
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@ -300,7 +343,8 @@ static int tps65218_regulator_probe(struct platform_device *pdev)
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struct regulator_dev *rdev;
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const struct of_device_id *match;
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struct regulator_config config = { };
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int id;
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int id, ret;
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unsigned int val;
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match = of_match_device(tps65218_of_match, &pdev->dev);
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if (!match)
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@ -327,6 +371,12 @@ static int tps65218_regulator_probe(struct platform_device *pdev)
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return PTR_ERR(rdev);
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}
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ret = tps65218_reg_read(tps, regulators[id].bypass_reg, &val);
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if (ret)
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return ret;
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tps->info[id]->strobe = val & regulators[id].bypass_mask;
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return 0;
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}
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@ -246,6 +246,7 @@ enum tps65218_irqs {
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* @name: Voltage regulator name
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* @min_uV: minimum micro volts
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* @max_uV: minimum micro volts
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* @strobe: sequencing strobe value for the regulator
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*
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* This data is used to check the regualtor voltage limits while setting.
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*/
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@ -254,6 +255,7 @@ struct tps_info {
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const char *name;
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int min_uV;
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int max_uV;
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int strobe;
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};
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/**
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