* Core changes:
- Make i3c_bus_set_mode() static * Driver changes: - Add a per-SoC data_hold_delay property to the Cadence driver - Fix formatting issues in the 'CADENCE I3C MASTER IP' MAINTAINERS entry - Use devm_platform_ioremap_resource() where appropriate - Adjust DesignWare reattach logic -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEKmCqpbOU668PNA69Ze02AX4ItwAFAl4un/cACgkQZe02AX4I twAdDRAApE2zF/mFpKWsEeRMslBUIu5Ke1sPC/gWqQ0NcisW1jVvbFQxoXBLJ3f2 z41cqEtwKVGXGZGWRvMeHZhlllZ+c9gO+fnCN4CLfjr03ECZ/JUpBmgpjjfFKKu9 Y3DzXBWX73KFZbZWUDE+JsufhdJCIjr7ozk5PXniZ9nAfrFxG50pZYHtZeF3KoCl GLSA+emCRfQA08Kks7JGB1zPsC7gNluK2DkdU/cIRIBE8LL2VZTHpKBUPcAZOryA ju/0U3DGyMxrnjPoa134/EaUBpXhAuMLOxgS9nf+Jd8I1AMm4BeG5Bw2g30Bp50D BTq3FNZX2Ihb+tEeZQaVFRazTHyMXwVCg9v26NXI89BIpDPFI7dsFd2C3lO/DtCM kEUpk0oplxTYV6ryOgDaBpE9CsS6mxayaxVnKvB7dXobU6/F4Qu23n1BrjlxYrmK wuIwcGMLzvlbBjm6EVPvFlJXGmDB5ndwMVVdqEEyFVzAB5xonN4gKXsQb7vcOQTn fh7/zvN/isr6g9BwyDl5qmq94ibTBu7ruhgkl1xiSsTHYHp2UipeiOY6ixveJt4U 9WPBZeDVpcz+k+5Y4BPSRnXAIA3N/GM1BwS9Ku1oE1FeoavG8ziLHkcTL7MHeGKp RUfvxA4k8PioHERX1aZIg88MYqRBp4PTVh/g4HPw4gTfBOvGnX8= =LbKo -----END PGP SIGNATURE----- Merge tag 'i3c/for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux Pull i3c updates from Boris Brezillon: "Core changes: - Make i3c_bus_set_mode() static Driver changes: - Add a per-SoC data_hold_delay property to the Cadence driver - Fix formatting issues in the 'CADENCE I3C MASTER IP' MAINTAINERS entry - Use devm_platform_ioremap_resource() where appropriate - Adjust DesignWare reattach logic" * tag 'i3c/for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux: i3c: master: dw: reattach device on first available location of address table i3c: master: cdns: convert to devm_platform_ioremap_resource i3c: master: dw: convert to devm_platform_ioremap_resource MAINTAINERS: fix style in CADENCE I3C MASTER IP entry i3c: master: make i3c_bus_set_mode static i3c: master: cdns: add data hold delay support
This commit is contained in:
Коммит
b9b627a449
|
@ -7851,10 +7851,10 @@ F: Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt
|
|||
F: drivers/i3c/master/dw*
|
||||
|
||||
I3C DRIVER FOR CADENCE I3C MASTER IP
|
||||
M: Przemysław Gaj <pgaj@cadence.com>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt
|
||||
F: drivers/i3c/master/i3c-master-cdns.c
|
||||
M: Przemysław Gaj <pgaj@cadence.com>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt
|
||||
F: drivers/i3c/master/i3c-master-cdns.c
|
||||
|
||||
IA64 (Itanium) PLATFORM
|
||||
M: Tony Luck <tony.luck@intel.com>
|
||||
|
|
|
@ -527,8 +527,8 @@ static const struct device_type i3c_masterdev_type = {
|
|||
.groups = i3c_masterdev_groups,
|
||||
};
|
||||
|
||||
int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
|
||||
unsigned long max_i2c_scl_rate)
|
||||
static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
|
||||
unsigned long max_i2c_scl_rate)
|
||||
{
|
||||
struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
|
||||
|
||||
|
|
|
@ -899,6 +899,22 @@ static int dw_i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
|
|||
struct dw_i3c_i2c_dev_data *data = i3c_dev_get_master_data(dev);
|
||||
struct i3c_master_controller *m = i3c_dev_get_master(dev);
|
||||
struct dw_i3c_master *master = to_dw_i3c_master(m);
|
||||
int pos;
|
||||
|
||||
pos = dw_i3c_master_get_free_pos(master);
|
||||
|
||||
if (data->index > pos && pos > 0) {
|
||||
writel(0,
|
||||
master->regs +
|
||||
DEV_ADDR_TABLE_LOC(master->datstartaddr, data->index));
|
||||
|
||||
master->addrs[data->index] = 0;
|
||||
master->free_pos |= BIT(data->index);
|
||||
|
||||
data->index = pos;
|
||||
master->addrs[pos] = dev->info.dyn_addr;
|
||||
master->free_pos &= ~BIT(pos);
|
||||
}
|
||||
|
||||
writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(dev->info.dyn_addr),
|
||||
master->regs +
|
||||
|
@ -1100,15 +1116,13 @@ static const struct i3c_master_controller_ops dw_mipi_i3c_ops = {
|
|||
static int dw_i3c_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct dw_i3c_master *master;
|
||||
struct resource *res;
|
||||
int ret, irq;
|
||||
|
||||
master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
|
||||
if (!master)
|
||||
return -ENOMEM;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
master->regs = devm_ioremap_resource(&pdev->dev, res);
|
||||
master->regs = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(master->regs))
|
||||
return PTR_ERR(master->regs);
|
||||
|
||||
|
|
|
@ -22,6 +22,7 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/workqueue.h>
|
||||
#include <linux/of_device.h>
|
||||
|
||||
#define DEV_ID 0x0
|
||||
#define DEV_ID_I3C_MASTER 0x5034
|
||||
|
@ -60,6 +61,7 @@
|
|||
#define CTRL_HALT_EN BIT(30)
|
||||
#define CTRL_MCS BIT(29)
|
||||
#define CTRL_MCS_EN BIT(28)
|
||||
#define CTRL_THD_DELAY(x) (((x) << 24) & GENMASK(25, 24))
|
||||
#define CTRL_HJ_DISEC BIT(8)
|
||||
#define CTRL_MST_ACK BIT(7)
|
||||
#define CTRL_HJ_ACK BIT(6)
|
||||
|
@ -70,6 +72,7 @@
|
|||
#define CTRL_MIXED_FAST_BUS_MODE 2
|
||||
#define CTRL_MIXED_SLOW_BUS_MODE 3
|
||||
#define CTRL_BUS_MODE_MASK GENMASK(1, 0)
|
||||
#define THD_DELAY_MAX 3
|
||||
|
||||
#define PRESCL_CTRL0 0x14
|
||||
#define PRESCL_CTRL0_I2C(x) ((x) << 16)
|
||||
|
@ -388,6 +391,10 @@ struct cdns_i3c_xfer {
|
|||
struct cdns_i3c_cmd cmds[0];
|
||||
};
|
||||
|
||||
struct cdns_i3c_data {
|
||||
u8 thd_delay_ns;
|
||||
};
|
||||
|
||||
struct cdns_i3c_master {
|
||||
struct work_struct hj_work;
|
||||
struct i3c_master_controller base;
|
||||
|
@ -408,6 +415,7 @@ struct cdns_i3c_master {
|
|||
struct clk *pclk;
|
||||
struct cdns_i3c_master_caps caps;
|
||||
unsigned long i3c_scl_lim;
|
||||
const struct cdns_i3c_data *devdata;
|
||||
};
|
||||
|
||||
static inline struct cdns_i3c_master *
|
||||
|
@ -1181,6 +1189,20 @@ static int cdns_i3c_master_do_daa(struct i3c_master_controller *m)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static u8 cdns_i3c_master_calculate_thd_delay(struct cdns_i3c_master *master)
|
||||
{
|
||||
unsigned long sysclk_rate = clk_get_rate(master->sysclk);
|
||||
u8 thd_delay = DIV_ROUND_UP(master->devdata->thd_delay_ns,
|
||||
(NSEC_PER_SEC / sysclk_rate));
|
||||
|
||||
/* Every value greater than 3 is not valid. */
|
||||
if (thd_delay > THD_DELAY_MAX)
|
||||
thd_delay = THD_DELAY_MAX;
|
||||
|
||||
/* CTLR_THD_DEL value is encoded. */
|
||||
return (THD_DELAY_MAX - thd_delay);
|
||||
}
|
||||
|
||||
static int cdns_i3c_master_bus_init(struct i3c_master_controller *m)
|
||||
{
|
||||
struct cdns_i3c_master *master = to_cdns_i3c_master(m);
|
||||
|
@ -1264,6 +1286,15 @@ static int cdns_i3c_master_bus_init(struct i3c_master_controller *m)
|
|||
* We will issue ENTDAA afterwards from the threaded IRQ handler.
|
||||
*/
|
||||
ctrl |= CTRL_HJ_ACK | CTRL_HJ_DISEC | CTRL_HALT_EN | CTRL_MCS_EN;
|
||||
|
||||
/*
|
||||
* Configure data hold delay based on device-specific data.
|
||||
*
|
||||
* MIPI I3C Specification 1.0 defines non-zero minimal tHD_PP timing on
|
||||
* master output. This setting allows to meet this timing on master's
|
||||
* SoC outputs, regardless of PCB balancing.
|
||||
*/
|
||||
ctrl |= CTRL_THD_DELAY(cdns_i3c_master_calculate_thd_delay(master));
|
||||
writel(ctrl, master->regs + CTRL);
|
||||
|
||||
cdns_i3c_master_enable(master);
|
||||
|
@ -1521,10 +1552,18 @@ static void cdns_i3c_master_hj(struct work_struct *work)
|
|||
i3c_master_do_daa(&master->base);
|
||||
}
|
||||
|
||||
static struct cdns_i3c_data cdns_i3c_devdata = {
|
||||
.thd_delay_ns = 10,
|
||||
};
|
||||
|
||||
static const struct of_device_id cdns_i3c_master_of_ids[] = {
|
||||
{ .compatible = "cdns,i3c-master", .data = &cdns_i3c_devdata },
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
static int cdns_i3c_master_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct cdns_i3c_master *master;
|
||||
struct resource *res;
|
||||
int ret, irq;
|
||||
u32 val;
|
||||
|
||||
|
@ -1532,8 +1571,11 @@ static int cdns_i3c_master_probe(struct platform_device *pdev)
|
|||
if (!master)
|
||||
return -ENOMEM;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
master->regs = devm_ioremap_resource(&pdev->dev, res);
|
||||
master->devdata = of_device_get_match_data(&pdev->dev);
|
||||
if (!master->devdata)
|
||||
return -EINVAL;
|
||||
|
||||
master->regs = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(master->regs))
|
||||
return PTR_ERR(master->regs);
|
||||
|
||||
|
@ -1631,11 +1673,6 @@ static int cdns_i3c_master_remove(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id cdns_i3c_master_of_ids[] = {
|
||||
{ .compatible = "cdns,i3c-master" },
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
static struct platform_driver cdns_i3c_master = {
|
||||
.probe = cdns_i3c_master_probe,
|
||||
.remove = cdns_i3c_master_remove,
|
||||
|
|
Загрузка…
Ссылка в новой задаче