ARM: dts: sun6i: Fix RTC node
The RTC node doesn't match what is described in the binding for historical reasons. Let's add the proper description. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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@ -223,7 +223,7 @@
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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clock-output-names = "osc32k";
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clock-output-names = "ext_osc32k";
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};
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/*
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@ -588,7 +588,7 @@
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ccu: clock@1c20000 {
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compatible = "allwinner,sun6i-a31-ccu";
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reg = <0x01c20000 0x400>;
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clocks = <&osc24M>, <&osc32k>;
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clocks = <&osc24M>, <&rtc 0>;
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clock-names = "hosc", "losc";
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#clock-cells = <1>;
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#reset-cells = <1>;
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@ -601,7 +601,7 @@
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<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&osc32k>;
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clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&rtc 0>;
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clock-names = "apb", "hosc", "losc";
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gpio-controller;
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interrupt-controller;
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@ -1287,10 +1287,13 @@
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};
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rtc: rtc@1f00000 {
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#clock-cells = <1>;
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compatible = "allwinner,sun6i-a31-rtc";
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reg = <0x01f00000 0x54>;
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&osc32k>;
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clock-output-names = "osc32k";
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};
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nmi_intc: interrupt-controller@1f00c00 {
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@ -1308,7 +1311,7 @@
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ar100: ar100_clk {
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compatible = "allwinner,sun6i-a31-ar100-clk";
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#clock-cells = <0>;
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clocks = <&osc32k>, <&osc24M>,
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clocks = <&rtc 0>, <&osc24M>,
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<&ccu CLK_PLL_PERIPH>,
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<&ccu CLK_PLL_PERIPH>;
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clock-output-names = "ar100";
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@ -1343,7 +1346,7 @@
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ir_clk: ir_clk {
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#clock-cells = <0>;
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compatible = "allwinner,sun4i-a10-mod0-clk";
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clocks = <&osc32k>, <&osc24M>;
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clocks = <&rtc 0>, <&osc24M>;
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clock-output-names = "ir";
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};
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@ -1373,7 +1376,7 @@
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reg = <0x01f02c00 0x400>;
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interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
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clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
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clock-names = "apb", "hosc", "losc";
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resets = <&apb0_rst 0>;
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gpio-controller;
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