This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following: - Christian adds support for the Cisco Meraki MR32 which is based on the BCM53016 SoC, this requires specifying the PWM, second UART and third PCIe controller in Device Tree before finally adding support for the board. - Adrian updates the status properties from "ok" to "okay". - Andre fixes the SP805 watchdog nodes to have the correct clock names and binding for both the Cygnus and Northstar Plus (NSP). He does the same thing with the SP804 timer node which was missing an "arm,primecell" compatible string. - Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all DRM changes are ready. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl9b6asACgkQh9CWnEQH BwRg8A//d/jxSv6PFEwZzKbzmRCw38e4hUxROUWGVLdELAkF6jywmDDVIFbOKZvH m4bUDsUUZrXk8YnyiR2dvlwt+Qy55UgxIZEB0On8kNK+1aCHsThnVXzbK9gRsrMb dS89BcuMK0msMVeqU/hZ01efd0O1C0Oe0UPiRvDZ6q4s/qH5RIUK/8Hx3hJGtXUY 2dMcfRLyqN8a1qqpGm5CbYJROD4L8rkg/AaaHAq71iz5uMR3r/PyCCEeT+UIV7yT TFMsdUe//SyHPYYrbYAIqRW8mEzMEFEGvv2zlG42EroGxapPP4+fe5vGlnPGQwXk lBLAEaZ3xTZ4p6G6s8YNWS06FM/ARRM5wsp/ZWlU5NNg/UCCUTqVOdH7Sr6fsJbV NysQYrPf9vYfcANWmHQTZcQRHCWG9hkIoOfYbdI834z5MBMN2W2JCtOiG/fawSwM Ir1lQpKYhQmIkp6dShB0B52EufgFdrL50N92vOBczlJWWOjcxfA6hGKKF/SxhBia r3gMPYN3sjPAtA2Q36FiP+LOr32K9wzQZSIklSVUlcdzr15VHG/f/mKP1erWwTVS +dVdQg9Jzm0KsPWMJ4suJocDuerZPH8BZoK6T2C9lmLD7RocKvR4keEEvVI1tdOn DWXQ3TaJW9QM+QzavU/F4HOhK4bYyiYGIGlyhKZm32vC/jM+bw0= =EBR/ -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoCs changes for 5.10, please pull the following: - Christian adds support for the Cisco Meraki MR32 which is based on the BCM53016 SoC, this requires specifying the PWM, second UART and third PCIe controller in Device Tree before finally adding support for the board. - Adrian updates the status properties from "ok" to "okay". - Andre fixes the SP805 watchdog nodes to have the correct clock names and binding for both the Cygnus and Northstar Plus (NSP). He does the same thing with the SP804 timer node which was missing an "arm,primecell" compatible string. - Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all DRM changes are ready. * tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: broadcom: Fix SP804 node ARM: dts: NSP: Fix SP805 clock-names ARM: dts: Cygnus: Fix SP805 clocks ARM: dts: NSP: replace status value "ok" by "okay" ARM: BCM5301X: Add DT for Meraki MR32 ARM: dts: bcm2711: Enable the display pipeline ARM: dts: BCM5301X: Specify pcie2 in the DT ARM: dts: BCM5301X: Specify uart2 in the DT ARM: dts: BCM5301X: Specify PWM in the DT dt-bindings: ARM: add bindings for the Meraki MR32 Link: https://lore.kernel.org/r/20200912032153.1216354-1-f.fainelli@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Коммит
ba601120cf
|
@ -83,6 +83,8 @@ properties:
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|||
- brcm,bcm953012er
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||||
- brcm,bcm953012hr
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- brcm,bcm953012k
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- meraki,mr32
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- const: brcm,brcm53012
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- const: brcm,brcm53016
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- const: brcm,bcm4708
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...
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|
|
|
@ -127,6 +127,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
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bcm47094-luxul-xwr-3150-v1.dtb \
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bcm47094-netgear-r8500.dtb \
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bcm47094-phicomm-k3.dtb \
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bcm53016-meraki-mr32.dtb \
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bcm94708.dtb \
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bcm94709.dtb \
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bcm953012er.dtb \
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|
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@ -234,8 +234,8 @@
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compatible = "arm,sp805" , "arm,primecell";
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reg = <0x18009000 0x1000>;
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interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&axi81_clk>;
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clock-names = "apb_pclk";
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clocks = <&axi81_clk>, <&axi81_clk>;
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clock-names = "wdog_clk", "apb_pclk";
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};
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gpio_ccm: gpio@1800a000 {
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@ -368,7 +368,7 @@
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};
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ccbtimer0: timer@34000 {
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compatible = "arm,sp804";
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x34000 0x1000>;
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interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
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@ -377,7 +377,7 @@
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};
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ccbtimer1: timer@35000 {
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compatible = "arm,sp804";
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x35000 0x1000>;
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interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
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@ -438,7 +438,7 @@
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reg = <0x39000 0x1000>;
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interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&iprocslow>, <&iprocslow>;
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clock-names = "wdogclk", "apb_pclk";
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clock-names = "wdog_clk", "apb_pclk";
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};
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lcpll0: lcpll0@3f100 {
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@ -68,6 +68,14 @@
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};
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};
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&ddc0 {
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status = "okay";
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};
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&ddc1 {
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status = "okay";
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};
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&firmware {
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firmware_clocks: clocks {
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compatible = "raspberrypi,firmware-clocks";
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@ -163,6 +171,38 @@
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"RGMII_TXD3";
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};
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&hdmi0 {
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clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
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clock-names = "hdmi", "bvb", "audio", "cec";
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status = "okay";
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};
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&hdmi1 {
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clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
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clock-names = "hdmi", "bvb", "audio", "cec";
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status = "okay";
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};
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&hvs {
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clocks = <&firmware_clocks 4>;
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};
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&pixelvalve0 {
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status = "okay";
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};
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&pixelvalve1 {
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status = "okay";
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};
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&pixelvalve2 {
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status = "okay";
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};
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&pixelvalve4 {
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status = "okay";
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
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|
@ -231,3 +271,11 @@
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&vchiq {
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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};
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&vc4 {
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status = "okay";
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};
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&vec {
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status = "disabled";
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};
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@ -12,6 +12,18 @@
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interrupt-parent = <&gicv2>;
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vc4: gpu {
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compatible = "brcm,bcm2711-vc5";
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status = "disabled";
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};
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clk_27MHz: clk-27M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <27000000>;
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clock-output-names = "27MHz-clock";
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};
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clk_108MHz: clk-108M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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@ -238,6 +250,27 @@
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status = "disabled";
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};
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pixelvalve0: pixelvalve@7e206000 {
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compatible = "brcm,bcm2711-pixelvalve0";
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reg = <0x7e206000 0x100>;
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interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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pixelvalve1: pixelvalve@7e207000 {
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compatible = "brcm,bcm2711-pixelvalve1";
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reg = <0x7e207000 0x100>;
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interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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pixelvalve2: pixelvalve@7e20a000 {
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compatible = "brcm,bcm2711-pixelvalve2";
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reg = <0x7e20a000 0x100>;
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interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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pwm1: pwm@7e20c800 {
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compatible = "brcm,bcm2835-pwm";
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reg = <0x7e20c800 0x28>;
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@ -248,10 +281,25 @@
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status = "disabled";
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};
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hvs@7e400000 {
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pixelvalve4: pixelvalve@7e216000 {
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compatible = "brcm,bcm2711-pixelvalve4";
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reg = <0x7e216000 0x100>;
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interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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hvs: hvs@7e400000 {
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compatible = "brcm,bcm2711-hvs";
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interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
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};
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pixelvalve3: pixelvalve@7ec12000 {
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compatible = "brcm,bcm2711-pixelvalve3";
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reg = <0x7ec12000 0x100>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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dvp: clock@7ef00000 {
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compatible = "brcm,brcm2711-dvp";
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reg = <0x7ef00000 0x10>;
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@ -259,6 +307,78 @@
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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hdmi0: hdmi@7ef00700 {
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compatible = "brcm,bcm2711-hdmi0";
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reg = <0x7ef00700 0x300>,
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<0x7ef00300 0x200>,
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<0x7ef00f00 0x80>,
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<0x7ef00f80 0x80>,
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<0x7ef01b00 0x200>,
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<0x7ef01f00 0x400>,
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<0x7ef00200 0x80>,
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<0x7ef04300 0x100>,
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<0x7ef20000 0x100>;
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reg-names = "hdmi",
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"dvp",
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"phy",
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"rm",
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"packet",
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"metadata",
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"csc",
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"cec",
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"hd";
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clock-names = "hdmi", "bvb", "audio", "cec";
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resets = <&dvp 0>;
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ddc = <&ddc0>;
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dmas = <&dma 10>;
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dma-names = "audio-rx";
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status = "disabled";
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};
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ddc0: i2c@7ef04500 {
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compatible = "brcm,bcm2711-hdmi-i2c";
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reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
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reg-names = "bsc", "auto-i2c";
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clock-frequency = <97500>;
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status = "disabled";
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};
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hdmi1: hdmi@7ef05700 {
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compatible = "brcm,bcm2711-hdmi1";
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reg = <0x7ef05700 0x300>,
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<0x7ef05300 0x200>,
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<0x7ef05f00 0x80>,
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<0x7ef05f80 0x80>,
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<0x7ef06b00 0x200>,
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<0x7ef06f00 0x400>,
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<0x7ef00280 0x80>,
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<0x7ef09300 0x100>,
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<0x7ef20000 0x100>;
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reg-names = "hdmi",
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"dvp",
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"phy",
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"rm",
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"packet",
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"metadata",
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"csc",
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"cec",
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"hd";
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ddc = <&ddc1>;
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clock-names = "hdmi", "bvb", "audio", "cec";
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resets = <&dvp 1>;
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dmas = <&dma 17>;
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dma-names = "audio-rx";
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status = "disabled";
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};
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ddc1: i2c@7ef09500 {
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compatible = "brcm,bcm2711-hdmi-i2c";
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reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
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reg-names = "bsc", "auto-i2c";
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clock-frequency = <97500>;
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status = "disabled";
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};
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};
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/*
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|
|
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@ -0,0 +1,197 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Broadcom BCM470X / BCM5301X ARM platform code.
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* DTS for Meraki MR32 / Codename: Espresso
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*
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* Copyright (C) 2018-2020 Christian Lamparter <chunkeey@gmail.com>
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*/
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/dts-v1/;
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#include "bcm4708.dtsi"
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#include "bcm5301x-nand-cs0-bch8.dtsi"
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "meraki,mr32", "brcm,brcm53016", "brcm,bcm4708";
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model = "Meraki MR32";
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chosen {
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bootargs = " console=ttyS0,115200n8 earlycon";
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};
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memory {
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reg = <0x00000000 0x08000000>;
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device_type = "memory";
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};
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aliases {
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serial1 = &uart2;
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};
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leds {
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compatible = "gpio-leds";
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sysled3 {
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function = LED_FUNCTION_FAULT;
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color = <LED_COLOR_ID_AMBER>;
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gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
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panic-indicator;
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};
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sysled2 {
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function = LED_FUNCTION_INDICATOR;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&chipcommon 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
restart {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&chipcommon 21 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm-leds {
|
||||
compatible = "pwm-leds";
|
||||
|
||||
red {
|
||||
/* SYS-LED 1 - Tricolor */
|
||||
function = LED_FUNCTION_INDICATOR;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
pwms = <&pwm 0 50000 0>;
|
||||
max-brightness = <255>;
|
||||
};
|
||||
|
||||
green {
|
||||
/* SYS-LED 1 - Tricolor */
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
pwms = <&pwm 1 50000 0>;
|
||||
max-brightness = <255>;
|
||||
};
|
||||
|
||||
blue {
|
||||
/* SYS-LED 1 - Tricolor */
|
||||
function = LED_FUNCTION_INDICATOR;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
pwms = <&pwm 2 50000 0>;
|
||||
max-brightness = <255>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c {
|
||||
/*
|
||||
* The platform provided I2C does not budge.
|
||||
* This is a replacement until I can figure
|
||||
* out what are the missing bits...
|
||||
*/
|
||||
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
|
||||
scl-gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
|
||||
i2c-gpio,delay-us = <10>; /* close to 100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
current_sense: ina219@45 {
|
||||
compatible = "ti,ina219";
|
||||
reg = <0x45>;
|
||||
shunt-resistor = <60000>; /* = 60 mOhms */
|
||||
};
|
||||
|
||||
eeprom: eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
pagesize = <32>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
clock-frequency = <62500000>;
|
||||
/delete-property/ clocks;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
/*
|
||||
* bluetooth-le {
|
||||
* compatible = "brcm,bcm20732";
|
||||
* enable-gpios = <&chipcommon 20 GPIO_ACTIVE_HIGH>;
|
||||
*};
|
||||
*/
|
||||
};
|
||||
|
||||
&gmac1 {
|
||||
status = "disabled";
|
||||
};
|
||||
&gmac2 {
|
||||
status = "disabled";
|
||||
};
|
||||
&gmac3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinmux_pwm>;
|
||||
};
|
||||
|
||||
&nandcs {
|
||||
nand-ecc-algo = "hw";
|
||||
|
||||
partitions {
|
||||
/*
|
||||
* The partition autodetection does not work for this device.
|
||||
* It will only detect the "nvram" partition with an incorrect size.
|
||||
* [ 1.721667] 1 bcm47xxpart partitions found on MTD device brcmnand.0
|
||||
* [ 1.727962] Creating 1 MTD partitions on "brcmnand.0":
|
||||
* [ 1.733117] 0x000000400000-0x000008000000 : "nvram"
|
||||
*/
|
||||
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
|
||||
partition0@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition1@100000 {
|
||||
label = "bootkernel1";
|
||||
reg = <0x100000 0x300000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition2@400000 {
|
||||
label = "nvram";
|
||||
reg = <0x400000 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition3@500000 {
|
||||
label = "bootkernel2";
|
||||
reg = <0x500000 0x300000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition4@800000 {
|
||||
label = "ubi";
|
||||
reg = <0x800000 0x7780000>;
|
||||
};
|
||||
};
|
||||
};
|
|
@ -252,6 +252,10 @@
|
|||
reg = <0x00013000 0x1000>;
|
||||
};
|
||||
|
||||
pcie2: pcie@14000 {
|
||||
reg = <0x00014000 0x1000>;
|
||||
};
|
||||
|
||||
usb2: usb2@21000 {
|
||||
reg = <0x00021000 0x1000>;
|
||||
|
||||
|
@ -350,6 +354,14 @@
|
|||
};
|
||||
};
|
||||
|
||||
pwm: pwm@18002000 {
|
||||
compatible = "brcm,iproc-pwm";
|
||||
reg = <0x18002000 0x28>;
|
||||
clocks = <&osc>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio: mdio@18003000 {
|
||||
compatible = "brcm,iproc-mdio";
|
||||
reg = <0x18003000 0x8>;
|
||||
|
@ -384,6 +396,15 @@
|
|||
reg = <0x18105000 0x1000>;
|
||||
};
|
||||
|
||||
uart2: serial@18008000 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x18008000 0x20>;
|
||||
clocks = <&iprocslow>;
|
||||
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-shift = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@18009000 {
|
||||
compatible = "brcm,iproc-i2c";
|
||||
reg = <0x18009000 0x50>;
|
||||
|
@ -417,12 +438,12 @@
|
|||
function = "spi";
|
||||
};
|
||||
|
||||
i2c {
|
||||
pinmux_i2c: i2c {
|
||||
groups = "i2c_grp";
|
||||
function = "i2c";
|
||||
};
|
||||
|
||||
pwm {
|
||||
pinmux_pwm: pwm {
|
||||
groups = "pwm0_grp", "pwm1_grp",
|
||||
"pwm2_grp", "pwm3_grp";
|
||||
function = "pwm";
|
||||
|
|
|
@ -196,7 +196,7 @@
|
|||
};
|
||||
|
||||
&sdio {
|
||||
status = "ok";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
|
|
|
@ -208,7 +208,7 @@
|
|||
&sdio {
|
||||
bus-width = <4>;
|
||||
no-1-8-v;
|
||||
status = "ok";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&srab {
|
||||
|
|
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