irqchip/sifive-plic: Switch to fasteoi flow
The SiFive PLIC interrupt controller seems to have all the HW features to support the fasteoi flow, but the driver seems to be stuck in a distant past. Bring it into the 21st century. Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Palmer Dabbelt <palmer@sifive.com> (QEMU Boot) Tested-by: Darius Rad <darius@bluespec.com> (on 2 HW PLIC implementations) Tested-by: Paul Walmsley <paul.walmsley@sifive.com> (HiFive Unleashed) Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/8636gxskmj.wl-maz@kernel.org
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@ -97,7 +97,7 @@ static inline void plic_irq_toggle(const struct cpumask *mask,
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}
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}
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static void plic_irq_enable(struct irq_data *d)
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static void plic_irq_unmask(struct irq_data *d)
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{
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unsigned int cpu = cpumask_any_and(irq_data_get_affinity_mask(d),
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cpu_online_mask);
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@ -106,7 +106,7 @@ static void plic_irq_enable(struct irq_data *d)
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plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1);
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}
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static void plic_irq_disable(struct irq_data *d)
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static void plic_irq_mask(struct irq_data *d)
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{
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plic_irq_toggle(cpu_possible_mask, d->hwirq, 0);
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}
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@ -125,10 +125,8 @@ static int plic_set_affinity(struct irq_data *d,
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if (cpu >= nr_cpu_ids)
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return -EINVAL;
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if (!irqd_irq_disabled(d)) {
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plic_irq_toggle(cpu_possible_mask, d->hwirq, 0);
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plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1);
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}
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plic_irq_toggle(cpu_possible_mask, d->hwirq, 0);
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plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1);
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irq_data_update_effective_affinity(d, cpumask_of(cpu));
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@ -136,14 +134,18 @@ static int plic_set_affinity(struct irq_data *d,
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}
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#endif
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static void plic_irq_eoi(struct irq_data *d)
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{
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struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
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writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM);
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}
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static struct irq_chip plic_chip = {
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.name = "SiFive PLIC",
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/*
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* There is no need to mask/unmask PLIC interrupts. They are "masked"
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* by reading claim and "unmasked" when writing it back.
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*/
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.irq_enable = plic_irq_enable,
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.irq_disable = plic_irq_disable,
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.irq_mask = plic_irq_mask,
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.irq_unmask = plic_irq_unmask,
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.irq_eoi = plic_irq_eoi,
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#ifdef CONFIG_SMP
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.irq_set_affinity = plic_set_affinity,
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#endif
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@ -152,7 +154,7 @@ static struct irq_chip plic_chip = {
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static int plic_irqdomain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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irq_set_chip_and_handler(irq, &plic_chip, handle_simple_irq);
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irq_set_chip_and_handler(irq, &plic_chip, handle_fasteoi_irq);
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irq_set_chip_data(irq, NULL);
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irq_set_noprobe(irq);
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return 0;
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@ -188,7 +190,6 @@ static void plic_handle_irq(struct pt_regs *regs)
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hwirq);
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else
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generic_handle_irq(irq);
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writel(hwirq, claim);
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}
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csr_set(sie, SIE_SEIE);
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}
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