arm64: entry: convert SError handlers to C
For various reasons we'd like to convert the bulk of arm64's exception triage logic to C. As a step towards that, this patch converts the EL1 and EL0 SError triage logic to C. Separate C functions are added for the native and compat cases so that in subsequent patches we can handle native/compat differences in C. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Joey Gouly <joey.gouly@arm.com> Cc: James Morse <james.morse@arm.com> Cc: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20210607094624.34689-4-mark.rutland@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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@ -32,8 +32,11 @@ static inline u32 disr_to_esr(u64 disr)
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}
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asmlinkage void el1_sync_handler(struct pt_regs *regs);
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asmlinkage void el1_error_handler(struct pt_regs *regs);
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asmlinkage void el0_sync_handler(struct pt_regs *regs);
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asmlinkage void el0_error_handler(struct pt_regs *regs);
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asmlinkage void el0_sync_compat_handler(struct pt_regs *regs);
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asmlinkage void el0_error_compat_handler(struct pt_regs *regs);
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asmlinkage void noinstr enter_el1_irq_or_nmi(struct pt_regs *regs);
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asmlinkage void noinstr exit_el1_irq_or_nmi(struct pt_regs *regs);
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@ -57,4 +60,5 @@ void do_cp15instr(unsigned int esr, struct pt_regs *regs);
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void do_el0_svc(struct pt_regs *regs);
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void do_el0_svc_compat(struct pt_regs *regs);
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void do_ptrauth_fault(struct pt_regs *regs, unsigned int esr);
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void do_serror(struct pt_regs *regs, unsigned int esr);
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#endif /* __ASM_EXCEPTION_H */
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@ -279,6 +279,16 @@ asmlinkage void noinstr el1_sync_handler(struct pt_regs *regs)
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}
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}
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asmlinkage void noinstr el1_error_handler(struct pt_regs *regs)
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{
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unsigned long esr = read_sysreg(esr_el1);
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local_daif_restore(DAIF_ERRCTX);
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arm64_enter_nmi(regs);
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do_serror(regs, esr);
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arm64_exit_nmi(regs);
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}
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asmlinkage void noinstr enter_from_user_mode(void)
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{
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lockdep_hardirqs_off(CALLER_ADDR0);
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@ -468,6 +478,23 @@ asmlinkage void noinstr el0_sync_handler(struct pt_regs *regs)
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}
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}
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static void __el0_error_handler_common(struct pt_regs *regs)
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{
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unsigned long esr = read_sysreg(esr_el1);
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enter_from_user_mode();
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local_daif_restore(DAIF_ERRCTX);
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arm64_enter_nmi(regs);
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do_serror(regs, esr);
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arm64_exit_nmi(regs);
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local_daif_restore(DAIF_PROCCTX);
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}
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asmlinkage void noinstr el0_error_handler(struct pt_regs *regs)
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{
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__el0_error_handler_common(regs);
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}
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#ifdef CONFIG_COMPAT
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static void noinstr el0_cp15(struct pt_regs *regs, unsigned long esr)
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{
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@ -526,4 +553,9 @@ asmlinkage void noinstr el0_sync_compat_handler(struct pt_regs *regs)
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el0_inv(regs, esr);
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}
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}
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asmlinkage void noinstr el0_error_compat_handler(struct pt_regs *regs)
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{
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__el0_error_handler_common(regs);
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}
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#endif /* CONFIG_COMPAT */
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@ -757,7 +757,9 @@ SYM_CODE_END(el0_fiq_compat)
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SYM_CODE_START_LOCAL_NOALIGN(el0_error_compat)
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kernel_entry 0, 32
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b el0_error_naked
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mov x0, sp
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bl el0_error_compat_handler
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b ret_to_user
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SYM_CODE_END(el0_error_compat)
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#endif
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@ -778,23 +780,15 @@ SYM_CODE_END(el0_fiq)
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SYM_CODE_START_LOCAL(el1_error)
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kernel_entry 1
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mrs x1, esr_el1
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enable_dbg
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mov x0, sp
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bl do_serror
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bl el1_error_handler
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kernel_exit 1
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SYM_CODE_END(el1_error)
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SYM_CODE_START_LOCAL(el0_error)
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kernel_entry 0
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el0_error_naked:
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mrs x25, esr_el1
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user_exit_irqoff
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enable_dbg
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mov x0, sp
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mov x1, x25
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bl do_serror
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enable_daif
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bl el0_error_handler
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b ret_to_user
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SYM_CODE_END(el0_error)
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@ -869,15 +869,11 @@ bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned int esr)
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}
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}
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asmlinkage void noinstr do_serror(struct pt_regs *regs, unsigned int esr)
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void do_serror(struct pt_regs *regs, unsigned int esr)
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{
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arm64_enter_nmi(regs);
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/* non-RAS errors are not containable */
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if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(regs, esr))
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arm64_serror_panic(regs, esr);
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arm64_exit_nmi(regs);
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}
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/* GENERIC_BUG traps */
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