ARM: 8811/1: always list both ldrd/strd registers explicitly
The ldrd and strd instructions work on a pair of consecutive registers. It is possible to specify either the first register in the pair, or both registers explicitly. Let's always do the later to make things clearer. Signed-off-by: Nicolas Pitre <nico@linaro.org> Suggested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This commit is contained in:
Nicolas Pitre
Russell King
Родитель
82c08c3e7f
Коммит
bc2eca9a68
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@ -398,7 +398,7 @@ ENTRY(secondary_startup)
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ldmia r4, {r5, r7, r12} @ address to jump to after
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sub lr, r4, r5 @ mmu has been enabled
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add r3, r7, lr
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ldrd r4, [r3, #0] @ get secondary_data.pgdir
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ldrd r4, r5, [r3, #0] @ get secondary_data.pgdir
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ARM_BE8(eor r4, r4, r5) @ Swap r5 and r4 in BE:
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ARM_BE8(eor r5, r4, r5) @ it can be done in 3 steps
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ARM_BE8(eor r4, r4, r5) @ without using a temp reg.
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@ -37,25 +37,25 @@ static void xsc3_mc_copy_user_page(void *kto, const void *kfrom)
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1: pld [%1, #64] \n\
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pld [%1, #96] \n\
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\n\
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2: ldrd r2, [%1], #8 \n\
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ldrd r4, [%1], #8 \n\
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2: ldrd r2, r3, [%1], #8 \n\
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ldrd r4, r5, [%1], #8 \n\
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mcr p15, 0, %0, c7, c6, 1 @ invalidate\n\
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strd r2, [%0], #8 \n\
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ldrd r2, [%1], #8 \n\
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strd r4, [%0], #8 \n\
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ldrd r4, [%1], #8 \n\
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strd r2, [%0], #8 \n\
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strd r4, [%0], #8 \n\
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ldrd r2, [%1], #8 \n\
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ldrd r4, [%1], #8 \n\
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strd r2, r3, [%0], #8 \n\
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ldrd r2, r3, [%1], #8 \n\
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strd r4, r5, [%0], #8 \n\
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ldrd r4, r5, [%1], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r4, r5, [%0], #8 \n\
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ldrd r2, r3, [%1], #8 \n\
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ldrd r4, r5, [%1], #8 \n\
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mcr p15, 0, %0, c7, c6, 1 @ invalidate\n\
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strd r2, [%0], #8 \n\
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ldrd r2, [%1], #8 \n\
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strd r2, r3, [%0], #8 \n\
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ldrd r2, r3, [%1], #8 \n\
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subs %2, %2, #1 \n\
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strd r4, [%0], #8 \n\
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ldrd r4, [%1], #8 \n\
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strd r2, [%0], #8 \n\
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strd r4, [%0], #8 \n\
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strd r4, r5, [%0], #8 \n\
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ldrd r4, r5, [%1], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r4, r5, [%0], #8 \n\
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bgt 1b \n\
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beq 2b "
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: "+&r" (kto), "+&r" (kfrom), "=&r" (tmp)
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@ -87,10 +87,10 @@ void xsc3_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
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mov r2, #0 \n\
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mov r3, #0 \n\
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1: mcr p15, 0, %0, c7, c6, 1 @ invalidate line\n\
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strd r2, [%0], #8 \n\
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strd r2, [%0], #8 \n\
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strd r2, [%0], #8 \n\
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strd r2, [%0], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r2, r3, [%0], #8 \n\
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subs r1, r1, #1 \n\
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bne 1b"
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: "=r" (ptr)
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@ -53,26 +53,26 @@ static void mc_copy_user_page(void *from, void *to)
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pld [%0, #96] \n\
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pld [%1, #64] \n\
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pld [%1, #96] \n\
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2: ldrd r2, [%0], #8 \n\
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ldrd r4, [%0], #8 \n\
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2: ldrd r2, r3, [%0], #8 \n\
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ldrd r4, r5, [%0], #8 \n\
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mov ip, %1 \n\
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strd r2, [%1], #8 \n\
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ldrd r2, [%0], #8 \n\
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strd r4, [%1], #8 \n\
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ldrd r4, [%0], #8 \n\
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strd r2, [%1], #8 \n\
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strd r4, [%1], #8 \n\
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strd r2, r3, [%1], #8 \n\
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ldrd r2, r3, [%0], #8 \n\
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strd r4, r5, [%1], #8 \n\
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ldrd r4, r5, [%0], #8 \n\
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strd r2, r3, [%1], #8 \n\
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strd r4, r5, [%1], #8 \n\
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mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\
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ldrd r2, [%0], #8 \n\
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ldrd r2, r3, [%0], #8 \n\
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mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\
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ldrd r4, [%0], #8 \n\
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ldrd r4, r5, [%0], #8 \n\
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mov ip, %1 \n\
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strd r2, [%1], #8 \n\
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ldrd r2, [%0], #8 \n\
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strd r4, [%1], #8 \n\
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ldrd r4, [%0], #8 \n\
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strd r2, [%1], #8 \n\
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strd r4, [%1], #8 \n\
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strd r2, r3, [%1], #8 \n\
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ldrd r2, r3, [%0], #8 \n\
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strd r4, r5, [%1], #8 \n\
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ldrd r4, r5, [%0], #8 \n\
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strd r2, r3, [%1], #8 \n\
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strd r4, r5, [%1], #8 \n\
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mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\
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subs %2, %2, #1 \n\
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mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\
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@ -114,10 +114,10 @@ xscale_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
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mov r2, #0 \n\
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mov r3, #0 \n\
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1: mov ip, %0 \n\
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strd r2, [%0], #8 \n\
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strd r2, [%0], #8 \n\
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strd r2, [%0], #8 \n\
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strd r2, [%0], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r2, r3, [%0], #8 \n\
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mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\
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subs r1, r1, #1 \n\
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mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\
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@ -33,10 +33,10 @@ ENTRY(lpae_pgtables_remap_asm)
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add r7, r2, #0x1000
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add r6, r7, r6, lsr #SECTION_SHIFT - L2_ORDER
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add r7, r7, #PAGE_OFFSET >> (SECTION_SHIFT - L2_ORDER)
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1: ldrd r4, [r7]
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1: ldrd r4, r5, [r7]
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adds r4, r4, r0
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adc r5, r5, r1
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strd r4, [r7], #1 << L2_ORDER
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strd r4, r5, [r7], #1 << L2_ORDER
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cmp r7, r6
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bls 1b
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@ -44,22 +44,22 @@ ENTRY(lpae_pgtables_remap_asm)
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add r7, r2, #0x1000
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add r7, r7, r3, lsr #SECTION_SHIFT - L2_ORDER
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bic r7, r7, #(1 << L2_ORDER) - 1
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ldrd r4, [r7]
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ldrd r4, r5, [r7]
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adds r4, r4, r0
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adc r5, r5, r1
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strd r4, [r7], #1 << L2_ORDER
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ldrd r4, [r7]
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strd r4, r5, [r7], #1 << L2_ORDER
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ldrd r4, r5, [r7]
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adds r4, r4, r0
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adc r5, r5, r1
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strd r4, [r7]
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strd r4, r5, [r7]
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/* Update level 1 entries */
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mov r6, #4
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mov r7, r2
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2: ldrd r4, [r7]
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2: ldrd r4, r5, [r7]
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adds r4, r4, r0
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adc r5, r5, r1
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strd r4, [r7], #1 << L1_ORDER
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strd r4, r5, [r7], #1 << L1_ORDER
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subs r6, r6, #1
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bne 2b
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