EDAC, MCE, AMD: Add decoding table for MC6 xec
Extended error code meanings are tabulated for other banks. Extend that tradition for MC6 too. Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Link: http://lkml.kernel.org/r/1415122868-10969-1-git-send-email-aravind.gopalakrishnan@amd.com Signed-off-by: Borislav Petkov <bp@suse.de>
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@ -138,6 +138,15 @@ static const char * const mc5_mce_desc[] = {
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"Retire status queue"
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};
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static const char * const mc6_mce_desc[] = {
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"Hardware Assertion",
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"Free List",
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"Physical Register File",
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"Retire Queue",
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"Scheduler table",
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"Status Register File",
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};
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static bool f12h_mc0_mce(u16 ec, u8 xec)
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{
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bool ret = false;
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@ -672,38 +681,10 @@ static void decode_mc6_mce(struct mce *m)
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pr_emerg(HW_ERR "MC6 Error: ");
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switch (xec) {
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case 0x0:
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pr_cont("Hardware Assertion");
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break;
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case 0x1:
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pr_cont("Free List");
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break;
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case 0x2:
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pr_cont("Physical Register File");
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break;
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case 0x3:
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pr_cont("Retire Queue");
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break;
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case 0x4:
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pr_cont("Scheduler table");
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break;
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case 0x5:
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pr_cont("Status Register File");
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break;
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default:
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if (xec > 0x5)
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goto wrong_mc6_mce;
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break;
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}
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pr_cont(" parity error.\n");
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pr_cont("%s parity error.\n", mc6_mce_desc[xec]);
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return;
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wrong_mc6_mce:
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