ath9k: split ath9k_hw_btcoex_enable() into two helpers
One for 2-wire and another for 3-wire. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -117,30 +117,47 @@ void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
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ath9k_hw_cfg_gpio_input(ah, btcoex_info->btpriority_gpio);
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}
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static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
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{
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struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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/* Configure the desired GPIO port for TX_FRAME output */
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ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
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AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
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}
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static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
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{
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struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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/*
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* Program coex mode and weight registers to
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* enable coex 3-wire
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*/
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REG_WRITE(ah, AR_BT_COEX_MODE, btcoex_info->bt_coex_mode);
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REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex_info->bt_coex_weights);
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REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex_info->bt_coex_mode2);
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REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
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REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
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ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
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AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
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}
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void ath9k_hw_btcoex_enable(struct ath_hw *ah)
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{
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struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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if (btcoex_info->btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) {
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/* Configure the desired GPIO port for TX_FRAME output */
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ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
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AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
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} else {
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/*
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* Program coex mode and weight registers to
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* enable coex 3-wire
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*/
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REG_WRITE(ah, AR_BT_COEX_MODE, btcoex_info->bt_coex_mode);
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REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex_info->bt_coex_weights);
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REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex_info->bt_coex_mode2);
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REG_RMW_FIELD(ah, AR_QUIET1,
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AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
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REG_RMW_FIELD(ah, AR_PCU_MISC,
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AR_PCU_BT_ANT_PREVENT_RX, 0);
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ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
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AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
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switch (btcoex_info->btcoex_scheme) {
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case ATH_BTCOEX_CFG_NONE:
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break;
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case ATH_BTCOEX_CFG_2WIRE:
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ath9k_hw_btcoex_enable_2wire(ah);
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break;
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case ATH_BTCOEX_CFG_3WIRE:
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ath9k_hw_btcoex_enable_3wire(ah);
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break;
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}
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REG_RMW(ah, AR_GPIO_PDPU,
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