Merge branch 'qlcnic'
Himanshu Madhani says: ==================== This series contains following patches o in v2 series, we received feedback on return codes to use standard error codes instead of mixing custom error codes. We have modified patch for loopback diagnostic test to return standard error codes. o rest of the 3 patches in the series are for mailbox refactoring Current driver-firmware mailbox interface was operating in polling mode because of some limitations with the earlier versions of 83xx adapter firmware. These issues are resolved now and we are implementing the mailbox interface in interrupt mode. There are three patches which refactors mailbox handling: * Interrupt mode mailbox implantation. * Replace poll mode mailbox interfaces with interrupt mode interfaces. * Operate mailbox in poll mode when interrupts are not available. changes from v2 -> v3 * Addressed review feedback to use standard return codes for loopback diagnostic test. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Коммит
bd3f543325
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@ -20,7 +20,6 @@
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#include <linux/tcp.h>
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#include <linux/skbuff.h>
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#include <linux/firmware.h>
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#include <linux/ethtool.h>
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#include <linux/mii.h>
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#include <linux/timer.h>
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@ -38,8 +37,8 @@
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#define _QLCNIC_LINUX_MAJOR 5
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#define _QLCNIC_LINUX_MINOR 2
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#define _QLCNIC_LINUX_SUBVERSION 44
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#define QLCNIC_LINUX_VERSIONID "5.2.44"
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#define _QLCNIC_LINUX_SUBVERSION 45
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#define QLCNIC_LINUX_VERSIONID "5.2.45"
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#define QLCNIC_DRV_IDC_VER 0x01
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#define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) |\
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(_QLCNIC_LINUX_MINOR << 8) | (_QLCNIC_LINUX_SUBVERSION))
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@ -467,7 +466,7 @@ struct qlcnic_hardware_context {
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u32 *ext_reg_tbl;
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u32 mbox_aen[QLC_83XX_MBX_AEN_CNT];
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u32 mbox_reg[4];
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spinlock_t mbx_lock;
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struct qlcnic_mailbox *mailbox;
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};
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struct qlcnic_adapter_stats {
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@ -950,12 +949,6 @@ struct qlcnic_ipaddr {
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#define QLCNIC_READD_AGE 20
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#define QLCNIC_LB_MAX_FILTERS 64
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#define QLCNIC_LB_BUCKET_SIZE 32
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/* QLCNIC Driver Error Code */
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#define QLCNIC_FW_NOT_RESPOND 51
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#define QLCNIC_TEST_IN_PROGRESS 52
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#define QLCNIC_UNDEFINED_ERROR 53
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#define QLCNIC_LB_CABLE_NOT_CONN 54
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#define QLCNIC_ILB_MAX_RCV_LOOP 10
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struct qlcnic_filter {
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@ -972,6 +965,21 @@ struct qlcnic_filter_hash {
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u16 fbucket_size;
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};
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/* Mailbox specific data structures */
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struct qlcnic_mailbox {
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struct workqueue_struct *work_q;
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struct qlcnic_adapter *adapter;
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struct qlcnic_mbx_ops *ops;
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struct work_struct work;
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struct completion completion;
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struct list_head cmd_q;
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unsigned long status;
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spinlock_t queue_lock; /* Mailbox queue lock */
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spinlock_t aen_lock; /* Mailbox response/AEN lock */
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atomic_t rsp_status;
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u32 num_cmds;
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};
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struct qlcnic_adapter {
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struct qlcnic_hardware_context *ahw;
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struct qlcnic_recv_context *recv_ctx;
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@ -1385,9 +1393,20 @@ struct _cdrp_cmd {
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};
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struct qlcnic_cmd_args {
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struct completion completion;
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struct list_head list;
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struct _cdrp_cmd req;
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struct _cdrp_cmd rsp;
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int op_type;
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atomic_t rsp_status;
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int pay_size;
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u32 rsp_opcode;
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u32 total_cmds;
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u32 op_type;
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u32 type;
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u32 cmd_op;
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u32 *hdr; /* Back channel message header */
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u32 *pay; /* Back channel message payload */
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u8 func_num;
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};
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int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter);
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@ -1600,6 +1619,20 @@ struct qlcnic_nic_template {
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int (*resume)(struct qlcnic_adapter *);
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};
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struct qlcnic_mbx_ops {
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int (*enqueue_cmd) (struct qlcnic_adapter *,
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struct qlcnic_cmd_args *, unsigned long *);
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void (*dequeue_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
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void (*decode_resp) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
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void (*encode_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
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void (*nofity_fw) (struct qlcnic_adapter *, u8);
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};
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int qlcnic_83xx_init_mailbox_work(struct qlcnic_adapter *);
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void qlcnic_83xx_detach_mailbox_work(struct qlcnic_adapter *);
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void qlcnic_83xx_reinit_mbx_work(struct qlcnic_mailbox *mbx);
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void qlcnic_83xx_free_mailbox(struct qlcnic_mailbox *mbx);
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/* Adapter hardware abstraction */
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struct qlcnic_hardware_ops {
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void (*read_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
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@ -149,7 +149,7 @@ static struct qlcnic_hardware_ops qlcnic_83xx_hw_ops = {
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.get_mac_address = qlcnic_83xx_get_mac_address,
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.setup_intr = qlcnic_83xx_setup_intr,
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.alloc_mbx_args = qlcnic_83xx_alloc_mbx_args,
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.mbx_cmd = qlcnic_83xx_mbx_op,
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.mbx_cmd = qlcnic_83xx_issue_cmd,
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.get_func_no = qlcnic_83xx_get_func_no,
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.api_lock = qlcnic_83xx_cam_lock,
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.api_unlock = qlcnic_83xx_cam_unlock,
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@ -362,6 +362,10 @@ static inline void qlcnic_83xx_get_mbx_data(struct qlcnic_adapter *adapter,
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struct qlcnic_cmd_args *cmd)
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{
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int i;
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if (cmd->op_type == QLC_83XX_MBX_POST_BC_OP)
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return;
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for (i = 0; i < cmd->rsp.num; i++)
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cmd->rsp.arg[i] = readl(QLCNIC_MBX_FW(adapter->ahw, i));
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}
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@ -398,24 +402,33 @@ irqreturn_t qlcnic_83xx_clear_legacy_intr(struct qlcnic_adapter *adapter)
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return IRQ_HANDLED;
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}
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static inline void qlcnic_83xx_notify_mbx_response(struct qlcnic_mailbox *mbx)
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{
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atomic_set(&mbx->rsp_status, QLC_83XX_MBX_RESPONSE_ARRIVED);
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complete(&mbx->completion);
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}
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static void qlcnic_83xx_poll_process_aen(struct qlcnic_adapter *adapter)
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{
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u32 resp, event;
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u32 resp, event, rsp_status = QLC_83XX_MBX_RESPONSE_ARRIVED;
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struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
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unsigned long flags;
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spin_lock_irqsave(&adapter->ahw->mbx_lock, flags);
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spin_lock_irqsave(&mbx->aen_lock, flags);
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resp = QLCRDX(adapter->ahw, QLCNIC_FW_MBX_CTRL);
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if (!(resp & QLCNIC_SET_OWNER))
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goto out;
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event = readl(QLCNIC_MBX_FW(adapter->ahw, 0));
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if (event & QLCNIC_MBX_ASYNC_EVENT)
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if (event & QLCNIC_MBX_ASYNC_EVENT) {
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__qlcnic_83xx_process_aen(adapter);
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} else {
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if (atomic_read(&mbx->rsp_status) != rsp_status)
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qlcnic_83xx_notify_mbx_response(mbx);
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}
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out:
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qlcnic_83xx_enable_legacy_msix_mbx_intr(adapter);
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spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
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spin_unlock_irqrestore(&mbx->aen_lock, flags);
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}
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irqreturn_t qlcnic_83xx_intr(int irq, void *data)
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@ -515,7 +528,7 @@ int qlcnic_83xx_setup_mbx_intr(struct qlcnic_adapter *adapter)
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}
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/* Enable mailbox interrupt */
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qlcnic_83xx_enable_mbx_intrpt(adapter);
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qlcnic_83xx_enable_mbx_interrupt(adapter);
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return err;
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}
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@ -629,7 +642,7 @@ void qlcnic_83xx_set_mac_filter_count(struct qlcnic_adapter *adapter)
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ahw->max_uc_count = count;
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}
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void qlcnic_83xx_enable_mbx_intrpt(struct qlcnic_adapter *adapter)
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void qlcnic_83xx_enable_mbx_interrupt(struct qlcnic_adapter *adapter)
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{
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u32 val;
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@ -688,6 +701,9 @@ static void qlcnic_dump_mbx(struct qlcnic_adapter *adapter,
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{
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int i;
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if (cmd->op_type == QLC_83XX_MBX_POST_BC_OP)
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return;
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dev_info(&adapter->pdev->dev,
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"Host MBX regs(%d)\n", cmd->req.num);
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for (i = 0; i < cmd->req.num; i++) {
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@ -706,120 +722,74 @@ static void qlcnic_dump_mbx(struct qlcnic_adapter *adapter,
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pr_info("\n");
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}
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/* Mailbox response for mac rcode */
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u32 qlcnic_83xx_mac_rcode(struct qlcnic_adapter *adapter)
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{
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u32 fw_data;
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u8 mac_cmd_rcode;
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fw_data = readl(QLCNIC_MBX_FW(adapter->ahw, 2));
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mac_cmd_rcode = (u8)fw_data;
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if (mac_cmd_rcode == QLC_83XX_NO_NIC_RESOURCE ||
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mac_cmd_rcode == QLC_83XX_MAC_PRESENT ||
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mac_cmd_rcode == QLC_83XX_MAC_ABSENT)
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return QLCNIC_RCODE_SUCCESS;
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return 1;
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}
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u32 qlcnic_83xx_mbx_poll(struct qlcnic_adapter *adapter, u32 *wait_time)
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{
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u32 data;
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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/* wait for mailbox completion */
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do {
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data = QLCRDX(ahw, QLCNIC_FW_MBX_CTRL);
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if (++(*wait_time) > QLCNIC_MBX_TIMEOUT) {
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data = QLCNIC_RCODE_TIMEOUT;
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break;
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}
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mdelay(1);
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} while (!data);
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return data;
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}
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int qlcnic_83xx_mbx_op(struct qlcnic_adapter *adapter,
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static inline void
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qlcnic_83xx_poll_for_mbx_completion(struct qlcnic_adapter *adapter,
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struct qlcnic_cmd_args *cmd)
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{
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int i;
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u16 opcode;
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u8 mbx_err_code;
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unsigned long flags;
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd, wait_time = 0;
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int opcode = LSW(cmd->req.arg[0]);
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unsigned long max_loops;
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max_loops = cmd->total_cmds * QLC_83XX_MBX_CMD_LOOP;
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for (; max_loops; max_loops--) {
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if (atomic_read(&cmd->rsp_status) ==
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QLC_83XX_MBX_RESPONSE_ARRIVED)
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return;
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udelay(1);
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}
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dev_err(&adapter->pdev->dev,
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"%s: Mailbox command timed out, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
|
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__func__, opcode, cmd->type, ahw->pci_func, ahw->op_mode);
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flush_workqueue(ahw->mailbox->work_q);
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return;
|
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}
|
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|
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int qlcnic_83xx_issue_cmd(struct qlcnic_adapter *adapter,
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struct qlcnic_cmd_args *cmd)
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{
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struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
|
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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int cmd_type, err, opcode;
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unsigned long timeout;
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opcode = LSW(cmd->req.arg[0]);
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if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
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dev_info(&adapter->pdev->dev,
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"Mailbox cmd attempted, 0x%x\n", opcode);
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dev_info(&adapter->pdev->dev, "Mailbox detached\n");
|
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cmd_type = cmd->type;
|
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err = mbx->ops->enqueue_cmd(adapter, cmd, &timeout);
|
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if (err) {
|
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dev_err(&adapter->pdev->dev,
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"%s: Mailbox not available, cmd_op=0x%x, cmd_context=0x%x, pci_func=0x%x, op_mode=0x%x\n",
|
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__func__, opcode, cmd->type, ahw->pci_func,
|
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ahw->op_mode);
|
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return err;
|
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}
|
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|
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switch (cmd_type) {
|
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case QLC_83XX_MBX_CMD_WAIT:
|
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if (!wait_for_completion_timeout(&cmd->completion, timeout)) {
|
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dev_err(&adapter->pdev->dev,
|
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"%s: Mailbox command timed out, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
|
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__func__, opcode, cmd_type, ahw->pci_func,
|
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ahw->op_mode);
|
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flush_workqueue(mbx->work_q);
|
||||
}
|
||||
break;
|
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case QLC_83XX_MBX_CMD_NO_WAIT:
|
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return 0;
|
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}
|
||||
|
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spin_lock_irqsave(&adapter->ahw->mbx_lock, flags);
|
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mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
|
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|
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if (mbx_val) {
|
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QLCDB(adapter, DRV,
|
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"Mailbox cmd attempted, 0x%x\n", opcode);
|
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QLCDB(adapter, DRV,
|
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"Mailbox not available, 0x%x, collect FW dump\n",
|
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mbx_val);
|
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cmd->rsp.arg[0] = QLCNIC_RCODE_TIMEOUT;
|
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spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
|
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return cmd->rsp.arg[0];
|
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}
|
||||
|
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/* Fill in mailbox registers */
|
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mbx_cmd = cmd->req.arg[0];
|
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writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0));
|
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for (i = 1; i < cmd->req.num; i++)
|
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writel(cmd->req.arg[i], QLCNIC_MBX_HOST(ahw, i));
|
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|
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/* Signal FW about the impending command */
|
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QLCWRX(ahw, QLCNIC_HOST_MBX_CTRL, QLCNIC_SET_OWNER);
|
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poll:
|
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rsp = qlcnic_83xx_mbx_poll(adapter, &wait_time);
|
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if (rsp != QLCNIC_RCODE_TIMEOUT) {
|
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/* Get the FW response data */
|
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fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
|
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if (fw_data & QLCNIC_MBX_ASYNC_EVENT) {
|
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__qlcnic_83xx_process_aen(adapter);
|
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goto poll;
|
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}
|
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mbx_err_code = QLCNIC_MBX_STATUS(fw_data);
|
||||
rsp_num = QLCNIC_MBX_NUM_REGS(fw_data);
|
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opcode = QLCNIC_MBX_RSP(fw_data);
|
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qlcnic_83xx_get_mbx_data(adapter, cmd);
|
||||
|
||||
switch (mbx_err_code) {
|
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case QLCNIC_MBX_RSP_OK:
|
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case QLCNIC_MBX_PORT_RSP_OK:
|
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rsp = QLCNIC_RCODE_SUCCESS;
|
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case QLC_83XX_MBX_CMD_BUSY_WAIT:
|
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qlcnic_83xx_poll_for_mbx_completion(adapter, cmd);
|
||||
break;
|
||||
default:
|
||||
if (opcode == QLCNIC_CMD_CONFIG_MAC_VLAN) {
|
||||
rsp = qlcnic_83xx_mac_rcode(adapter);
|
||||
if (!rsp)
|
||||
goto out;
|
||||
}
|
||||
dev_err(&adapter->pdev->dev,
|
||||
"MBX command 0x%x failed with err:0x%x\n",
|
||||
opcode, mbx_err_code);
|
||||
rsp = mbx_err_code;
|
||||
qlcnic_dump_mbx(adapter, cmd);
|
||||
break;
|
||||
}
|
||||
goto out;
|
||||
"%s: Invalid mailbox command, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
|
||||
__func__, opcode, cmd_type, ahw->pci_func,
|
||||
ahw->op_mode);
|
||||
qlcnic_83xx_detach_mailbox_work(adapter);
|
||||
}
|
||||
|
||||
dev_err(&adapter->pdev->dev, "MBX command 0x%x timed out\n",
|
||||
QLCNIC_MBX_RSP(mbx_cmd));
|
||||
rsp = QLCNIC_RCODE_TIMEOUT;
|
||||
out:
|
||||
/* clear fw mbx control register */
|
||||
QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
|
||||
spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
|
||||
return rsp;
|
||||
return cmd->rsp_opcode;
|
||||
}
|
||||
|
||||
int qlcnic_83xx_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
|
||||
|
@ -829,6 +799,7 @@ int qlcnic_83xx_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
|
|||
u32 temp;
|
||||
const struct qlcnic_mailbox_metadata *mbx_tbl;
|
||||
|
||||
memset(mbx, 0, sizeof(struct qlcnic_cmd_args));
|
||||
mbx_tbl = qlcnic_83xx_mbx_tbl;
|
||||
size = ARRAY_SIZE(qlcnic_83xx_mbx_tbl);
|
||||
for (i = 0; i < size; i++) {
|
||||
|
@ -851,6 +822,7 @@ int qlcnic_83xx_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
|
|||
memset(mbx->rsp.arg, 0, sizeof(u32) * mbx->rsp.num);
|
||||
temp = adapter->ahw->fw_hal_version << 29;
|
||||
mbx->req.arg[0] = (type | (mbx->req.num << 16) | temp);
|
||||
mbx->cmd_op = type;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
@ -934,20 +906,23 @@ void __qlcnic_83xx_process_aen(struct qlcnic_adapter *adapter)
|
|||
|
||||
static void qlcnic_83xx_process_aen(struct qlcnic_adapter *adapter)
|
||||
{
|
||||
u32 resp, event, rsp_status = QLC_83XX_MBX_RESPONSE_ARRIVED;
|
||||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
u32 resp, event;
|
||||
struct qlcnic_mailbox *mbx = ahw->mailbox;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&ahw->mbx_lock, flags);
|
||||
|
||||
spin_lock_irqsave(&mbx->aen_lock, flags);
|
||||
resp = QLCRDX(ahw, QLCNIC_FW_MBX_CTRL);
|
||||
if (resp & QLCNIC_SET_OWNER) {
|
||||
event = readl(QLCNIC_MBX_FW(ahw, 0));
|
||||
if (event & QLCNIC_MBX_ASYNC_EVENT)
|
||||
if (event & QLCNIC_MBX_ASYNC_EVENT) {
|
||||
__qlcnic_83xx_process_aen(adapter);
|
||||
} else {
|
||||
if (atomic_read(&mbx->rsp_status) != rsp_status)
|
||||
qlcnic_83xx_notify_mbx_response(mbx);
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&ahw->mbx_lock, flags);
|
||||
}
|
||||
spin_unlock_irqrestore(&mbx->aen_lock, flags);
|
||||
}
|
||||
|
||||
static void qlcnic_83xx_mbx_poll_work(struct work_struct *work)
|
||||
|
@ -970,6 +945,7 @@ void qlcnic_83xx_enable_mbx_poll(struct qlcnic_adapter *adapter)
|
|||
return;
|
||||
|
||||
INIT_DELAYED_WORK(&adapter->mbx_poll_work, qlcnic_83xx_mbx_poll_work);
|
||||
queue_delayed_work(adapter->qlcnic_wq, &adapter->mbx_poll_work, 0);
|
||||
}
|
||||
|
||||
void qlcnic_83xx_disable_mbx_poll(struct qlcnic_adapter *adapter)
|
||||
|
@ -1356,8 +1332,10 @@ static int qlcnic_83xx_diag_alloc_res(struct net_device *netdev, int test,
|
|||
|
||||
if (adapter->ahw->diag_test == QLCNIC_LOOPBACK_TEST) {
|
||||
/* disable and free mailbox interrupt */
|
||||
if (!(adapter->flags & QLCNIC_MSIX_ENABLED))
|
||||
if (!(adapter->flags & QLCNIC_MSIX_ENABLED)) {
|
||||
qlcnic_83xx_enable_mbx_poll(adapter);
|
||||
qlcnic_83xx_free_mbx_intr(adapter);
|
||||
}
|
||||
adapter->ahw->loopback_state = 0;
|
||||
adapter->ahw->hw_ops->setup_link_event(adapter, 1);
|
||||
}
|
||||
|
@ -1378,6 +1356,8 @@ static void qlcnic_83xx_diag_free_res(struct net_device *netdev,
|
|||
for (ring = 0; ring < adapter->max_sds_rings; ring++) {
|
||||
sds_ring = &adapter->recv_ctx->sds_rings[ring];
|
||||
qlcnic_83xx_disable_intr(adapter, sds_ring);
|
||||
if (!(adapter->flags & QLCNIC_MSIX_ENABLED))
|
||||
qlcnic_83xx_enable_mbx_poll(adapter);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1387,6 +1367,7 @@ static void qlcnic_83xx_diag_free_res(struct net_device *netdev,
|
|||
if (adapter->ahw->diag_test == QLCNIC_LOOPBACK_TEST) {
|
||||
if (!(adapter->flags & QLCNIC_MSIX_ENABLED)) {
|
||||
err = qlcnic_83xx_setup_mbx_intr(adapter);
|
||||
qlcnic_83xx_disable_mbx_poll(adapter);
|
||||
if (err) {
|
||||
dev_err(&adapter->pdev->dev,
|
||||
"%s: failed to setup mbx interrupt\n",
|
||||
|
@ -1403,6 +1384,10 @@ static void qlcnic_83xx_diag_free_res(struct net_device *netdev,
|
|||
|
||||
if (netif_running(netdev))
|
||||
__qlcnic_up(adapter, netdev);
|
||||
|
||||
if (adapter->ahw->diag_test == QLCNIC_INTERRUPT_TEST &&
|
||||
!(adapter->flags & QLCNIC_MSIX_ENABLED))
|
||||
qlcnic_83xx_disable_mbx_poll(adapter);
|
||||
out:
|
||||
netif_device_attach(netdev);
|
||||
}
|
||||
|
@ -1620,26 +1605,33 @@ static void qlcnic_83xx_set_interface_id_promisc(struct qlcnic_adapter *adapter,
|
|||
|
||||
int qlcnic_83xx_nic_set_promisc(struct qlcnic_adapter *adapter, u32 mode)
|
||||
{
|
||||
int err;
|
||||
struct qlcnic_cmd_args *cmd = NULL;
|
||||
u32 temp = 0;
|
||||
struct qlcnic_cmd_args cmd;
|
||||
int err;
|
||||
|
||||
if (adapter->recv_ctx->state == QLCNIC_HOST_CTX_STATE_FREED)
|
||||
return -EIO;
|
||||
|
||||
err = qlcnic_alloc_mbx_args(&cmd, adapter,
|
||||
cmd = kzalloc(sizeof(*cmd), GFP_ATOMIC);
|
||||
if (!cmd)
|
||||
return -ENOMEM;
|
||||
|
||||
err = qlcnic_alloc_mbx_args(cmd, adapter,
|
||||
QLCNIC_CMD_CONFIGURE_MAC_RX_MODE);
|
||||
if (err)
|
||||
goto out;
|
||||
|
||||
cmd->type = QLC_83XX_MBX_CMD_NO_WAIT;
|
||||
qlcnic_83xx_set_interface_id_promisc(adapter, &temp);
|
||||
cmd->req.arg[1] = (mode ? 1 : 0) | temp;
|
||||
err = qlcnic_issue_cmd(adapter, cmd);
|
||||
if (!err)
|
||||
return err;
|
||||
|
||||
qlcnic_83xx_set_interface_id_promisc(adapter, &temp);
|
||||
cmd.req.arg[1] = (mode ? 1 : 0) | temp;
|
||||
err = qlcnic_issue_cmd(adapter, &cmd);
|
||||
if (err)
|
||||
dev_info(&adapter->pdev->dev,
|
||||
"Promiscous mode config failed\n");
|
||||
qlcnic_free_mbx_args(cmd);
|
||||
|
||||
qlcnic_free_mbx_args(&cmd);
|
||||
out:
|
||||
kfree(cmd);
|
||||
return err;
|
||||
}
|
||||
|
||||
|
@ -1652,7 +1644,7 @@ int qlcnic_83xx_loopback_test(struct net_device *netdev, u8 mode)
|
|||
if (ahw->op_mode == QLCNIC_NON_PRIV_FUNC) {
|
||||
netdev_warn(netdev,
|
||||
"Loopback test not supported in non privileged mode\n");
|
||||
return ret;
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
if (test_bit(__QLCNIC_RESETTING, &adapter->state)) {
|
||||
|
@ -1680,19 +1672,17 @@ int qlcnic_83xx_loopback_test(struct net_device *netdev, u8 mode)
|
|||
/* Poll for link up event before running traffic */
|
||||
do {
|
||||
msleep(QLC_83XX_LB_MSLEEP_COUNT);
|
||||
if (!(adapter->flags & QLCNIC_MSIX_ENABLED))
|
||||
qlcnic_83xx_process_aen(adapter);
|
||||
|
||||
if (test_bit(__QLCNIC_RESETTING, &adapter->state)) {
|
||||
netdev_info(netdev,
|
||||
"Device is resetting, free LB test resources\n");
|
||||
ret = -EIO;
|
||||
ret = -EBUSY;
|
||||
goto free_diag_res;
|
||||
}
|
||||
if (loop++ > QLC_83XX_LB_WAIT_COUNT) {
|
||||
netdev_info(netdev,
|
||||
"Firmware didn't sent link up event to loopback request\n");
|
||||
ret = -QLCNIC_FW_NOT_RESPOND;
|
||||
ret = -ETIMEDOUT;
|
||||
qlcnic_83xx_clear_lb_mode(adapter, mode);
|
||||
goto free_diag_res;
|
||||
}
|
||||
|
@ -1729,6 +1719,15 @@ int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
|
|||
return status;
|
||||
|
||||
config = ahw->port_config;
|
||||
|
||||
/* Check if port is already in loopback mode */
|
||||
if ((config & QLC_83XX_CFG_LOOPBACK_HSS) ||
|
||||
(config & QLC_83XX_CFG_LOOPBACK_EXT)) {
|
||||
netdev_err(netdev,
|
||||
"Port already in Loopback mode.\n");
|
||||
return -EINPROGRESS;
|
||||
}
|
||||
|
||||
set_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
|
||||
|
||||
if (mode == QLCNIC_ILB_MODE)
|
||||
|
@ -1749,21 +1748,19 @@ int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
|
|||
/* Wait for Link and IDC Completion AEN */
|
||||
do {
|
||||
msleep(QLC_83XX_LB_MSLEEP_COUNT);
|
||||
if (!(adapter->flags & QLCNIC_MSIX_ENABLED))
|
||||
qlcnic_83xx_process_aen(adapter);
|
||||
|
||||
if (test_bit(__QLCNIC_RESETTING, &adapter->state)) {
|
||||
netdev_info(netdev,
|
||||
"Device is resetting, free LB test resources\n");
|
||||
clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
|
||||
return -EIO;
|
||||
return -EBUSY;
|
||||
}
|
||||
if (loop++ > QLC_83XX_LB_WAIT_COUNT) {
|
||||
netdev_err(netdev,
|
||||
"Did not receive IDC completion AEN\n");
|
||||
clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
|
||||
qlcnic_83xx_clear_lb_mode(adapter, mode);
|
||||
return -EIO;
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
} while (test_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status));
|
||||
|
||||
|
@ -1798,21 +1795,19 @@ int qlcnic_83xx_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
|
|||
/* Wait for Link and IDC Completion AEN */
|
||||
do {
|
||||
msleep(QLC_83XX_LB_MSLEEP_COUNT);
|
||||
if (!(adapter->flags & QLCNIC_MSIX_ENABLED))
|
||||
qlcnic_83xx_process_aen(adapter);
|
||||
|
||||
if (test_bit(__QLCNIC_RESETTING, &adapter->state)) {
|
||||
netdev_info(netdev,
|
||||
"Device is resetting, free LB test resources\n");
|
||||
clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
|
||||
return -EIO;
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
if (loop++ > QLC_83XX_LB_WAIT_COUNT) {
|
||||
netdev_err(netdev,
|
||||
"Did not receive IDC completion AEN\n");
|
||||
clear_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status);
|
||||
return -EIO;
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
} while (test_bit(QLC_83XX_IDC_COMP_AEN, &ahw->idc.status));
|
||||
|
||||
|
@ -1951,25 +1946,31 @@ static void qlcnic_83xx_set_interface_id_macaddr(struct qlcnic_adapter *adapter,
|
|||
int qlcnic_83xx_sre_macaddr_change(struct qlcnic_adapter *adapter, u8 *addr,
|
||||
u16 vlan_id, u8 op)
|
||||
{
|
||||
int err;
|
||||
u32 *buf, temp = 0;
|
||||
struct qlcnic_cmd_args cmd;
|
||||
struct qlcnic_cmd_args *cmd = NULL;
|
||||
struct qlcnic_macvlan_mbx mv;
|
||||
u32 *buf, temp = 0;
|
||||
int err;
|
||||
|
||||
if (adapter->recv_ctx->state == QLCNIC_HOST_CTX_STATE_FREED)
|
||||
return -EIO;
|
||||
|
||||
err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_CONFIG_MAC_VLAN);
|
||||
cmd = kzalloc(sizeof(*cmd), GFP_ATOMIC);
|
||||
if (!cmd)
|
||||
return -ENOMEM;
|
||||
|
||||
err = qlcnic_alloc_mbx_args(cmd, adapter, QLCNIC_CMD_CONFIG_MAC_VLAN);
|
||||
if (err)
|
||||
return err;
|
||||
goto out;
|
||||
|
||||
cmd->type = QLC_83XX_MBX_CMD_NO_WAIT;
|
||||
|
||||
if (vlan_id)
|
||||
op = (op == QLCNIC_MAC_ADD || op == QLCNIC_MAC_VLAN_ADD) ?
|
||||
QLCNIC_MAC_VLAN_ADD : QLCNIC_MAC_VLAN_DEL;
|
||||
|
||||
cmd.req.arg[1] = op | (1 << 8);
|
||||
cmd->req.arg[1] = op | (1 << 8);
|
||||
qlcnic_83xx_set_interface_id_macaddr(adapter, &temp);
|
||||
cmd.req.arg[1] |= temp;
|
||||
cmd->req.arg[1] |= temp;
|
||||
mv.vlan = vlan_id;
|
||||
mv.mac_addr0 = addr[0];
|
||||
mv.mac_addr1 = addr[1];
|
||||
|
@ -1977,14 +1978,15 @@ int qlcnic_83xx_sre_macaddr_change(struct qlcnic_adapter *adapter, u8 *addr,
|
|||
mv.mac_addr3 = addr[3];
|
||||
mv.mac_addr4 = addr[4];
|
||||
mv.mac_addr5 = addr[5];
|
||||
buf = &cmd.req.arg[2];
|
||||
buf = &cmd->req.arg[2];
|
||||
memcpy(buf, &mv, sizeof(struct qlcnic_macvlan_mbx));
|
||||
err = qlcnic_issue_cmd(adapter, &cmd);
|
||||
if (err)
|
||||
dev_err(&adapter->pdev->dev,
|
||||
"MAC-VLAN %s to CAM failed, err=%d.\n",
|
||||
((op == 1) ? "add " : "delete "), err);
|
||||
qlcnic_free_mbx_args(&cmd);
|
||||
err = qlcnic_issue_cmd(adapter, cmd);
|
||||
if (!err)
|
||||
return err;
|
||||
|
||||
qlcnic_free_mbx_args(cmd);
|
||||
out:
|
||||
kfree(cmd);
|
||||
return err;
|
||||
}
|
||||
|
||||
|
@ -2093,10 +2095,12 @@ static void qlcnic_83xx_handle_link_aen(struct qlcnic_adapter *adapter,
|
|||
irqreturn_t qlcnic_83xx_handle_aen(int irq, void *data)
|
||||
{
|
||||
struct qlcnic_adapter *adapter = data;
|
||||
unsigned long flags;
|
||||
struct qlcnic_mailbox *mbx;
|
||||
u32 mask, resp, event;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&adapter->ahw->mbx_lock, flags);
|
||||
mbx = adapter->ahw->mailbox;
|
||||
spin_lock_irqsave(&mbx->aen_lock, flags);
|
||||
resp = QLCRDX(adapter->ahw, QLCNIC_FW_MBX_CTRL);
|
||||
if (!(resp & QLCNIC_SET_OWNER))
|
||||
goto out;
|
||||
|
@ -2104,11 +2108,13 @@ irqreturn_t qlcnic_83xx_handle_aen(int irq, void *data)
|
|||
event = readl(QLCNIC_MBX_FW(adapter->ahw, 0));
|
||||
if (event & QLCNIC_MBX_ASYNC_EVENT)
|
||||
__qlcnic_83xx_process_aen(adapter);
|
||||
else
|
||||
qlcnic_83xx_notify_mbx_response(mbx);
|
||||
|
||||
out:
|
||||
mask = QLCRDX(adapter->ahw, QLCNIC_DEF_INT_MASK);
|
||||
writel(0, adapter->ahw->pci_base0 + mask);
|
||||
spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
|
||||
|
||||
spin_unlock_irqrestore(&mbx->aen_lock, flags);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
@ -3446,3 +3452,300 @@ int qlcnic_83xx_resume(struct qlcnic_adapter *adapter)
|
|||
idc->delay);
|
||||
return err;
|
||||
}
|
||||
|
||||
void qlcnic_83xx_reinit_mbx_work(struct qlcnic_mailbox *mbx)
|
||||
{
|
||||
INIT_COMPLETION(mbx->completion);
|
||||
set_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
}
|
||||
|
||||
void qlcnic_83xx_free_mailbox(struct qlcnic_mailbox *mbx)
|
||||
{
|
||||
destroy_workqueue(mbx->work_q);
|
||||
kfree(mbx);
|
||||
}
|
||||
|
||||
static inline void
|
||||
qlcnic_83xx_notify_cmd_completion(struct qlcnic_adapter *adapter,
|
||||
struct qlcnic_cmd_args *cmd)
|
||||
{
|
||||
atomic_set(&cmd->rsp_status, QLC_83XX_MBX_RESPONSE_ARRIVED);
|
||||
|
||||
if (cmd->type == QLC_83XX_MBX_CMD_NO_WAIT) {
|
||||
qlcnic_free_mbx_args(cmd);
|
||||
kfree(cmd);
|
||||
return;
|
||||
}
|
||||
complete(&cmd->completion);
|
||||
}
|
||||
|
||||
static inline void qlcnic_83xx_flush_mbx_queue(struct qlcnic_adapter *adapter)
|
||||
{
|
||||
struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
|
||||
struct list_head *head = &mbx->cmd_q;
|
||||
struct qlcnic_cmd_args *cmd = NULL;
|
||||
|
||||
spin_lock(&mbx->queue_lock);
|
||||
|
||||
while (!list_empty(head)) {
|
||||
cmd = list_entry(head->next, struct qlcnic_cmd_args, list);
|
||||
list_del(&cmd->list);
|
||||
mbx->num_cmds--;
|
||||
qlcnic_83xx_notify_cmd_completion(adapter, cmd);
|
||||
}
|
||||
|
||||
spin_unlock(&mbx->queue_lock);
|
||||
}
|
||||
|
||||
static inline int qlcnic_83xx_check_mbx_status(struct qlcnic_adapter *adapter)
|
||||
{
|
||||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
struct qlcnic_mailbox *mbx = ahw->mailbox;
|
||||
u32 host_mbx_ctrl;
|
||||
|
||||
if (!test_bit(QLC_83XX_MBX_READY, &mbx->status))
|
||||
return -EBUSY;
|
||||
|
||||
host_mbx_ctrl = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
|
||||
if (host_mbx_ctrl) {
|
||||
ahw->idc.collect_dump = 1;
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void qlcnic_83xx_signal_mbx_cmd(struct qlcnic_adapter *adapter,
|
||||
u8 issue_cmd)
|
||||
{
|
||||
if (issue_cmd)
|
||||
QLCWRX(adapter->ahw, QLCNIC_HOST_MBX_CTRL, QLCNIC_SET_OWNER);
|
||||
else
|
||||
QLCWRX(adapter->ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
|
||||
}
|
||||
|
||||
static inline void qlcnic_83xx_dequeue_mbx_cmd(struct qlcnic_adapter *adapter,
|
||||
struct qlcnic_cmd_args *cmd)
|
||||
{
|
||||
struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
|
||||
|
||||
spin_lock(&mbx->queue_lock);
|
||||
|
||||
list_del(&cmd->list);
|
||||
mbx->num_cmds--;
|
||||
|
||||
spin_unlock(&mbx->queue_lock);
|
||||
|
||||
qlcnic_83xx_notify_cmd_completion(adapter, cmd);
|
||||
}
|
||||
|
||||
static void qlcnic_83xx_encode_mbx_cmd(struct qlcnic_adapter *adapter,
|
||||
struct qlcnic_cmd_args *cmd)
|
||||
{
|
||||
u32 mbx_cmd, fw_hal_version, hdr_size, total_size, tmp;
|
||||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
int i, j;
|
||||
|
||||
if (cmd->op_type != QLC_83XX_MBX_POST_BC_OP) {
|
||||
mbx_cmd = cmd->req.arg[0];
|
||||
writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0));
|
||||
for (i = 1; i < cmd->req.num; i++)
|
||||
writel(cmd->req.arg[i], QLCNIC_MBX_HOST(ahw, i));
|
||||
} else {
|
||||
fw_hal_version = ahw->fw_hal_version;
|
||||
hdr_size = sizeof(struct qlcnic_bc_hdr) / sizeof(u32);
|
||||
total_size = cmd->pay_size + hdr_size;
|
||||
tmp = QLCNIC_CMD_BC_EVENT_SETUP | total_size << 16;
|
||||
mbx_cmd = tmp | fw_hal_version << 29;
|
||||
writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0));
|
||||
|
||||
/* Back channel specific operations bits */
|
||||
mbx_cmd = 0x1 | 1 << 4;
|
||||
|
||||
if (qlcnic_sriov_pf_check(adapter))
|
||||
mbx_cmd |= cmd->func_num << 5;
|
||||
|
||||
writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 1));
|
||||
|
||||
for (i = 2, j = 0; j < hdr_size; i++, j++)
|
||||
writel(*(cmd->hdr++), QLCNIC_MBX_HOST(ahw, i));
|
||||
for (j = 0; j < cmd->pay_size; j++, i++)
|
||||
writel(*(cmd->pay++), QLCNIC_MBX_HOST(ahw, i));
|
||||
}
|
||||
}
|
||||
|
||||
void qlcnic_83xx_detach_mailbox_work(struct qlcnic_adapter *adapter)
|
||||
{
|
||||
struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
|
||||
|
||||
clear_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
complete(&mbx->completion);
|
||||
cancel_work_sync(&mbx->work);
|
||||
flush_workqueue(mbx->work_q);
|
||||
qlcnic_83xx_flush_mbx_queue(adapter);
|
||||
}
|
||||
|
||||
static inline int qlcnic_83xx_enqueue_mbx_cmd(struct qlcnic_adapter *adapter,
|
||||
struct qlcnic_cmd_args *cmd,
|
||||
unsigned long *timeout)
|
||||
{
|
||||
struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
|
||||
|
||||
if (test_bit(QLC_83XX_MBX_READY, &mbx->status)) {
|
||||
atomic_set(&cmd->rsp_status, QLC_83XX_MBX_RESPONSE_WAIT);
|
||||
init_completion(&cmd->completion);
|
||||
cmd->rsp_opcode = QLC_83XX_MBX_RESPONSE_UNKNOWN;
|
||||
|
||||
spin_lock(&mbx->queue_lock);
|
||||
|
||||
list_add_tail(&cmd->list, &mbx->cmd_q);
|
||||
mbx->num_cmds++;
|
||||
cmd->total_cmds = mbx->num_cmds;
|
||||
*timeout = cmd->total_cmds * QLC_83XX_MBX_TIMEOUT;
|
||||
queue_work(mbx->work_q, &mbx->work);
|
||||
|
||||
spin_unlock(&mbx->queue_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
static inline int qlcnic_83xx_check_mac_rcode(struct qlcnic_adapter *adapter,
|
||||
struct qlcnic_cmd_args *cmd)
|
||||
{
|
||||
u8 mac_cmd_rcode;
|
||||
u32 fw_data;
|
||||
|
||||
if (cmd->cmd_op == QLCNIC_CMD_CONFIG_MAC_VLAN) {
|
||||
fw_data = readl(QLCNIC_MBX_FW(adapter->ahw, 2));
|
||||
mac_cmd_rcode = (u8)fw_data;
|
||||
if (mac_cmd_rcode == QLC_83XX_NO_NIC_RESOURCE ||
|
||||
mac_cmd_rcode == QLC_83XX_MAC_PRESENT ||
|
||||
mac_cmd_rcode == QLC_83XX_MAC_ABSENT) {
|
||||
cmd->rsp_opcode = QLCNIC_RCODE_SUCCESS;
|
||||
return QLCNIC_RCODE_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static void qlcnic_83xx_decode_mbx_rsp(struct qlcnic_adapter *adapter,
|
||||
struct qlcnic_cmd_args *cmd)
|
||||
{
|
||||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
struct device *dev = &adapter->pdev->dev;
|
||||
u8 mbx_err_code;
|
||||
u32 fw_data;
|
||||
|
||||
fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
|
||||
mbx_err_code = QLCNIC_MBX_STATUS(fw_data);
|
||||
qlcnic_83xx_get_mbx_data(adapter, cmd);
|
||||
|
||||
switch (mbx_err_code) {
|
||||
case QLCNIC_MBX_RSP_OK:
|
||||
case QLCNIC_MBX_PORT_RSP_OK:
|
||||
cmd->rsp_opcode = QLCNIC_RCODE_SUCCESS;
|
||||
break;
|
||||
default:
|
||||
if (!qlcnic_83xx_check_mac_rcode(adapter, cmd))
|
||||
break;
|
||||
|
||||
dev_err(dev, "%s: Mailbox command failed, opcode=0x%x, cmd_type=0x%x, func=0x%x, op_mode=0x%x, error=0x%x\n",
|
||||
__func__, cmd->cmd_op, cmd->type, ahw->pci_func,
|
||||
ahw->op_mode, mbx_err_code);
|
||||
cmd->rsp_opcode = QLC_83XX_MBX_RESPONSE_FAILED;
|
||||
qlcnic_dump_mbx(adapter, cmd);
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static void qlcnic_83xx_mailbox_worker(struct work_struct *work)
|
||||
{
|
||||
struct qlcnic_mailbox *mbx = container_of(work, struct qlcnic_mailbox,
|
||||
work);
|
||||
struct qlcnic_adapter *adapter = mbx->adapter;
|
||||
struct qlcnic_mbx_ops *mbx_ops = mbx->ops;
|
||||
struct device *dev = &adapter->pdev->dev;
|
||||
atomic_t *rsp_status = &mbx->rsp_status;
|
||||
struct list_head *head = &mbx->cmd_q;
|
||||
struct qlcnic_hardware_context *ahw;
|
||||
struct qlcnic_cmd_args *cmd = NULL;
|
||||
|
||||
ahw = adapter->ahw;
|
||||
|
||||
while (true) {
|
||||
if (qlcnic_83xx_check_mbx_status(adapter))
|
||||
return;
|
||||
|
||||
atomic_set(rsp_status, QLC_83XX_MBX_RESPONSE_WAIT);
|
||||
|
||||
spin_lock(&mbx->queue_lock);
|
||||
|
||||
if (list_empty(head)) {
|
||||
spin_unlock(&mbx->queue_lock);
|
||||
return;
|
||||
}
|
||||
cmd = list_entry(head->next, struct qlcnic_cmd_args, list);
|
||||
|
||||
spin_unlock(&mbx->queue_lock);
|
||||
|
||||
mbx_ops->encode_cmd(adapter, cmd);
|
||||
mbx_ops->nofity_fw(adapter, QLC_83XX_MBX_REQUEST);
|
||||
|
||||
if (wait_for_completion_timeout(&mbx->completion,
|
||||
QLC_83XX_MBX_TIMEOUT)) {
|
||||
mbx_ops->decode_resp(adapter, cmd);
|
||||
mbx_ops->nofity_fw(adapter, QLC_83XX_MBX_COMPLETION);
|
||||
} else {
|
||||
dev_err(dev, "%s: Mailbox command timeout, opcode=0x%x, cmd_type=0x%x, func=0x%x, op_mode=0x%x\n",
|
||||
__func__, cmd->cmd_op, cmd->type, ahw->pci_func,
|
||||
ahw->op_mode);
|
||||
clear_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
qlcnic_83xx_idc_request_reset(adapter,
|
||||
QLCNIC_FORCE_FW_DUMP_KEY);
|
||||
cmd->rsp_opcode = QLCNIC_RCODE_TIMEOUT;
|
||||
}
|
||||
mbx_ops->dequeue_cmd(adapter, cmd);
|
||||
}
|
||||
}
|
||||
|
||||
static struct qlcnic_mbx_ops qlcnic_83xx_mbx_ops = {
|
||||
.enqueue_cmd = qlcnic_83xx_enqueue_mbx_cmd,
|
||||
.dequeue_cmd = qlcnic_83xx_dequeue_mbx_cmd,
|
||||
.decode_resp = qlcnic_83xx_decode_mbx_rsp,
|
||||
.encode_cmd = qlcnic_83xx_encode_mbx_cmd,
|
||||
.nofity_fw = qlcnic_83xx_signal_mbx_cmd,
|
||||
};
|
||||
|
||||
int qlcnic_83xx_init_mailbox_work(struct qlcnic_adapter *adapter)
|
||||
{
|
||||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
struct qlcnic_mailbox *mbx;
|
||||
|
||||
ahw->mailbox = kzalloc(sizeof(*mbx), GFP_KERNEL);
|
||||
if (!ahw->mailbox)
|
||||
return -ENOMEM;
|
||||
|
||||
mbx = ahw->mailbox;
|
||||
mbx->ops = &qlcnic_83xx_mbx_ops;
|
||||
mbx->adapter = adapter;
|
||||
|
||||
spin_lock_init(&mbx->queue_lock);
|
||||
spin_lock_init(&mbx->aen_lock);
|
||||
INIT_LIST_HEAD(&mbx->cmd_q);
|
||||
init_completion(&mbx->completion);
|
||||
|
||||
mbx->work_q = create_singlethread_workqueue("qlcnic_mailbox");
|
||||
if (mbx->work_q == NULL) {
|
||||
kfree(mbx);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
INIT_WORK(&mbx->work, qlcnic_83xx_mailbox_worker);
|
||||
set_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -89,6 +89,13 @@
|
|||
|
||||
#define QLC_83XX_MAX_RESET_SEQ_ENTRIES 16
|
||||
|
||||
#define QLC_83XX_MBX_POST_BC_OP 0x1
|
||||
#define QLC_83XX_MBX_COMPLETION 0x0
|
||||
#define QLC_83XX_MBX_REQUEST 0x1
|
||||
|
||||
#define QLC_83XX_MBX_TIMEOUT (5 * HZ)
|
||||
#define QLC_83XX_MBX_CMD_LOOP 5000000
|
||||
|
||||
/* status descriptor mailbox data
|
||||
* @phy_addr_{low|high}: physical address of buffer
|
||||
* @sds_ring_size: buffer size
|
||||
|
@ -449,6 +456,20 @@ enum qlcnic_83xx_states {
|
|||
#define QLC_83xx_FLASH_MAX_WAIT_USEC 100
|
||||
#define QLC_83XX_FLASH_LOCK_TIMEOUT 10000
|
||||
|
||||
enum qlc_83xx_mbx_cmd_type {
|
||||
QLC_83XX_MBX_CMD_WAIT = 0,
|
||||
QLC_83XX_MBX_CMD_NO_WAIT,
|
||||
QLC_83XX_MBX_CMD_BUSY_WAIT,
|
||||
};
|
||||
|
||||
enum qlc_83xx_mbx_response_states {
|
||||
QLC_83XX_MBX_RESPONSE_WAIT = 0,
|
||||
QLC_83XX_MBX_RESPONSE_ARRIVED,
|
||||
};
|
||||
|
||||
#define QLC_83XX_MBX_RESPONSE_FAILED 0x2
|
||||
#define QLC_83XX_MBX_RESPONSE_UNKNOWN 0x3
|
||||
|
||||
/* Additional registers in 83xx */
|
||||
enum qlc_83xx_ext_regs {
|
||||
QLCNIC_GLOBAL_RESET = 0,
|
||||
|
@ -498,7 +519,7 @@ enum qlc_83xx_ext_regs {
|
|||
|
||||
/* 83xx funcitons */
|
||||
int qlcnic_83xx_get_fw_version(struct qlcnic_adapter *);
|
||||
int qlcnic_83xx_mbx_op(struct qlcnic_adapter *, struct qlcnic_cmd_args *);
|
||||
int qlcnic_83xx_issue_cmd(struct qlcnic_adapter *, struct qlcnic_cmd_args *);
|
||||
int qlcnic_83xx_setup_intr(struct qlcnic_adapter *, u8);
|
||||
void qlcnic_83xx_get_func_no(struct qlcnic_adapter *);
|
||||
int qlcnic_83xx_cam_lock(struct qlcnic_adapter *);
|
||||
|
@ -551,7 +572,7 @@ void qlcnic_set_npar_data(struct qlcnic_adapter *, const struct qlcnic_info *,
|
|||
void qlcnic_83xx_config_intr_coal(struct qlcnic_adapter *);
|
||||
irqreturn_t qlcnic_83xx_handle_aen(int, void *);
|
||||
int qlcnic_83xx_get_port_info(struct qlcnic_adapter *);
|
||||
void qlcnic_83xx_enable_mbx_intrpt(struct qlcnic_adapter *);
|
||||
void qlcnic_83xx_enable_mbx_interrupt(struct qlcnic_adapter *);
|
||||
void qlcnic_83xx_disable_mbx_intr(struct qlcnic_adapter *);
|
||||
irqreturn_t qlcnic_83xx_clear_legacy_intr(struct qlcnic_adapter *);
|
||||
irqreturn_t qlcnic_83xx_intr(int, void *);
|
||||
|
@ -623,8 +644,6 @@ int qlcnic_83xx_set_led(struct net_device *, enum ethtool_phys_id_state);
|
|||
int qlcnic_83xx_flash_test(struct qlcnic_adapter *);
|
||||
int qlcnic_83xx_enable_flash_write(struct qlcnic_adapter *);
|
||||
int qlcnic_83xx_disable_flash_write(struct qlcnic_adapter *);
|
||||
u32 qlcnic_83xx_mac_rcode(struct qlcnic_adapter *);
|
||||
u32 qlcnic_83xx_mbx_poll(struct qlcnic_adapter *, u32 *);
|
||||
void qlcnic_83xx_enable_mbx_poll(struct qlcnic_adapter *);
|
||||
void qlcnic_83xx_disable_mbx_poll(struct qlcnic_adapter *);
|
||||
void qlcnic_83xx_set_mac_filter_count(struct qlcnic_adapter *);
|
||||
|
|
|
@ -399,6 +399,7 @@ static void qlcnic_83xx_idc_detach_driver(struct qlcnic_adapter *adapter)
|
|||
struct net_device *netdev = adapter->netdev;
|
||||
|
||||
netif_device_detach(netdev);
|
||||
qlcnic_83xx_detach_mailbox_work(adapter);
|
||||
|
||||
/* Disable mailbox interrupt */
|
||||
qlcnic_83xx_disable_mbx_intr(adapter);
|
||||
|
@ -610,6 +611,9 @@ int qlcnic_83xx_idc_reattach_driver(struct qlcnic_adapter *adapter)
|
|||
{
|
||||
int err;
|
||||
|
||||
qlcnic_83xx_reinit_mbx_work(adapter->ahw->mailbox);
|
||||
qlcnic_83xx_enable_mbx_interrupt(adapter);
|
||||
|
||||
/* register for NIC IDC AEN Events */
|
||||
qlcnic_83xx_register_nic_idc_func(adapter, 1);
|
||||
|
||||
|
@ -617,7 +621,7 @@ int qlcnic_83xx_idc_reattach_driver(struct qlcnic_adapter *adapter)
|
|||
if (err)
|
||||
return err;
|
||||
|
||||
qlcnic_83xx_enable_mbx_intrpt(adapter);
|
||||
qlcnic_83xx_enable_mbx_interrupt(adapter);
|
||||
|
||||
if (qlcnic_83xx_configure_opmode(adapter)) {
|
||||
qlcnic_83xx_idc_enter_failed_state(adapter, 1);
|
||||
|
@ -640,7 +644,6 @@ static void qlcnic_83xx_idc_update_idc_params(struct qlcnic_adapter *adapter)
|
|||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
|
||||
qlcnic_83xx_idc_update_drv_presence_reg(adapter, 1, 1);
|
||||
set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
|
||||
qlcnic_83xx_idc_update_audit_reg(adapter, 0, 1);
|
||||
set_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
|
||||
|
||||
|
@ -810,9 +813,10 @@ static int qlcnic_83xx_idc_init_state(struct qlcnic_adapter *adapter)
|
|||
**/
|
||||
static int qlcnic_83xx_idc_ready_state(struct qlcnic_adapter *adapter)
|
||||
{
|
||||
u32 val;
|
||||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
struct qlcnic_mailbox *mbx = ahw->mailbox;
|
||||
int ret = 0;
|
||||
u32 val;
|
||||
|
||||
/* Perform NIC configuration based ready state entry actions */
|
||||
if (ahw->idc.state_entry(adapter))
|
||||
|
@ -824,7 +828,7 @@ static int qlcnic_83xx_idc_ready_state(struct qlcnic_adapter *adapter)
|
|||
dev_err(&adapter->pdev->dev,
|
||||
"Error: device temperature %d above limits\n",
|
||||
adapter->ahw->temp);
|
||||
clear_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
|
||||
clear_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
set_bit(__QLCNIC_RESETTING, &adapter->state);
|
||||
qlcnic_83xx_idc_detach_driver(adapter);
|
||||
qlcnic_83xx_idc_enter_failed_state(adapter, 1);
|
||||
|
@ -837,7 +841,7 @@ static int qlcnic_83xx_idc_ready_state(struct qlcnic_adapter *adapter)
|
|||
if (ret) {
|
||||
adapter->flags |= QLCNIC_FW_HANG;
|
||||
if (!(val & QLC_83XX_IDC_DISABLE_FW_RESET_RECOVERY)) {
|
||||
clear_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
|
||||
clear_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
set_bit(__QLCNIC_RESETTING, &adapter->state);
|
||||
qlcnic_83xx_idc_enter_need_reset_state(adapter, 1);
|
||||
}
|
||||
|
@ -845,6 +849,8 @@ static int qlcnic_83xx_idc_ready_state(struct qlcnic_adapter *adapter)
|
|||
}
|
||||
|
||||
if ((val & QLC_83XX_IDC_GRACEFULL_RESET) || ahw->idc.collect_dump) {
|
||||
clear_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
|
||||
/* Move to need reset state and prepare for reset */
|
||||
qlcnic_83xx_idc_enter_need_reset_state(adapter, 1);
|
||||
return ret;
|
||||
|
@ -882,12 +888,13 @@ static int qlcnic_83xx_idc_ready_state(struct qlcnic_adapter *adapter)
|
|||
**/
|
||||
static int qlcnic_83xx_idc_need_reset_state(struct qlcnic_adapter *adapter)
|
||||
{
|
||||
struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
|
||||
int ret = 0;
|
||||
|
||||
if (adapter->ahw->idc.prev_state != QLC_83XX_IDC_DEV_NEED_RESET) {
|
||||
qlcnic_83xx_idc_update_audit_reg(adapter, 0, 1);
|
||||
set_bit(__QLCNIC_RESETTING, &adapter->state);
|
||||
clear_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
|
||||
clear_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
if (adapter->ahw->nic_mode == QLC_83XX_VIRTUAL_NIC_MODE)
|
||||
qlcnic_83xx_disable_vnic_mode(adapter, 1);
|
||||
|
||||
|
@ -1079,7 +1086,6 @@ static void qlcnic_83xx_setup_idc_parameters(struct qlcnic_adapter *adapter)
|
|||
adapter->ahw->idc.name = (char **)qlc_83xx_idc_states;
|
||||
|
||||
clear_bit(__QLCNIC_RESETTING, &adapter->state);
|
||||
set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
|
||||
set_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
|
||||
|
||||
/* Check if reset recovery is disabled */
|
||||
|
@ -1190,6 +1196,9 @@ void qlcnic_83xx_idc_request_reset(struct qlcnic_adapter *adapter, u32 key)
|
|||
{
|
||||
u32 val;
|
||||
|
||||
if (qlcnic_sriov_vf_check(adapter))
|
||||
return;
|
||||
|
||||
if (qlcnic_83xx_lock_driver(adapter)) {
|
||||
dev_err(&adapter->pdev->dev,
|
||||
"%s:failed, please retry\n", __func__);
|
||||
|
@ -2110,17 +2119,35 @@ static void qlcnic_83xx_clear_function_resources(struct qlcnic_adapter *adapter)
|
|||
int qlcnic_83xx_init(struct qlcnic_adapter *adapter, int pci_using_dac)
|
||||
{
|
||||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
int err = 0;
|
||||
|
||||
if (qlcnic_sriov_vf_check(adapter))
|
||||
return qlcnic_sriov_vf_init(adapter, pci_using_dac);
|
||||
ahw->msix_supported = !!qlcnic_use_msi_x;
|
||||
err = qlcnic_83xx_init_mailbox_work(adapter);
|
||||
if (err)
|
||||
goto exit;
|
||||
|
||||
if (qlcnic_83xx_check_hw_status(adapter))
|
||||
return -EIO;
|
||||
if (qlcnic_sriov_vf_check(adapter)) {
|
||||
err = qlcnic_sriov_vf_init(adapter, pci_using_dac);
|
||||
if (err)
|
||||
goto detach_mbx;
|
||||
else
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Initilaize 83xx mailbox spinlock */
|
||||
spin_lock_init(&ahw->mbx_lock);
|
||||
err = qlcnic_83xx_check_hw_status(adapter);
|
||||
if (err)
|
||||
goto detach_mbx;
|
||||
|
||||
err = qlcnic_setup_intr(adapter, 0);
|
||||
if (err) {
|
||||
dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
|
||||
goto disable_intr;
|
||||
}
|
||||
|
||||
err = qlcnic_83xx_setup_mbx_intr(adapter);
|
||||
if (err)
|
||||
goto disable_mbx_intr;
|
||||
|
||||
set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
|
||||
qlcnic_83xx_clear_function_resources(adapter);
|
||||
|
||||
/* register for NIC IDC AEN Events */
|
||||
|
@ -2129,21 +2156,35 @@ int qlcnic_83xx_init(struct qlcnic_adapter *adapter, int pci_using_dac)
|
|||
if (!qlcnic_83xx_read_flash_descriptor_table(adapter))
|
||||
qlcnic_83xx_read_flash_mfg_id(adapter);
|
||||
|
||||
if (qlcnic_83xx_idc_init(adapter))
|
||||
return -EIO;
|
||||
err = qlcnic_83xx_idc_init(adapter);
|
||||
if (err)
|
||||
goto disable_mbx_intr;
|
||||
|
||||
/* Configure default, SR-IOV or Virtual NIC mode of operation */
|
||||
if (qlcnic_83xx_configure_opmode(adapter))
|
||||
return -EIO;
|
||||
err = qlcnic_83xx_configure_opmode(adapter);
|
||||
if (err)
|
||||
goto disable_mbx_intr;
|
||||
|
||||
/* Perform operating mode specific initialization */
|
||||
if (adapter->nic_ops->init_driver(adapter))
|
||||
return -EIO;
|
||||
err = adapter->nic_ops->init_driver(adapter);
|
||||
if (err)
|
||||
goto disable_mbx_intr;
|
||||
|
||||
INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
|
||||
|
||||
/* Periodically monitor device status */
|
||||
qlcnic_83xx_idc_poll_dev_state(&adapter->fw_work.work);
|
||||
return 0;
|
||||
|
||||
return adapter->ahw->idc.err_code;
|
||||
disable_mbx_intr:
|
||||
qlcnic_83xx_free_mbx_intr(adapter);
|
||||
|
||||
disable_intr:
|
||||
qlcnic_teardown_intr(adapter);
|
||||
|
||||
detach_mbx:
|
||||
qlcnic_83xx_detach_mailbox_work(adapter);
|
||||
qlcnic_83xx_free_mailbox(ahw->mailbox);
|
||||
exit:
|
||||
return err;
|
||||
}
|
||||
|
|
|
@ -980,9 +980,9 @@ int qlcnic_loopback_test(struct net_device *netdev, u8 mode)
|
|||
msleep(500);
|
||||
qlcnic_process_rcv_ring_diag(sds_ring);
|
||||
if (loop++ > QLCNIC_ILB_MAX_RCV_LOOP) {
|
||||
netdev_info(netdev, "firmware didnt respond to loopback"
|
||||
" configure request\n");
|
||||
ret = -QLCNIC_FW_NOT_RESPOND;
|
||||
netdev_info(netdev,
|
||||
"Firmware didn't sent link up event to loopback request\n");
|
||||
ret = -ETIMEDOUT;
|
||||
goto free_res;
|
||||
} else if (adapter->ahw->diag_cnt) {
|
||||
ret = adapter->ahw->diag_cnt;
|
||||
|
|
|
@ -919,17 +919,17 @@ static void qlcnic_handle_fw_message(int desc_cnt, int index,
|
|||
break;
|
||||
case 1:
|
||||
dev_info(dev, "loopback already in progress\n");
|
||||
adapter->ahw->diag_cnt = -QLCNIC_TEST_IN_PROGRESS;
|
||||
adapter->ahw->diag_cnt = -EINPROGRESS;
|
||||
break;
|
||||
case 2:
|
||||
dev_info(dev, "loopback cable is not connected\n");
|
||||
adapter->ahw->diag_cnt = -QLCNIC_LB_CABLE_NOT_CONN;
|
||||
adapter->ahw->diag_cnt = -ENODEV;
|
||||
break;
|
||||
default:
|
||||
dev_info(dev,
|
||||
"loopback configure request failed, err %x\n",
|
||||
ret);
|
||||
adapter->ahw->diag_cnt = -QLCNIC_UNDEFINED_ERROR;
|
||||
adapter->ahw->diag_cnt = -EIO;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
|
|
@ -2141,16 +2141,12 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
dev_warn(&pdev->dev,
|
||||
"83xx adapter do not support MSI interrupts\n");
|
||||
|
||||
if (qlcnic_82xx_check(adapter)) {
|
||||
err = qlcnic_setup_intr(adapter, 0);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Failed to setup interrupt\n");
|
||||
goto err_out_disable_msi;
|
||||
}
|
||||
|
||||
if (qlcnic_83xx_check(adapter)) {
|
||||
err = qlcnic_83xx_setup_mbx_intr(adapter);
|
||||
if (err)
|
||||
goto err_out_disable_msi;
|
||||
}
|
||||
|
||||
err = qlcnic_get_act_pci_func(adapter);
|
||||
|
@ -2237,9 +2233,11 @@ static void qlcnic_remove(struct pci_dev *pdev)
|
|||
qlcnic_sriov_cleanup(adapter);
|
||||
|
||||
if (qlcnic_83xx_check(adapter)) {
|
||||
qlcnic_83xx_free_mbx_intr(adapter);
|
||||
qlcnic_83xx_register_nic_idc_func(adapter, 0);
|
||||
cancel_delayed_work_sync(&adapter->idc_aen_work);
|
||||
qlcnic_83xx_free_mbx_intr(adapter);
|
||||
qlcnic_83xx_detach_mailbox_work(adapter);
|
||||
qlcnic_83xx_free_mailbox(ahw->mailbox);
|
||||
}
|
||||
|
||||
qlcnic_detach(adapter);
|
||||
|
|
|
@ -33,7 +33,7 @@ static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
|
|||
static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
|
||||
static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
|
||||
static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
|
||||
static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *,
|
||||
static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *,
|
||||
struct qlcnic_cmd_args *);
|
||||
static void qlcnic_sriov_process_bc_cmd(struct work_struct *);
|
||||
|
||||
|
@ -45,7 +45,7 @@ static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
|
|||
.get_mac_address = qlcnic_83xx_get_mac_address,
|
||||
.setup_intr = qlcnic_83xx_setup_intr,
|
||||
.alloc_mbx_args = qlcnic_83xx_alloc_mbx_args,
|
||||
.mbx_cmd = qlcnic_sriov_vf_mbx_op,
|
||||
.mbx_cmd = qlcnic_sriov_issue_cmd,
|
||||
.get_func_no = qlcnic_83xx_get_func_no,
|
||||
.api_lock = qlcnic_83xx_cam_lock,
|
||||
.api_unlock = qlcnic_83xx_cam_unlock,
|
||||
|
@ -286,96 +286,38 @@ void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
|
|||
static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
|
||||
u32 *pay, u8 pci_func, u8 size)
|
||||
{
|
||||
u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd, val, wait_time = 0;
|
||||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
unsigned long flags;
|
||||
u16 opcode;
|
||||
u8 mbx_err_code;
|
||||
int i, j;
|
||||
struct qlcnic_mailbox *mbx = ahw->mailbox;
|
||||
struct qlcnic_cmd_args cmd;
|
||||
unsigned long timeout;
|
||||
int err;
|
||||
|
||||
opcode = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
|
||||
memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
|
||||
cmd.hdr = hdr;
|
||||
cmd.pay = pay;
|
||||
cmd.pay_size = size;
|
||||
cmd.func_num = pci_func;
|
||||
cmd.op_type = QLC_83XX_MBX_POST_BC_OP;
|
||||
cmd.cmd_op = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
|
||||
|
||||
if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
|
||||
dev_info(&adapter->pdev->dev,
|
||||
"Mailbox cmd attempted, 0x%x\n", opcode);
|
||||
dev_info(&adapter->pdev->dev, "Mailbox detached\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&ahw->mbx_lock, flags);
|
||||
|
||||
mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
|
||||
if (mbx_val) {
|
||||
QLCDB(adapter, DRV, "Mailbox cmd attempted, 0x%x\n", opcode);
|
||||
spin_unlock_irqrestore(&ahw->mbx_lock, flags);
|
||||
return QLCNIC_RCODE_TIMEOUT;
|
||||
}
|
||||
/* Fill in mailbox registers */
|
||||
val = size + (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
|
||||
mbx_cmd = 0x31 | (val << 16) | (adapter->ahw->fw_hal_version << 29);
|
||||
|
||||
writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0));
|
||||
mbx_cmd = 0x1 | (1 << 4);
|
||||
|
||||
if (qlcnic_sriov_pf_check(adapter))
|
||||
mbx_cmd |= (pci_func << 5);
|
||||
|
||||
writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 1));
|
||||
for (i = 2, j = 0; j < (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
|
||||
i++, j++) {
|
||||
writel(*(hdr++), QLCNIC_MBX_HOST(ahw, i));
|
||||
}
|
||||
for (j = 0; j < size; j++, i++)
|
||||
writel(*(pay++), QLCNIC_MBX_HOST(ahw, i));
|
||||
|
||||
/* Signal FW about the impending command */
|
||||
QLCWRX(ahw, QLCNIC_HOST_MBX_CTRL, QLCNIC_SET_OWNER);
|
||||
|
||||
/* Waiting for the mailbox cmd to complete and while waiting here
|
||||
* some AEN might arrive. If more than 5 seconds expire we can
|
||||
* assume something is wrong.
|
||||
*/
|
||||
poll:
|
||||
rsp = qlcnic_83xx_mbx_poll(adapter, &wait_time);
|
||||
if (rsp != QLCNIC_RCODE_TIMEOUT) {
|
||||
/* Get the FW response data */
|
||||
fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
|
||||
if (fw_data & QLCNIC_MBX_ASYNC_EVENT) {
|
||||
__qlcnic_83xx_process_aen(adapter);
|
||||
goto poll;
|
||||
}
|
||||
mbx_err_code = QLCNIC_MBX_STATUS(fw_data);
|
||||
rsp_num = QLCNIC_MBX_NUM_REGS(fw_data);
|
||||
opcode = QLCNIC_MBX_RSP(fw_data);
|
||||
|
||||
switch (mbx_err_code) {
|
||||
case QLCNIC_MBX_RSP_OK:
|
||||
case QLCNIC_MBX_PORT_RSP_OK:
|
||||
rsp = QLCNIC_RCODE_SUCCESS;
|
||||
break;
|
||||
default:
|
||||
if (opcode == QLCNIC_CMD_CONFIG_MAC_VLAN) {
|
||||
rsp = qlcnic_83xx_mac_rcode(adapter);
|
||||
if (!rsp)
|
||||
goto out;
|
||||
}
|
||||
err = mbx->ops->enqueue_cmd(adapter, &cmd, &timeout);
|
||||
if (err) {
|
||||
dev_err(&adapter->pdev->dev,
|
||||
"MBX command 0x%x failed with err:0x%x\n",
|
||||
opcode, mbx_err_code);
|
||||
rsp = mbx_err_code;
|
||||
break;
|
||||
}
|
||||
goto out;
|
||||
"%s: Mailbox not available, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
|
||||
__func__, cmd.cmd_op, cmd.type, ahw->pci_func,
|
||||
ahw->op_mode);
|
||||
return err;
|
||||
}
|
||||
|
||||
dev_err(&adapter->pdev->dev, "MBX command 0x%x timed out\n",
|
||||
QLCNIC_MBX_RSP(mbx_cmd));
|
||||
rsp = QLCNIC_RCODE_TIMEOUT;
|
||||
out:
|
||||
/* clear fw mbx control register */
|
||||
QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
|
||||
spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
|
||||
return rsp;
|
||||
if (!wait_for_completion_timeout(&cmd.completion, timeout)) {
|
||||
dev_err(&adapter->pdev->dev,
|
||||
"%s: Mailbox command timed out, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
|
||||
__func__, cmd.cmd_op, cmd.type, ahw->pci_func,
|
||||
ahw->op_mode);
|
||||
flush_workqueue(mbx->work_q);
|
||||
}
|
||||
|
||||
return cmd.rsp_opcode;
|
||||
}
|
||||
|
||||
static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
|
||||
|
@ -522,8 +464,8 @@ static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter)
|
|||
|
||||
static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
|
||||
{
|
||||
struct qlcnic_info nic_info;
|
||||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
struct qlcnic_info nic_info;
|
||||
int err;
|
||||
|
||||
err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
|
||||
|
@ -637,8 +579,6 @@ int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
|
|||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
int err;
|
||||
|
||||
spin_lock_init(&ahw->mbx_lock);
|
||||
set_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
|
||||
set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
|
||||
ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
|
||||
ahw->reset_context = 0;
|
||||
|
@ -1083,6 +1023,7 @@ static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
|
|||
if (test_bit(QLC_BC_VF_FLR, &vf->state))
|
||||
return;
|
||||
|
||||
memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
|
||||
trans = list_first_entry(&vf->rcv_act.wait_list,
|
||||
struct qlcnic_bc_trans, list);
|
||||
adapter = vf->adapter;
|
||||
|
@ -1232,6 +1173,7 @@ static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
|
|||
return;
|
||||
}
|
||||
|
||||
memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
|
||||
cmd_op = hdr->cmd_op;
|
||||
if (qlcnic_sriov_alloc_bc_trans(&trans))
|
||||
return;
|
||||
|
@ -1357,7 +1299,7 @@ int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
|
|||
if (enable)
|
||||
cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
|
||||
|
||||
err = qlcnic_83xx_mbx_op(adapter, &cmd);
|
||||
err = qlcnic_83xx_issue_cmd(adapter, &cmd);
|
||||
|
||||
if (err != QLCNIC_RCODE_SUCCESS) {
|
||||
dev_err(&adapter->pdev->dev,
|
||||
|
@ -1389,10 +1331,11 @@ static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
|
|||
return -EIO;
|
||||
}
|
||||
|
||||
static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *adapter,
|
||||
static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
|
||||
struct qlcnic_cmd_args *cmd)
|
||||
{
|
||||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
struct qlcnic_mailbox *mbx = ahw->mailbox;
|
||||
struct device *dev = &adapter->pdev->dev;
|
||||
struct qlcnic_bc_trans *trans;
|
||||
int err;
|
||||
|
@ -1409,7 +1352,7 @@ static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *adapter,
|
|||
goto cleanup_transaction;
|
||||
|
||||
retry:
|
||||
if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
|
||||
if (!test_bit(QLC_83XX_MBX_READY, &mbx->status)) {
|
||||
rsp = -EIO;
|
||||
QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
|
||||
QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
|
||||
|
@ -1452,7 +1395,7 @@ err_out:
|
|||
if (rsp == QLCNIC_RCODE_TIMEOUT) {
|
||||
ahw->reset_context = 1;
|
||||
adapter->need_fw_reset = 1;
|
||||
clear_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
|
||||
clear_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
}
|
||||
|
||||
cleanup_transaction:
|
||||
|
@ -1612,7 +1555,7 @@ static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
|
|||
int err;
|
||||
|
||||
set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
|
||||
qlcnic_83xx_enable_mbx_intrpt(adapter);
|
||||
qlcnic_83xx_enable_mbx_interrupt(adapter);
|
||||
|
||||
err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
|
||||
if (err)
|
||||
|
@ -1655,8 +1598,10 @@ static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
|
|||
struct net_device *netdev = adapter->netdev;
|
||||
u8 i, max_ints = ahw->num_msix - 1;
|
||||
|
||||
qlcnic_83xx_disable_mbx_intr(adapter);
|
||||
netif_device_detach(netdev);
|
||||
qlcnic_83xx_detach_mailbox_work(adapter);
|
||||
qlcnic_83xx_disable_mbx_intr(adapter);
|
||||
|
||||
if (netif_running(netdev))
|
||||
qlcnic_down(adapter, netdev);
|
||||
|
||||
|
@ -1700,6 +1645,7 @@ static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
|
|||
static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
|
||||
{
|
||||
struct qlcnic_hardware_context *ahw = adapter->ahw;
|
||||
struct qlcnic_mailbox *mbx = ahw->mailbox;
|
||||
struct device *dev = &adapter->pdev->dev;
|
||||
struct qlc_83xx_idc *idc = &ahw->idc;
|
||||
u8 func = ahw->pci_func;
|
||||
|
@ -1710,7 +1656,7 @@ static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
|
|||
/* Skip the context reset and check if FW is hung */
|
||||
if (adapter->reset_ctx_cnt < 3) {
|
||||
adapter->need_fw_reset = 1;
|
||||
clear_bit(QLC_83XX_MBX_READY, &idc->status);
|
||||
clear_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
dev_info(dev,
|
||||
"Resetting context, wait here to check if FW is in failed state\n");
|
||||
return 0;
|
||||
|
@ -1735,7 +1681,7 @@ static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
|
|||
__func__, adapter->reset_ctx_cnt, func);
|
||||
set_bit(__QLCNIC_RESETTING, &adapter->state);
|
||||
adapter->need_fw_reset = 1;
|
||||
clear_bit(QLC_83XX_MBX_READY, &idc->status);
|
||||
clear_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
qlcnic_sriov_vf_detach(adapter);
|
||||
adapter->need_fw_reset = 0;
|
||||
|
||||
|
@ -1785,6 +1731,7 @@ static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
|
|||
static int
|
||||
qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
|
||||
{
|
||||
struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
|
||||
struct qlc_83xx_idc *idc = &adapter->ahw->idc;
|
||||
|
||||
dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
|
||||
|
@ -1792,7 +1739,7 @@ qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
|
|||
set_bit(__QLCNIC_RESETTING, &adapter->state);
|
||||
adapter->tx_timeo_cnt = 0;
|
||||
adapter->reset_ctx_cnt = 0;
|
||||
clear_bit(QLC_83XX_MBX_READY, &idc->status);
|
||||
clear_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
qlcnic_sriov_vf_detach(adapter);
|
||||
}
|
||||
|
||||
|
@ -1801,6 +1748,7 @@ qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
|
|||
|
||||
static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
|
||||
{
|
||||
struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
|
||||
struct qlc_83xx_idc *idc = &adapter->ahw->idc;
|
||||
u8 func = adapter->ahw->pci_func;
|
||||
|
||||
|
@ -1810,7 +1758,7 @@ static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
|
|||
set_bit(__QLCNIC_RESETTING, &adapter->state);
|
||||
adapter->tx_timeo_cnt = 0;
|
||||
adapter->reset_ctx_cnt = 0;
|
||||
clear_bit(QLC_83XX_MBX_READY, &idc->status);
|
||||
clear_bit(QLC_83XX_MBX_READY, &mbx->status);
|
||||
qlcnic_sriov_vf_detach(adapter);
|
||||
}
|
||||
return 0;
|
||||
|
@ -1988,7 +1936,7 @@ int qlcnic_sriov_vf_resume(struct qlcnic_adapter *adapter)
|
|||
int err;
|
||||
|
||||
set_bit(QLC_83XX_MODULE_LOADED, &idc->status);
|
||||
qlcnic_83xx_enable_mbx_intrpt(adapter);
|
||||
qlcnic_83xx_enable_mbx_interrupt(adapter);
|
||||
err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
|
||||
if (err)
|
||||
return err;
|
||||
|
|
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