ARM: socfpga: dts: Remove hard coded clock-frequency property
The timers and uart can get their clock frequencies using the common clock driver. Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Коммит
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@ -571,24 +571,32 @@
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compatible = "snps,dw-apb-timer";
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interrupts = <0 167 4>;
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reg = <0xffc08000 0x1000>;
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clocks = <&l4_sp_clk>;
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clock-names = "timer";
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};
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timer1: timer1@ffc09000 {
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compatible = "snps,dw-apb-timer";
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interrupts = <0 168 4>;
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reg = <0xffc09000 0x1000>;
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clocks = <&l4_sp_clk>;
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clock-names = "timer";
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};
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timer2: timer2@ffd00000 {
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compatible = "snps,dw-apb-timer";
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interrupts = <0 169 4>;
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reg = <0xffd00000 0x1000>;
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clocks = <&osc1>;
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clock-names = "timer";
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};
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timer3: timer3@ffd01000 {
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compatible = "snps,dw-apb-timer";
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interrupts = <0 170 4>;
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reg = <0xffd01000 0x1000>;
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clocks = <&osc1>;
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clock-names = "timer";
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};
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uart0: serial0@ffc02000 {
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@ -597,6 +605,7 @@
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interrupts = <0 162 4>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&l4_sp_clk>;
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};
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uart1: serial1@ffc03000 {
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@ -605,6 +614,7 @@
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interrupts = <0 163 4>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&l4_sp_clk>;
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};
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rstmgr@ffd05000 {
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@ -38,32 +38,8 @@
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};
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};
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serial0@ffc02000 {
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clock-frequency = <100000000>;
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};
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serial1@ffc03000 {
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clock-frequency = <100000000>;
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};
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sysmgr@ffd08000 {
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cpu1-start-addr = <0xffd080c4>;
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};
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timer0@ffc08000 {
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clock-frequency = <100000000>;
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};
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timer1@ffc09000 {
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clock-frequency = <100000000>;
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};
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timer2@ffd00000 {
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clock-frequency = <25000000>;
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};
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timer3@ffd01000 {
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clock-frequency = <25000000>;
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};
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};
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};
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@ -45,30 +45,6 @@
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status = "okay";
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};
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timer0@ffc08000 {
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clock-frequency = <100000000>;
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};
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timer1@ffc09000 {
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clock-frequency = <100000000>;
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};
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timer2@ffd00000 {
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clock-frequency = <25000000>;
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};
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timer3@ffd01000 {
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clock-frequency = <25000000>;
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};
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serial0@ffc02000 {
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clock-frequency = <100000000>;
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};
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serial1@ffc03000 {
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clock-frequency = <100000000>;
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};
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sysmgr@ffd08000 {
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cpu1-start-addr = <0xffd080c4>;
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};
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