arm64: KVM: Consistently advance singlestep when emulating instructions
When we emulate a guest instruction, we don't advance the hardware singlestep state machine, and thus the guest will receive a software step exception after a next instruction which is not emulated by the host. We bodge around this in an ad-hoc fashion. Sometimes we explicitly check whether userspace requested a single step, and fake a debug exception from within the kernel. Other times, we advance the HW singlestep state rely on the HW to generate the exception for us. Thus, the observed step behaviour differs for host and guest. Let's make this simpler and consistent by always advancing the HW singlestep state machine when we skip an instruction. Thus we can rely on the hardware to generate the singlestep exception for us, and never need to explicitly check for an active-pending step, nor do we need to fake a debug exception from the guest. Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -296,11 +296,6 @@ static inline void kvm_arm_init_debug(void) {}
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static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {}
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static inline void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) {}
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static inline void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) {}
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static inline bool kvm_arm_handle_step_debug(struct kvm_vcpu *vcpu,
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struct kvm_run *run)
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{
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return false;
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}
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int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
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struct kvm_device_attr *attr);
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@ -24,6 +24,7 @@
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#include <linux/kvm_host.h>
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#include <asm/debug-monitors.h>
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#include <asm/esr.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_hyp.h>
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@ -147,14 +148,6 @@ static inline bool kvm_condition_valid(const struct kvm_vcpu *vcpu)
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return true;
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}
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static inline void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr)
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{
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if (vcpu_mode_is_32bit(vcpu))
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kvm_skip_instr32(vcpu, is_wide_instr);
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else
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*vcpu_pc(vcpu) += 4;
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}
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static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu)
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{
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*vcpu_cpsr(vcpu) |= PSR_AA32_T_BIT;
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@ -424,4 +417,30 @@ static inline unsigned long vcpu_data_host_to_guest(struct kvm_vcpu *vcpu,
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return data; /* Leave LE untouched */
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}
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static inline void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr)
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{
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if (vcpu_mode_is_32bit(vcpu))
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kvm_skip_instr32(vcpu, is_wide_instr);
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else
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*vcpu_pc(vcpu) += 4;
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/* advance the singlestep state machine */
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*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;
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}
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/*
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* Skip an instruction which has been emulated at hyp while most guest sysregs
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* are live.
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*/
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static inline void __hyp_text __kvm_skip_instr(struct kvm_vcpu *vcpu)
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{
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*vcpu_pc(vcpu) = read_sysreg_el2(elr);
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vcpu->arch.ctxt.gp_regs.regs.pstate = read_sysreg_el2(spsr);
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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write_sysreg_el2(vcpu->arch.ctxt.gp_regs.regs.pstate, spsr);
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write_sysreg_el2(*vcpu_pc(vcpu), elr);
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}
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#endif /* __ARM64_KVM_EMULATE_H__ */
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@ -445,7 +445,6 @@ void kvm_arm_init_debug(void);
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void kvm_arm_setup_debug(struct kvm_vcpu *vcpu);
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void kvm_arm_clear_debug(struct kvm_vcpu *vcpu);
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void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu);
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bool kvm_arm_handle_step_debug(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
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struct kvm_device_attr *attr);
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int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
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@ -236,24 +236,3 @@ void kvm_arm_clear_debug(struct kvm_vcpu *vcpu)
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}
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}
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}
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/*
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* After successfully emulating an instruction, we might want to
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* return to user space with a KVM_EXIT_DEBUG. We can only do this
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* once the emulation is complete, though, so for userspace emulations
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* we have to wait until we have re-entered KVM before calling this
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* helper.
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*
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* Return true (and set exit_reason) to return to userspace or false
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* if no further action is required.
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*/
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bool kvm_arm_handle_step_debug(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
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run->exit_reason = KVM_EXIT_DEBUG;
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run->debug.arch.hsr = ESR_ELx_EC_SOFTSTP_LOW << ESR_ELx_EC_SHIFT;
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return true;
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}
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return false;
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}
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@ -229,13 +229,6 @@ static int handle_trap_exceptions(struct kvm_vcpu *vcpu, struct kvm_run *run)
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handled = exit_handler(vcpu, run);
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}
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/*
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* kvm_arm_handle_step_debug() sets the exit_reason on the kvm_run
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* structure if we need to return to userspace.
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*/
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if (handled > 0 && kvm_arm_handle_step_debug(vcpu, run))
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handled = 0;
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return handled;
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}
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@ -269,11 +262,6 @@ int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
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case ARM_EXCEPTION_IRQ:
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return 1;
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case ARM_EXCEPTION_EL1_SERROR:
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/* We may still need to return for single-step */
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if (!(*vcpu_cpsr(vcpu) & DBG_SPSR_SS)
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&& kvm_arm_handle_step_debug(vcpu, run))
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return 0;
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else
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return 1;
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case ARM_EXCEPTION_TRAP:
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return handle_trap_exceptions(vcpu, run);
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@ -305,33 +305,6 @@ static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu)
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return true;
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}
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/* Skip an instruction which has been emulated. Returns true if
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* execution can continue or false if we need to exit hyp mode because
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* single-step was in effect.
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*/
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static bool __hyp_text __skip_instr(struct kvm_vcpu *vcpu)
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{
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*vcpu_pc(vcpu) = read_sysreg_el2(elr);
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if (vcpu_mode_is_32bit(vcpu)) {
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vcpu->arch.ctxt.gp_regs.regs.pstate = read_sysreg_el2(spsr);
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kvm_skip_instr32(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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write_sysreg_el2(vcpu->arch.ctxt.gp_regs.regs.pstate, spsr);
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} else {
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*vcpu_pc(vcpu) += 4;
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}
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write_sysreg_el2(*vcpu_pc(vcpu), elr);
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if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
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vcpu->arch.fault.esr_el2 =
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(ESR_ELx_EC_SOFTSTP_LOW << ESR_ELx_EC_SHIFT) | 0x22;
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return false;
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} else {
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return true;
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}
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}
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static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu)
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{
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struct user_fpsimd_state *host_fpsimd = vcpu->arch.host_fpsimd_state;
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@ -420,20 +393,12 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
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if (valid) {
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int ret = __vgic_v2_perform_cpuif_access(vcpu);
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if (ret == 1 && __skip_instr(vcpu))
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if (ret == 1)
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return true;
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if (ret == -1) {
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/* Promote an illegal access to an
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* SError. If we would be returning
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* due to single-step clear the SS
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* bit so handle_exit knows what to
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* do after dealing with the error.
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*/
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if (!__skip_instr(vcpu))
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*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;
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/* Promote an illegal access to an SError.*/
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if (ret == -1)
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*exit_code = ARM_EXCEPTION_EL1_SERROR;
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}
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goto exit;
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}
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@ -444,7 +409,7 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
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kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_CP15_32)) {
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int ret = __vgic_v3_perform_cpuif_access(vcpu);
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if (ret == 1 && __skip_instr(vcpu))
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if (ret == 1)
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return true;
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}
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@ -41,7 +41,7 @@ static bool __hyp_text __is_be(struct kvm_vcpu *vcpu)
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* Returns:
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* 1: GICV access successfully performed
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* 0: Not a GICV access
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* -1: Illegal GICV access
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* -1: Illegal GICV access successfully performed
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*/
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int __hyp_text __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu)
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{
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@ -61,12 +61,16 @@ int __hyp_text __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu)
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return 0;
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/* Reject anything but a 32bit access */
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if (kvm_vcpu_dabt_get_as(vcpu) != sizeof(u32))
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if (kvm_vcpu_dabt_get_as(vcpu) != sizeof(u32)) {
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__kvm_skip_instr(vcpu);
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return -1;
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}
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/* Not aligned? Don't bother */
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if (fault_ipa & 3)
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if (fault_ipa & 3) {
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__kvm_skip_instr(vcpu);
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return -1;
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}
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rd = kvm_vcpu_dabt_get_rd(vcpu);
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addr = hyp_symbol_addr(kvm_vgic_global_state)->vcpu_hyp_va;
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vcpu_set_reg(vcpu, rd, data);
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}
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__kvm_skip_instr(vcpu);
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return 1;
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}
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@ -674,8 +674,6 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
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ret = kvm_handle_mmio_return(vcpu, vcpu->run);
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if (ret)
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return ret;
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if (kvm_arm_handle_step_debug(vcpu, vcpu->run))
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return 0;
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}
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if (run->immediate_exit)
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@ -1012,8 +1012,10 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
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esr = kvm_vcpu_get_hsr(vcpu);
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if (vcpu_mode_is_32bit(vcpu)) {
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if (!kvm_condition_valid(vcpu))
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if (!kvm_condition_valid(vcpu)) {
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__kvm_skip_instr(vcpu);
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return 1;
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}
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sysreg = esr_cp15_to_sysreg(esr);
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} else {
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rt = kvm_vcpu_sys_get_rt(vcpu);
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fn(vcpu, vmcr, rt);
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__kvm_skip_instr(vcpu);
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return 1;
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}
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