ARM64: dts: meson: meson-gx: add the SAR ADC
Add the SAR ADC to meson-gxbb.dtsi and meson-gxl.dtsi. GXBB provides a 10-bit ADC while GXL and GXM provide a 12-bit ADC. Some boards use resistor ladder buttons connected through one of the ADC channels. On newer devices (GXL and GXM) some boards use pull-ups/downs to change the resistance (and thus the ADC value) on one of the ADC channels to indicate the board revision. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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@ -237,6 +237,14 @@
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status = "disabled";
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};
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saradc: adc@8680 {
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compatible = "amlogic,meson-saradc";
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reg = <0x0 0x8680 0x0 0x34>;
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#io-channel-cells = <1>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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pwm_ef: pwm@86c0 {
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compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x086c0 0x0 0x10>;
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@ -490,6 +490,16 @@
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clocks = <&clkc CLKID_I2C>;
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};
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&saradc {
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compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
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clocks = <&xtal>,
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<&clkc CLKID_SAR_ADC>,
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<&clkc CLKID_SANA>,
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<&clkc CLKID_SAR_ADC_CLK>,
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<&clkc CLKID_SAR_ADC_SEL>;
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clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
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};
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&sd_emmc_a {
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clocks = <&clkc CLKID_SD_EMMC_A>,
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<&xtal>,
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@ -347,6 +347,16 @@
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clocks = <&clkc CLKID_I2C>;
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};
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&saradc {
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compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
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clocks = <&xtal>,
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<&clkc CLKID_SAR_ADC>,
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<&clkc CLKID_SANA>,
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<&clkc CLKID_SAR_ADC_CLK>,
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<&clkc CLKID_SAR_ADC_SEL>;
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clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
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};
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&sd_emmc_a {
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clocks = <&clkc CLKID_SD_EMMC_A>,
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<&xtal>,
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@ -117,6 +117,10 @@
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};
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};
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&saradc {
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compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
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};
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&scpi_dvfs {
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clock-indices = <0 1>;
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clock-output-names = "vbig", "vlittle";
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