Merge branch 'linus' into perf/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Коммит
bd9c67ad96
|
@ -244,3 +244,11 @@ Description: read only
|
|||
Returns 1 if the psl timebase register is synchronized
|
||||
with the core timebase register, 0 otherwise.
|
||||
Users: https://github.com/ibm-capi/libcxl
|
||||
|
||||
What: /sys/class/cxl/<card>/tunneled_ops_supported
|
||||
Date: May 2018
|
||||
Contact: linuxppc-dev@lists.ozlabs.org
|
||||
Description: read only
|
||||
Returns 1 if tunneled operations are supported in capi mode,
|
||||
0 otherwise.
|
||||
Users: https://github.com/ibm-capi/libcxl
|
||||
|
|
|
@ -478,6 +478,7 @@ What: /sys/devices/system/cpu/vulnerabilities
|
|||
/sys/devices/system/cpu/vulnerabilities/meltdown
|
||||
/sys/devices/system/cpu/vulnerabilities/spectre_v1
|
||||
/sys/devices/system/cpu/vulnerabilities/spectre_v2
|
||||
/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
|
||||
Date: January 2018
|
||||
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
|
||||
Description: Information about CPU vulnerabilities
|
||||
|
|
|
@ -2680,6 +2680,9 @@
|
|||
allow data leaks with this option, which is equivalent
|
||||
to spectre_v2=off.
|
||||
|
||||
nospec_store_bypass_disable
|
||||
[HW] Disable all mitigations for the Speculative Store Bypass vulnerability
|
||||
|
||||
noxsave [BUGS=X86] Disables x86 extended register state save
|
||||
and restore using xsave. The kernel will fallback to
|
||||
enabling legacy floating-point and sse state.
|
||||
|
@ -4025,6 +4028,48 @@
|
|||
Not specifying this option is equivalent to
|
||||
spectre_v2=auto.
|
||||
|
||||
spec_store_bypass_disable=
|
||||
[HW] Control Speculative Store Bypass (SSB) Disable mitigation
|
||||
(Speculative Store Bypass vulnerability)
|
||||
|
||||
Certain CPUs are vulnerable to an exploit against a
|
||||
a common industry wide performance optimization known
|
||||
as "Speculative Store Bypass" in which recent stores
|
||||
to the same memory location may not be observed by
|
||||
later loads during speculative execution. The idea
|
||||
is that such stores are unlikely and that they can
|
||||
be detected prior to instruction retirement at the
|
||||
end of a particular speculation execution window.
|
||||
|
||||
In vulnerable processors, the speculatively forwarded
|
||||
store can be used in a cache side channel attack, for
|
||||
example to read memory to which the attacker does not
|
||||
directly have access (e.g. inside sandboxed code).
|
||||
|
||||
This parameter controls whether the Speculative Store
|
||||
Bypass optimization is used.
|
||||
|
||||
on - Unconditionally disable Speculative Store Bypass
|
||||
off - Unconditionally enable Speculative Store Bypass
|
||||
auto - Kernel detects whether the CPU model contains an
|
||||
implementation of Speculative Store Bypass and
|
||||
picks the most appropriate mitigation. If the
|
||||
CPU is not vulnerable, "off" is selected. If the
|
||||
CPU is vulnerable the default mitigation is
|
||||
architecture and Kconfig dependent. See below.
|
||||
prctl - Control Speculative Store Bypass per thread
|
||||
via prctl. Speculative Store Bypass is enabled
|
||||
for a process by default. The state of the control
|
||||
is inherited on fork.
|
||||
seccomp - Same as "prctl" above, but all seccomp threads
|
||||
will disable SSB unless they explicitly opt out.
|
||||
|
||||
Not specifying this option is equivalent to
|
||||
spec_store_bypass_disable=auto.
|
||||
|
||||
Default mitigations:
|
||||
X86: If CONFIG_SECCOMP=y "seccomp", otherwise "prctl"
|
||||
|
||||
spia_io_base= [HW,MTD]
|
||||
spia_fio_base=
|
||||
spia_pedr=
|
||||
|
|
|
@ -21,9 +21,10 @@ Required properties:
|
|||
- main controller clock (for both armada-375-pp2 and armada-7k-pp2)
|
||||
- GOP clock (for both armada-375-pp2 and armada-7k-pp2)
|
||||
- MG clock (only for armada-7k-pp2)
|
||||
- MG Core clock (only for armada-7k-pp2)
|
||||
- AXI clock (only for armada-7k-pp2)
|
||||
- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk"
|
||||
and "axi_clk" (the 2 latter only for armada-7k-pp2).
|
||||
- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk",
|
||||
"mg_core_clk" and "axi_clk" (the 3 latter only for armada-7k-pp2).
|
||||
|
||||
The ethernet ports are represented by subnodes. At least one port is
|
||||
required.
|
||||
|
@ -80,8 +81,8 @@ cpm_ethernet: ethernet@0 {
|
|||
compatible = "marvell,armada-7k-pp22";
|
||||
reg = <0x0 0x100000>, <0x129000 0xb000>;
|
||||
clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>,
|
||||
<&cpm_syscon0 1 5>, <&cpm_syscon0 1 18>;
|
||||
clock-names = "pp_clk", "gop_clk", "gp_clk", "axi_clk";
|
||||
<&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>;
|
||||
clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";
|
||||
|
||||
eth0: eth0 {
|
||||
interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
|
@ -57,6 +57,13 @@ KSZ9031:
|
|||
- txd2-skew-ps : Skew control of TX data 2 pad
|
||||
- txd3-skew-ps : Skew control of TX data 3 pad
|
||||
|
||||
- micrel,force-master:
|
||||
Boolean, force phy to master mode. Only set this option if the phy
|
||||
reference clock provided at CLK125_NDO pin is used as MAC reference
|
||||
clock because the clock jitter in slave mode is to high (errata#2).
|
||||
Attention: The link partner must be configurable as slave otherwise
|
||||
no link will be established.
|
||||
|
||||
Examples:
|
||||
|
||||
mdio {
|
||||
|
|
|
@ -19,6 +19,7 @@ place where this information is gathered.
|
|||
no_new_privs
|
||||
seccomp_filter
|
||||
unshare
|
||||
spec_ctrl
|
||||
|
||||
.. only:: subproject and html
|
||||
|
||||
|
|
|
@ -0,0 +1,94 @@
|
|||
===================
|
||||
Speculation Control
|
||||
===================
|
||||
|
||||
Quite some CPUs have speculation-related misfeatures which are in
|
||||
fact vulnerabilities causing data leaks in various forms even across
|
||||
privilege domains.
|
||||
|
||||
The kernel provides mitigation for such vulnerabilities in various
|
||||
forms. Some of these mitigations are compile-time configurable and some
|
||||
can be supplied on the kernel command line.
|
||||
|
||||
There is also a class of mitigations which are very expensive, but they can
|
||||
be restricted to a certain set of processes or tasks in controlled
|
||||
environments. The mechanism to control these mitigations is via
|
||||
:manpage:`prctl(2)`.
|
||||
|
||||
There are two prctl options which are related to this:
|
||||
|
||||
* PR_GET_SPECULATION_CTRL
|
||||
|
||||
* PR_SET_SPECULATION_CTRL
|
||||
|
||||
PR_GET_SPECULATION_CTRL
|
||||
-----------------------
|
||||
|
||||
PR_GET_SPECULATION_CTRL returns the state of the speculation misfeature
|
||||
which is selected with arg2 of prctl(2). The return value uses bits 0-3 with
|
||||
the following meaning:
|
||||
|
||||
==== ===================== ===================================================
|
||||
Bit Define Description
|
||||
==== ===================== ===================================================
|
||||
0 PR_SPEC_PRCTL Mitigation can be controlled per task by
|
||||
PR_SET_SPECULATION_CTRL.
|
||||
1 PR_SPEC_ENABLE The speculation feature is enabled, mitigation is
|
||||
disabled.
|
||||
2 PR_SPEC_DISABLE The speculation feature is disabled, mitigation is
|
||||
enabled.
|
||||
3 PR_SPEC_FORCE_DISABLE Same as PR_SPEC_DISABLE, but cannot be undone. A
|
||||
subsequent prctl(..., PR_SPEC_ENABLE) will fail.
|
||||
==== ===================== ===================================================
|
||||
|
||||
If all bits are 0 the CPU is not affected by the speculation misfeature.
|
||||
|
||||
If PR_SPEC_PRCTL is set, then the per-task control of the mitigation is
|
||||
available. If not set, prctl(PR_SET_SPECULATION_CTRL) for the speculation
|
||||
misfeature will fail.
|
||||
|
||||
PR_SET_SPECULATION_CTRL
|
||||
-----------------------
|
||||
|
||||
PR_SET_SPECULATION_CTRL allows to control the speculation misfeature, which
|
||||
is selected by arg2 of :manpage:`prctl(2)` per task. arg3 is used to hand
|
||||
in the control value, i.e. either PR_SPEC_ENABLE or PR_SPEC_DISABLE or
|
||||
PR_SPEC_FORCE_DISABLE.
|
||||
|
||||
Common error codes
|
||||
------------------
|
||||
======= =================================================================
|
||||
Value Meaning
|
||||
======= =================================================================
|
||||
EINVAL The prctl is not implemented by the architecture or unused
|
||||
prctl(2) arguments are not 0.
|
||||
|
||||
ENODEV arg2 is selecting a not supported speculation misfeature.
|
||||
======= =================================================================
|
||||
|
||||
PR_SET_SPECULATION_CTRL error codes
|
||||
-----------------------------------
|
||||
======= =================================================================
|
||||
Value Meaning
|
||||
======= =================================================================
|
||||
0 Success
|
||||
|
||||
ERANGE arg3 is incorrect, i.e. it's neither PR_SPEC_ENABLE nor
|
||||
PR_SPEC_DISABLE nor PR_SPEC_FORCE_DISABLE.
|
||||
|
||||
ENXIO Control of the selected speculation misfeature is not possible.
|
||||
See PR_GET_SPECULATION_CTRL.
|
||||
|
||||
EPERM Speculation was disabled with PR_SPEC_FORCE_DISABLE and caller
|
||||
tried to enable it again.
|
||||
======= =================================================================
|
||||
|
||||
Speculation misfeature controls
|
||||
-------------------------------
|
||||
- PR_SPEC_STORE_BYPASS: Speculative Store Bypass
|
||||
|
||||
Invocations:
|
||||
* prctl(PR_GET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, 0, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_ENABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_DISABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_FORCE_DISABLE, 0, 0);
|
|
@ -72,8 +72,8 @@ KVM_FEATURE_CLOCKSOURCE_STABLE_BIT || 24 || host will warn if no guest-side
|
|||
|
||||
flag || value || meaning
|
||||
==================================================================================
|
||||
KVM_HINTS_DEDICATED || 0 || guest checks this feature bit to
|
||||
|| || determine if there is vCPU pinning
|
||||
|| || and there is no vCPU over-commitment,
|
||||
KVM_HINTS_REALTIME || 0 || guest checks this feature bit to
|
||||
|| || determine that vCPUs are never
|
||||
|| || preempted for an unlimited time,
|
||||
|| || allowing optimizations
|
||||
----------------------------------------------------------------------------------
|
||||
|
|
17
MAINTAINERS
17
MAINTAINERS
|
@ -4309,7 +4309,7 @@ F: Documentation/driver-api/dma-buf.rst
|
|||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
|
||||
DMA GENERIC OFFLOAD ENGINE SUBSYSTEM
|
||||
M: Vinod Koul <vinod.koul@intel.com>
|
||||
M: Vinod Koul <vkoul@kernel.org>
|
||||
L: dmaengine@vger.kernel.org
|
||||
Q: https://patchwork.kernel.org/project/linux-dmaengine/list/
|
||||
S: Maintained
|
||||
|
@ -5388,7 +5388,6 @@ S: Maintained
|
|||
F: drivers/iommu/exynos-iommu.c
|
||||
|
||||
EZchip NPS platform support
|
||||
M: Elad Kanfi <eladkan@mellanox.com>
|
||||
M: Vineet Gupta <vgupta@synopsys.com>
|
||||
S: Supported
|
||||
F: arch/arc/plat-eznps
|
||||
|
@ -7698,6 +7697,7 @@ KERNEL SELFTEST FRAMEWORK
|
|||
M: Shuah Khan <shuah@kernel.org>
|
||||
L: linux-kselftest@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest.git
|
||||
Q: https://patchwork.kernel.org/project/linux-kselftest/list/
|
||||
S: Maintained
|
||||
F: tools/testing/selftests/
|
||||
F: Documentation/dev-tools/kselftest*
|
||||
|
@ -9020,7 +9020,6 @@ Q: http://patchwork.ozlabs.org/project/netdev/list/
|
|||
F: drivers/net/ethernet/mellanox/mlx5/core/en_*
|
||||
|
||||
MELLANOX ETHERNET INNOVA DRIVER
|
||||
M: Ilan Tayari <ilant@mellanox.com>
|
||||
R: Boris Pismenny <borisp@mellanox.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
|
@ -9030,7 +9029,6 @@ F: drivers/net/ethernet/mellanox/mlx5/core/fpga/*
|
|||
F: include/linux/mlx5/mlx5_ifc_fpga.h
|
||||
|
||||
MELLANOX ETHERNET INNOVA IPSEC DRIVER
|
||||
M: Ilan Tayari <ilant@mellanox.com>
|
||||
R: Boris Pismenny <borisp@mellanox.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
|
@ -9086,7 +9084,6 @@ F: include/uapi/rdma/mlx4-abi.h
|
|||
|
||||
MELLANOX MLX5 core VPI driver
|
||||
M: Saeed Mahameed <saeedm@mellanox.com>
|
||||
M: Matan Barak <matanb@mellanox.com>
|
||||
M: Leon Romanovsky <leonro@mellanox.com>
|
||||
L: netdev@vger.kernel.org
|
||||
L: linux-rdma@vger.kernel.org
|
||||
|
@ -9097,7 +9094,6 @@ F: drivers/net/ethernet/mellanox/mlx5/core/
|
|||
F: include/linux/mlx5/
|
||||
|
||||
MELLANOX MLX5 IB driver
|
||||
M: Matan Barak <matanb@mellanox.com>
|
||||
M: Leon Romanovsky <leonro@mellanox.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
W: http://www.mellanox.com
|
||||
|
@ -9831,7 +9827,6 @@ F: net/netfilter/xt_CONNSECMARK.c
|
|||
F: net/netfilter/xt_SECMARK.c
|
||||
|
||||
NETWORKING [TLS]
|
||||
M: Ilya Lesokhin <ilyal@mellanox.com>
|
||||
M: Aviad Yehezkel <aviadye@mellanox.com>
|
||||
M: Dave Watson <davejwatson@fb.com>
|
||||
L: netdev@vger.kernel.org
|
||||
|
@ -12220,7 +12215,7 @@ F: Documentation/s390/vfio-ccw.txt
|
|||
F: include/uapi/linux/vfio_ccw.h
|
||||
|
||||
S390 ZCRYPT DRIVER
|
||||
M: Harald Freudenberger <freude@de.ibm.com>
|
||||
M: Harald Freudenberger <freude@linux.ibm.com>
|
||||
L: linux-s390@vger.kernel.org
|
||||
W: http://www.ibm.com/developerworks/linux/linux390/
|
||||
S: Supported
|
||||
|
@ -13264,6 +13259,12 @@ M: Jan-Benedict Glaw <jbglaw@lug-owl.de>
|
|||
S: Maintained
|
||||
F: arch/alpha/kernel/srm_env.c
|
||||
|
||||
ST STM32 I2C/SMBUS DRIVER
|
||||
M: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/i2c/busses/i2c-stm32*
|
||||
|
||||
STABLE BRANCH
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
L: stable@vger.kernel.org
|
||||
|
|
2
Makefile
2
Makefile
|
@ -2,7 +2,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 17
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc5
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Merciless Moray
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -211,6 +211,7 @@ config ALPHA_EIGER
|
|||
config ALPHA_JENSEN
|
||||
bool "Jensen"
|
||||
depends on BROKEN
|
||||
select DMA_DIRECT_OPS
|
||||
help
|
||||
DEC PC 150 AXP (aka Jensen): This is a very old Digital system - one
|
||||
of the first-generation Alpha systems. A number of these systems
|
||||
|
|
|
@ -2,11 +2,15 @@
|
|||
#ifndef _ALPHA_DMA_MAPPING_H
|
||||
#define _ALPHA_DMA_MAPPING_H
|
||||
|
||||
extern const struct dma_map_ops *dma_ops;
|
||||
extern const struct dma_map_ops alpha_pci_ops;
|
||||
|
||||
static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
|
||||
{
|
||||
return dma_ops;
|
||||
#ifdef CONFIG_ALPHA_JENSEN
|
||||
return &dma_direct_ops;
|
||||
#else
|
||||
return &alpha_pci_ops;
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* _ALPHA_DMA_MAPPING_H */
|
||||
|
|
|
@ -37,20 +37,20 @@ unsigned int ioread32(void __iomem *addr)
|
|||
|
||||
void iowrite8(u8 b, void __iomem *addr)
|
||||
{
|
||||
IO_CONCAT(__IO_PREFIX,iowrite8)(b, addr);
|
||||
mb();
|
||||
IO_CONCAT(__IO_PREFIX,iowrite8)(b, addr);
|
||||
}
|
||||
|
||||
void iowrite16(u16 b, void __iomem *addr)
|
||||
{
|
||||
IO_CONCAT(__IO_PREFIX,iowrite16)(b, addr);
|
||||
mb();
|
||||
IO_CONCAT(__IO_PREFIX,iowrite16)(b, addr);
|
||||
}
|
||||
|
||||
void iowrite32(u32 b, void __iomem *addr)
|
||||
{
|
||||
IO_CONCAT(__IO_PREFIX,iowrite32)(b, addr);
|
||||
mb();
|
||||
IO_CONCAT(__IO_PREFIX,iowrite32)(b, addr);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(ioread8);
|
||||
|
@ -176,26 +176,26 @@ u64 readq(const volatile void __iomem *addr)
|
|||
|
||||
void writeb(u8 b, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writeb(b, addr);
|
||||
mb();
|
||||
__raw_writeb(b, addr);
|
||||
}
|
||||
|
||||
void writew(u16 b, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writew(b, addr);
|
||||
mb();
|
||||
__raw_writew(b, addr);
|
||||
}
|
||||
|
||||
void writel(u32 b, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writel(b, addr);
|
||||
mb();
|
||||
__raw_writel(b, addr);
|
||||
}
|
||||
|
||||
void writeq(u64 b, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writeq(b, addr);
|
||||
mb();
|
||||
__raw_writeq(b, addr);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(readb);
|
||||
|
|
|
@ -102,36 +102,3 @@ SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,
|
|||
else
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static void *alpha_noop_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t gfp,
|
||||
unsigned long attrs)
|
||||
{
|
||||
void *ret;
|
||||
|
||||
if (!dev || *dev->dma_mask >= 0xffffffffUL)
|
||||
gfp &= ~GFP_DMA;
|
||||
ret = (void *)__get_free_pages(gfp, get_order(size));
|
||||
if (ret) {
|
||||
memset(ret, 0, size);
|
||||
*dma_handle = virt_to_phys(ret);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int alpha_noop_supported(struct device *dev, u64 mask)
|
||||
{
|
||||
return mask < 0x00ffffffUL ? 0 : 1;
|
||||
}
|
||||
|
||||
const struct dma_map_ops alpha_noop_ops = {
|
||||
.alloc = alpha_noop_alloc_coherent,
|
||||
.free = dma_noop_free_coherent,
|
||||
.map_page = dma_noop_map_page,
|
||||
.map_sg = dma_noop_map_sg,
|
||||
.mapping_error = dma_noop_mapping_error,
|
||||
.dma_supported = alpha_noop_supported,
|
||||
};
|
||||
|
||||
const struct dma_map_ops *dma_ops = &alpha_noop_ops;
|
||||
EXPORT_SYMBOL(dma_ops);
|
||||
|
|
|
@ -950,6 +950,4 @@ const struct dma_map_ops alpha_pci_ops = {
|
|||
.mapping_error = alpha_pci_mapping_error,
|
||||
.dma_supported = alpha_pci_supported,
|
||||
};
|
||||
|
||||
const struct dma_map_ops *dma_ops = &alpha_pci_ops;
|
||||
EXPORT_SYMBOL(dma_ops);
|
||||
EXPORT_SYMBOL(alpha_pci_ops);
|
||||
|
|
|
@ -117,11 +117,9 @@ ccflags-y := -fpic -mno-single-pic-base -fno-builtin -I$(obj)
|
|||
asflags-y := -DZIMAGE
|
||||
|
||||
# Supply kernel BSS size to the decompressor via a linker symbol.
|
||||
KBSS_SZ = $(shell $(CROSS_COMPILE)nm $(obj)/../../../../vmlinux | \
|
||||
perl -e 'while (<>) { \
|
||||
$$bss_start=hex($$1) if /^([[:xdigit:]]+) B __bss_start$$/; \
|
||||
$$bss_end=hex($$1) if /^([[:xdigit:]]+) B __bss_stop$$/; \
|
||||
}; printf "%d\n", $$bss_end - $$bss_start;')
|
||||
KBSS_SZ = $(shell echo $$(($$($(CROSS_COMPILE)nm $(obj)/../../../../vmlinux | \
|
||||
sed -n -e 's/^\([^ ]*\) [AB] __bss_start$$/-0x\1/p' \
|
||||
-e 's/^\([^ ]*\) [AB] __bss_stop$$/+0x\1/p') )) )
|
||||
LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ)
|
||||
# Supply ZRELADDR to the decompressor via a linker symbol.
|
||||
ifneq ($(CONFIG_AUTO_ZRELADDR),y)
|
||||
|
|
|
@ -29,19 +29,19 @@
|
|||
#if defined(CONFIG_DEBUG_ICEDCC)
|
||||
|
||||
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
|
||||
.macro loadsp, rb, tmp
|
||||
.macro loadsp, rb, tmp1, tmp2
|
||||
.endm
|
||||
.macro writeb, ch, rb
|
||||
mcr p14, 0, \ch, c0, c5, 0
|
||||
.endm
|
||||
#elif defined(CONFIG_CPU_XSCALE)
|
||||
.macro loadsp, rb, tmp
|
||||
.macro loadsp, rb, tmp1, tmp2
|
||||
.endm
|
||||
.macro writeb, ch, rb
|
||||
mcr p14, 0, \ch, c8, c0, 0
|
||||
.endm
|
||||
#else
|
||||
.macro loadsp, rb, tmp
|
||||
.macro loadsp, rb, tmp1, tmp2
|
||||
.endm
|
||||
.macro writeb, ch, rb
|
||||
mcr p14, 0, \ch, c1, c0, 0
|
||||
|
@ -57,7 +57,7 @@
|
|||
.endm
|
||||
|
||||
#if defined(CONFIG_ARCH_SA1100)
|
||||
.macro loadsp, rb, tmp
|
||||
.macro loadsp, rb, tmp1, tmp2
|
||||
mov \rb, #0x80000000 @ physical base address
|
||||
#ifdef CONFIG_DEBUG_LL_SER3
|
||||
add \rb, \rb, #0x00050000 @ Ser3
|
||||
|
@ -66,8 +66,8 @@
|
|||
#endif
|
||||
.endm
|
||||
#else
|
||||
.macro loadsp, rb, tmp
|
||||
addruart \rb, \tmp
|
||||
.macro loadsp, rb, tmp1, tmp2
|
||||
addruart \rb, \tmp1, \tmp2
|
||||
.endm
|
||||
#endif
|
||||
#endif
|
||||
|
@ -561,8 +561,6 @@ not_relocated: mov r0, #0
|
|||
bl decompress_kernel
|
||||
bl cache_clean_flush
|
||||
bl cache_off
|
||||
mov r1, r7 @ restore architecture number
|
||||
mov r2, r8 @ restore atags pointer
|
||||
|
||||
#ifdef CONFIG_ARM_VIRT_EXT
|
||||
mrs r0, spsr @ Get saved CPU boot mode
|
||||
|
@ -1297,7 +1295,7 @@ phex: adr r3, phexbuf
|
|||
b 1b
|
||||
|
||||
@ puts corrupts {r0, r1, r2, r3}
|
||||
puts: loadsp r3, r1
|
||||
puts: loadsp r3, r2, r1
|
||||
1: ldrb r2, [r0], #1
|
||||
teq r2, #0
|
||||
moveq pc, lr
|
||||
|
@ -1314,8 +1312,8 @@ puts: loadsp r3, r1
|
|||
@ putc corrupts {r0, r1, r2, r3}
|
||||
putc:
|
||||
mov r2, r0
|
||||
loadsp r3, r1, r0
|
||||
mov r0, #0
|
||||
loadsp r3, r1
|
||||
b 2b
|
||||
|
||||
@ memdump corrupts {r0, r1, r2, r3, r10, r11, r12, lr}
|
||||
|
@ -1365,6 +1363,8 @@ __hyp_reentry_vectors:
|
|||
|
||||
__enter_kernel:
|
||||
mov r0, #0 @ must be 0
|
||||
mov r1, r7 @ restore architecture number
|
||||
mov r2, r8 @ restore atags pointer
|
||||
ARM( mov pc, r4 ) @ call kernel
|
||||
M_CLASS( add r4, r4, #1 ) @ enter in Thumb mode for M class
|
||||
THUMB( bx r4 ) @ entry point is always ARM for A/R classes
|
||||
|
|
|
@ -69,7 +69,7 @@
|
|||
timer@20200 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0x20200 0x100>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&periph_clk>;
|
||||
};
|
||||
|
||||
|
|
|
@ -21,8 +21,8 @@
|
|||
stdout-path = "serial2:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
memory@c0000000 {
|
||||
/* 128 MB DDR2 SDRAM @ 0xc0000000 */
|
||||
reg = <0xc0000000 0x08000000>;
|
||||
};
|
||||
|
||||
|
|
|
@ -7,10 +7,19 @@
|
|||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
aliases { };
|
||||
|
||||
memory@c0000000 {
|
||||
device_type = "memory";
|
||||
reg = <0xc0000000 0x0>;
|
||||
};
|
||||
|
||||
arm {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
@ -46,8 +55,6 @@
|
|||
pmx_core: pinmux@14120 {
|
||||
compatible = "pinctrl-single";
|
||||
reg = <0x14120 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <2>;
|
||||
pinctrl-single,bit-per-mux;
|
||||
pinctrl-single,register-width = <32>;
|
||||
|
|
|
@ -10,7 +10,7 @@
|
|||
|
||||
/ {
|
||||
model = "DM8148 EVM";
|
||||
compatible = "ti,dm8148-evm", "ti,dm8148";
|
||||
compatible = "ti,dm8148-evm", "ti,dm8148", "ti,dm814";
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
|
|
|
@ -9,7 +9,7 @@
|
|||
|
||||
/ {
|
||||
model = "HP t410 Smart Zero Client";
|
||||
compatible = "hp,t410", "ti,dm8148";
|
||||
compatible = "hp,t410", "ti,dm8148", "ti,dm814";
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
|
|
|
@ -10,7 +10,7 @@
|
|||
|
||||
/ {
|
||||
model = "DM8168 EVM";
|
||||
compatible = "ti,dm8168-evm", "ti,dm8168";
|
||||
compatible = "ti,dm8168-evm", "ti,dm8168", "ti,dm816";
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
|
|
|
@ -10,7 +10,7 @@
|
|||
|
||||
/ {
|
||||
model = "DRA62x J5 Eco EVM";
|
||||
compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148";
|
||||
compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148", "ti,dm814";
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
|
|
|
@ -523,7 +523,7 @@
|
|||
};
|
||||
|
||||
touchscreen@20 {
|
||||
compatible = "syna,rmi4_i2c";
|
||||
compatible = "syna,rmi4-i2c";
|
||||
reg = <0x20>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ts>;
|
||||
|
@ -541,8 +541,8 @@
|
|||
|
||||
rmi4-f11@11 {
|
||||
reg = <0x11>;
|
||||
touch-inverted-y;
|
||||
touch-swapped-x-y;
|
||||
touchscreen-inverted-y;
|
||||
touchscreen-swapped-x-y;
|
||||
syna,sensor-type = <1>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -868,6 +868,7 @@
|
|||
|
||||
crypto: caam@30900000 {
|
||||
compatible = "fsl,sec-v4.0";
|
||||
fsl,sec-era = <8>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x30900000 0x40000>;
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
gpio = <&gpio1 3 0>; /* gpio_3 */
|
||||
startup-delay-us = <70000>;
|
||||
enable-active-high;
|
||||
vin-supply = <&vmmc2>;
|
||||
vin-supply = <&vaux3>;
|
||||
};
|
||||
|
||||
/* HS USB Host PHY on PORT 1 */
|
||||
|
@ -82,6 +82,7 @@
|
|||
twl_audio: audio {
|
||||
compatible = "ti,twl4030-audio";
|
||||
codec {
|
||||
ti,hs_extmute_gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -199,6 +200,7 @@
|
|||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
|
||||
OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
@ -213,7 +215,7 @@
|
|||
};
|
||||
wl127x_gpio: pinmux_wl127x_gpio_pin {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_WKUP_IOPAD(0x2a0c, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */
|
||||
OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */
|
||||
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
|
||||
>;
|
||||
};
|
||||
|
@ -260,6 +262,11 @@
|
|||
#include "twl4030.dtsi"
|
||||
#include "twl4030_omap3.dtsi"
|
||||
|
||||
&vaux3 {
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
&twl {
|
||||
twl_power: power {
|
||||
compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
|
||||
|
|
|
@ -379,7 +379,7 @@
|
|||
port@0 {
|
||||
reg = <0>;
|
||||
adv7511_in: endpoint {
|
||||
remote-endpoint = <&du_out_lvds0>;
|
||||
remote-endpoint = <&lvds0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -467,10 +467,8 @@
|
|||
status = "okay";
|
||||
|
||||
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
|
||||
<&cpg CPG_MOD 726>, <&cpg CPG_MOD 725>,
|
||||
<&x13_clk>, <&x2_clk>;
|
||||
clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1",
|
||||
"dclkin.0", "dclkin.1";
|
||||
clock-names = "du.0", "du.1", "du.2", "dclkin.0", "dclkin.1";
|
||||
|
||||
ports {
|
||||
port@0 {
|
||||
|
@ -478,12 +476,26 @@
|
|||
remote-endpoint = <&adv7123_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&lvds0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
port@1 {
|
||||
endpoint {
|
||||
remote-endpoint = <&adv7511_in>;
|
||||
};
|
||||
};
|
||||
port@2 {
|
||||
};
|
||||
};
|
||||
|
||||
&lvds1 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
port@1 {
|
||||
lvds_connector: endpoint {
|
||||
};
|
||||
};
|
||||
|
|
|
@ -1627,18 +1627,13 @@
|
|||
|
||||
du: display@feb00000 {
|
||||
compatible = "renesas,du-r8a7790";
|
||||
reg = <0 0xfeb00000 0 0x70000>,
|
||||
<0 0xfeb90000 0 0x1c>,
|
||||
<0 0xfeb94000 0 0x1c>;
|
||||
reg-names = "du", "lvds.0", "lvds.1";
|
||||
reg = <0 0xfeb00000 0 0x70000>;
|
||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
|
||||
<&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
|
||||
<&cpg CPG_MOD 725>;
|
||||
clock-names = "du.0", "du.1", "du.2", "lvds.0",
|
||||
"lvds.1";
|
||||
<&cpg CPG_MOD 722>;
|
||||
clock-names = "du.0", "du.1", "du.2";
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
|
@ -1653,11 +1648,65 @@
|
|||
port@1 {
|
||||
reg = <1>;
|
||||
du_out_lvds0: endpoint {
|
||||
remote-endpoint = <&lvds0_in>;
|
||||
};
|
||||
};
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
du_out_lvds1: endpoint {
|
||||
remote-endpoint = <&lvds1_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lvds0: lvds@feb90000 {
|
||||
compatible = "renesas,r8a7790-lvds";
|
||||
reg = <0 0xfeb90000 0 0x1c>;
|
||||
clocks = <&cpg CPG_MOD 726>;
|
||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 726>;
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
lvds0_in: endpoint {
|
||||
remote-endpoint = <&du_out_lvds0>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
lvds0_out: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lvds1: lvds@feb94000 {
|
||||
compatible = "renesas,r8a7790-lvds";
|
||||
reg = <0 0xfeb94000 0 0x1c>;
|
||||
clocks = <&cpg CPG_MOD 725>;
|
||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 725>;
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
lvds1_in: endpoint {
|
||||
remote-endpoint = <&du_out_lvds1>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
lvds1_out: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -468,10 +468,9 @@
|
|||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>,
|
||||
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
|
||||
<&x13_clk>, <&x2_clk>;
|
||||
clock-names = "du.0", "du.1", "lvds.0",
|
||||
"dclkin.0", "dclkin.1";
|
||||
clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
|
||||
|
||||
ports {
|
||||
port@0 {
|
||||
|
@ -479,6 +478,13 @@
|
|||
remote-endpoint = <&adv7511_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&lvds0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
port@1 {
|
||||
lvds_connector: endpoint {
|
||||
};
|
||||
|
|
|
@ -441,10 +441,9 @@
|
|||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>,
|
||||
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
|
||||
<&x3_clk>, <&x16_clk>;
|
||||
clock-names = "du.0", "du.1", "lvds.0",
|
||||
"dclkin.0", "dclkin.1";
|
||||
clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
|
||||
|
||||
ports {
|
||||
port@0 {
|
||||
|
@ -455,6 +454,17 @@
|
|||
};
|
||||
};
|
||||
|
||||
&lvds0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
port@1 {
|
||||
lvds_connector: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rcar_sound {
|
||||
pinctrl-0 = <&ssi_pins &audio_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
|
|
@ -1633,15 +1633,12 @@
|
|||
|
||||
du: display@feb00000 {
|
||||
compatible = "renesas,du-r8a7791";
|
||||
reg = <0 0xfeb00000 0 0x40000>,
|
||||
<0 0xfeb90000 0 0x1c>;
|
||||
reg-names = "du", "lvds.0";
|
||||
reg = <0 0xfeb00000 0 0x40000>;
|
||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 724>,
|
||||
<&cpg CPG_MOD 723>,
|
||||
<&cpg CPG_MOD 726>;
|
||||
clock-names = "du.0", "du.1", "lvds.0";
|
||||
<&cpg CPG_MOD 723>;
|
||||
clock-names = "du.0", "du.1";
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
|
@ -1656,6 +1653,33 @@
|
|||
port@1 {
|
||||
reg = <1>;
|
||||
du_out_lvds0: endpoint {
|
||||
remote-endpoint = <&lvds0_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lvds0: lvds@feb90000 {
|
||||
compatible = "renesas,r8a7791-lvds";
|
||||
reg = <0 0xfeb90000 0 0x1c>;
|
||||
clocks = <&cpg CPG_MOD 726>;
|
||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 726>;
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
lvds0_in: endpoint {
|
||||
remote-endpoint = <&du_out_lvds0>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
lvds0_out: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -447,10 +447,9 @@
|
|||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>,
|
||||
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
|
||||
<&x13_clk>, <&x2_clk>;
|
||||
clock-names = "du.0", "du.1", "lvds.0",
|
||||
"dclkin.0", "dclkin.1";
|
||||
clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
|
||||
|
||||
ports {
|
||||
port@0 {
|
||||
|
@ -458,6 +457,11 @@
|
|||
remote-endpoint = <&adv7511_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&lvds0 {
|
||||
ports {
|
||||
port@1 {
|
||||
lvds_connector: endpoint {
|
||||
};
|
||||
|
|
|
@ -1292,15 +1292,12 @@
|
|||
|
||||
du: display@feb00000 {
|
||||
compatible = "renesas,du-r8a7793";
|
||||
reg = <0 0xfeb00000 0 0x40000>,
|
||||
<0 0xfeb90000 0 0x1c>;
|
||||
reg-names = "du", "lvds.0";
|
||||
reg = <0 0xfeb00000 0 0x40000>;
|
||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 724>,
|
||||
<&cpg CPG_MOD 723>,
|
||||
<&cpg CPG_MOD 726>;
|
||||
clock-names = "du.0", "du.1", "lvds.0";
|
||||
<&cpg CPG_MOD 723>;
|
||||
clock-names = "du.0", "du.1";
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
|
@ -1315,6 +1312,34 @@
|
|||
port@1 {
|
||||
reg = <1>;
|
||||
du_out_lvds0: endpoint {
|
||||
remote-endpoint = <&lvds0_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lvds0: lvds@feb90000 {
|
||||
compatible = "renesas,r8a7793-lvds";
|
||||
reg = <0 0xfeb90000 0 0x1c>;
|
||||
clocks = <&cpg CPG_MOD 726>;
|
||||
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 726>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
lvds0_in: endpoint {
|
||||
remote-endpoint = <&du_out_lvds0>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
lvds0_out: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -741,7 +741,7 @@
|
|||
phy_type = "ulpi";
|
||||
clocks = <&tegra_car TEGRA20_CLK_USB2>,
|
||||
<&tegra_car TEGRA20_CLK_PLL_U>,
|
||||
<&tegra_car TEGRA20_CLK_PLL_P_OUT4>;
|
||||
<&tegra_car TEGRA20_CLK_CDEV2>;
|
||||
clock-names = "reg", "pll_u", "ulpi-link";
|
||||
resets = <&tegra_car 58>, <&tegra_car 22>;
|
||||
reset-names = "usb", "utmi-pads";
|
||||
|
|
|
@ -536,4 +536,14 @@ THUMB( orr \reg , \reg , #PSR_T_BIT )
|
|||
#endif
|
||||
.endm
|
||||
|
||||
#ifdef CONFIG_KPROBES
|
||||
#define _ASM_NOKPROBE(entry) \
|
||||
.pushsection "_kprobe_blacklist", "aw" ; \
|
||||
.balign 4 ; \
|
||||
.long entry; \
|
||||
.popsection
|
||||
#else
|
||||
#define _ASM_NOKPROBE(entry)
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_ASSEMBLER_H__ */
|
||||
|
|
|
@ -309,6 +309,22 @@ static inline unsigned int kvm_get_vmid_bits(void)
|
|||
return 8;
|
||||
}
|
||||
|
||||
/*
|
||||
* We are not in the kvm->srcu critical section most of the time, so we take
|
||||
* the SRCU read lock here. Since we copy the data from the user page, we
|
||||
* can immediately drop the lock again.
|
||||
*/
|
||||
static inline int kvm_read_guest_lock(struct kvm *kvm,
|
||||
gpa_t gpa, void *data, unsigned long len)
|
||||
{
|
||||
int srcu_idx = srcu_read_lock(&kvm->srcu);
|
||||
int ret = kvm_read_guest(kvm, gpa, data, len);
|
||||
|
||||
srcu_read_unlock(&kvm->srcu, srcu_idx);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void *kvm_get_hyp_vector(void)
|
||||
{
|
||||
return kvm_ksym_ref(__kvm_hyp_vector);
|
||||
|
|
|
@ -1,13 +0,0 @@
|
|||
#ifndef __ASM_SIGINFO_H
|
||||
#define __ASM_SIGINFO_H
|
||||
|
||||
#include <asm-generic/siginfo.h>
|
||||
|
||||
/*
|
||||
* SIGFPE si_codes
|
||||
*/
|
||||
#ifdef __KERNEL__
|
||||
#define FPE_FIXME 0 /* Broken dup of SI_USER */
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif
|
|
@ -83,7 +83,7 @@ void machine_crash_nonpanic_core(void *unused)
|
|||
{
|
||||
struct pt_regs regs;
|
||||
|
||||
crash_setup_regs(®s, NULL);
|
||||
crash_setup_regs(®s, get_irq_regs());
|
||||
printk(KERN_DEBUG "CPU %u will stop doing anything useful since another CPU has crashed\n",
|
||||
smp_processor_id());
|
||||
crash_save_cpu(®s, smp_processor_id());
|
||||
|
@ -95,6 +95,27 @@ void machine_crash_nonpanic_core(void *unused)
|
|||
cpu_relax();
|
||||
}
|
||||
|
||||
void crash_smp_send_stop(void)
|
||||
{
|
||||
static int cpus_stopped;
|
||||
unsigned long msecs;
|
||||
|
||||
if (cpus_stopped)
|
||||
return;
|
||||
|
||||
atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
|
||||
smp_call_function(machine_crash_nonpanic_core, NULL, false);
|
||||
msecs = 1000; /* Wait at most a second for the other cpus to stop */
|
||||
while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
|
||||
mdelay(1);
|
||||
msecs--;
|
||||
}
|
||||
if (atomic_read(&waiting_for_crash_ipi) > 0)
|
||||
pr_warn("Non-crashing CPUs did not react to IPI\n");
|
||||
|
||||
cpus_stopped = 1;
|
||||
}
|
||||
|
||||
static void machine_kexec_mask_interrupts(void)
|
||||
{
|
||||
unsigned int i;
|
||||
|
@ -120,19 +141,8 @@ static void machine_kexec_mask_interrupts(void)
|
|||
|
||||
void machine_crash_shutdown(struct pt_regs *regs)
|
||||
{
|
||||
unsigned long msecs;
|
||||
|
||||
local_irq_disable();
|
||||
|
||||
atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
|
||||
smp_call_function(machine_crash_nonpanic_core, NULL, false);
|
||||
msecs = 1000; /* Wait at most a second for the other cpus to stop */
|
||||
while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
|
||||
mdelay(1);
|
||||
msecs--;
|
||||
}
|
||||
if (atomic_read(&waiting_for_crash_ipi) > 0)
|
||||
pr_warn("Non-crashing CPUs did not react to IPI\n");
|
||||
crash_smp_send_stop();
|
||||
|
||||
crash_save_cpu(regs, smp_processor_id());
|
||||
machine_kexec_mask_interrupts();
|
||||
|
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/uaccess.h>
|
||||
#include <linux/hardirq.h>
|
||||
#include <linux/kdebug.h>
|
||||
#include <linux/kprobes.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/kexec.h>
|
||||
#include <linux/bug.h>
|
||||
|
@ -417,7 +418,8 @@ void unregister_undef_hook(struct undef_hook *hook)
|
|||
raw_spin_unlock_irqrestore(&undef_lock, flags);
|
||||
}
|
||||
|
||||
static int call_undef_hook(struct pt_regs *regs, unsigned int instr)
|
||||
static nokprobe_inline
|
||||
int call_undef_hook(struct pt_regs *regs, unsigned int instr)
|
||||
{
|
||||
struct undef_hook *hook;
|
||||
unsigned long flags;
|
||||
|
@ -490,6 +492,7 @@ die_sig:
|
|||
|
||||
arm_notify_die("Oops - undefined instruction", regs, &info, 0, 6);
|
||||
}
|
||||
NOKPROBE_SYMBOL(do_undefinstr)
|
||||
|
||||
/*
|
||||
* Handle FIQ similarly to NMI on x86 systems.
|
||||
|
|
|
@ -38,6 +38,7 @@ ENTRY(__get_user_1)
|
|||
mov r0, #0
|
||||
ret lr
|
||||
ENDPROC(__get_user_1)
|
||||
_ASM_NOKPROBE(__get_user_1)
|
||||
|
||||
ENTRY(__get_user_2)
|
||||
check_uaccess r0, 2, r1, r2, __get_user_bad
|
||||
|
@ -58,6 +59,7 @@ rb .req r0
|
|||
mov r0, #0
|
||||
ret lr
|
||||
ENDPROC(__get_user_2)
|
||||
_ASM_NOKPROBE(__get_user_2)
|
||||
|
||||
ENTRY(__get_user_4)
|
||||
check_uaccess r0, 4, r1, r2, __get_user_bad
|
||||
|
@ -65,6 +67,7 @@ ENTRY(__get_user_4)
|
|||
mov r0, #0
|
||||
ret lr
|
||||
ENDPROC(__get_user_4)
|
||||
_ASM_NOKPROBE(__get_user_4)
|
||||
|
||||
ENTRY(__get_user_8)
|
||||
check_uaccess r0, 8, r1, r2, __get_user_bad8
|
||||
|
@ -78,6 +81,7 @@ ENTRY(__get_user_8)
|
|||
mov r0, #0
|
||||
ret lr
|
||||
ENDPROC(__get_user_8)
|
||||
_ASM_NOKPROBE(__get_user_8)
|
||||
|
||||
#ifdef __ARMEB__
|
||||
ENTRY(__get_user_32t_8)
|
||||
|
@ -91,6 +95,7 @@ ENTRY(__get_user_32t_8)
|
|||
mov r0, #0
|
||||
ret lr
|
||||
ENDPROC(__get_user_32t_8)
|
||||
_ASM_NOKPROBE(__get_user_32t_8)
|
||||
|
||||
ENTRY(__get_user_64t_1)
|
||||
check_uaccess r0, 1, r1, r2, __get_user_bad8
|
||||
|
@ -98,6 +103,7 @@ ENTRY(__get_user_64t_1)
|
|||
mov r0, #0
|
||||
ret lr
|
||||
ENDPROC(__get_user_64t_1)
|
||||
_ASM_NOKPROBE(__get_user_64t_1)
|
||||
|
||||
ENTRY(__get_user_64t_2)
|
||||
check_uaccess r0, 2, r1, r2, __get_user_bad8
|
||||
|
@ -114,6 +120,7 @@ rb .req r0
|
|||
mov r0, #0
|
||||
ret lr
|
||||
ENDPROC(__get_user_64t_2)
|
||||
_ASM_NOKPROBE(__get_user_64t_2)
|
||||
|
||||
ENTRY(__get_user_64t_4)
|
||||
check_uaccess r0, 4, r1, r2, __get_user_bad8
|
||||
|
@ -121,6 +128,7 @@ ENTRY(__get_user_64t_4)
|
|||
mov r0, #0
|
||||
ret lr
|
||||
ENDPROC(__get_user_64t_4)
|
||||
_ASM_NOKPROBE(__get_user_64t_4)
|
||||
#endif
|
||||
|
||||
__get_user_bad8:
|
||||
|
@ -131,6 +139,8 @@ __get_user_bad:
|
|||
ret lr
|
||||
ENDPROC(__get_user_bad)
|
||||
ENDPROC(__get_user_bad8)
|
||||
_ASM_NOKPROBE(__get_user_bad)
|
||||
_ASM_NOKPROBE(__get_user_bad8)
|
||||
|
||||
.pushsection __ex_table, "a"
|
||||
.long 1b, __get_user_bad
|
||||
|
|
|
@ -205,12 +205,17 @@ static const short da830_evm_mmc_sd_pins[] = {
|
|||
-1
|
||||
};
|
||||
|
||||
#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
|
||||
#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
|
||||
|
||||
static struct gpiod_lookup_table mmc_gpios_table = {
|
||||
.dev_id = "da830-mmc.0",
|
||||
.table = {
|
||||
/* gpio chip 1 contains gpio range 32-63 */
|
||||
GPIO_LOOKUP("davinci_gpio.1", 2, "cd", GPIO_ACTIVE_LOW),
|
||||
GPIO_LOOKUP("davinci_gpio.1", 1, "wp", GPIO_ACTIVE_LOW),
|
||||
GPIO_LOOKUP("davinci_gpio.0", DA830_MMCSD_CD_PIN, "cd",
|
||||
GPIO_ACTIVE_LOW),
|
||||
GPIO_LOOKUP("davinci_gpio.0", DA830_MMCSD_WP_PIN, "wp",
|
||||
GPIO_ACTIVE_LOW),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -763,12 +763,17 @@ static const short da850_evm_mcasp_pins[] __initconst = {
|
|||
-1
|
||||
};
|
||||
|
||||
#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
|
||||
#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
|
||||
|
||||
static struct gpiod_lookup_table mmc_gpios_table = {
|
||||
.dev_id = "da830-mmc.0",
|
||||
.table = {
|
||||
/* gpio chip 2 contains gpio range 64-95 */
|
||||
GPIO_LOOKUP("davinci_gpio.2", 0, "cd", GPIO_ACTIVE_LOW),
|
||||
GPIO_LOOKUP("davinci_gpio.2", 1, "wp", GPIO_ACTIVE_LOW),
|
||||
GPIO_LOOKUP("davinci_gpio.0", DA850_MMCSD_CD_PIN, "cd",
|
||||
GPIO_ACTIVE_LOW),
|
||||
GPIO_LOOKUP("davinci_gpio.0", DA850_MMCSD_WP_PIN, "wp",
|
||||
GPIO_ACTIVE_LOW),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/gpio.h>
|
||||
#include <linux/gpio/machine.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/dm9000.h>
|
||||
#include <linux/videodev2.h>
|
||||
#include <media/i2c/tvp514x.h>
|
||||
#include <linux/spi/spi.h>
|
||||
|
@ -109,12 +110,15 @@ static struct platform_device davinci_nand_device = {
|
|||
},
|
||||
};
|
||||
|
||||
#define DM355_I2C_SDA_PIN GPIO_TO_PIN(0, 15)
|
||||
#define DM355_I2C_SCL_PIN GPIO_TO_PIN(0, 14)
|
||||
|
||||
static struct gpiod_lookup_table i2c_recovery_gpiod_table = {
|
||||
.dev_id = "i2c_davinci",
|
||||
.dev_id = "i2c_davinci.1",
|
||||
.table = {
|
||||
GPIO_LOOKUP("davinci_gpio", 15, "sda",
|
||||
GPIO_LOOKUP("davinci_gpio.0", DM355_I2C_SDA_PIN, "sda",
|
||||
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
|
||||
GPIO_LOOKUP("davinci_gpio", 14, "scl",
|
||||
GPIO_LOOKUP("davinci_gpio.0", DM355_I2C_SCL_PIN, "scl",
|
||||
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
|
||||
},
|
||||
};
|
||||
|
@ -179,11 +183,16 @@ static struct resource dm355evm_dm9000_rsrc[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct dm9000_plat_data dm335evm_dm9000_platdata;
|
||||
|
||||
static struct platform_device dm355evm_dm9000 = {
|
||||
.name = "dm9000",
|
||||
.id = -1,
|
||||
.resource = dm355evm_dm9000_rsrc,
|
||||
.num_resources = ARRAY_SIZE(dm355evm_dm9000_rsrc),
|
||||
.dev = {
|
||||
.platform_data = &dm335evm_dm9000_platdata,
|
||||
},
|
||||
};
|
||||
|
||||
static struct tvp514x_platform_data tvp5146_pdata = {
|
||||
|
|
|
@ -17,6 +17,7 @@
|
|||
#include <linux/i2c.h>
|
||||
#include <linux/platform_data/pcf857x.h>
|
||||
#include <linux/platform_data/at24.h>
|
||||
#include <linux/platform_data/gpio-davinci.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/rawnand.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
|
@ -596,12 +597,15 @@ static struct i2c_board_info __initdata i2c_info[] = {
|
|||
},
|
||||
};
|
||||
|
||||
#define DM644X_I2C_SDA_PIN GPIO_TO_PIN(2, 12)
|
||||
#define DM644X_I2C_SCL_PIN GPIO_TO_PIN(2, 11)
|
||||
|
||||
static struct gpiod_lookup_table i2c_recovery_gpiod_table = {
|
||||
.dev_id = "i2c_davinci",
|
||||
.dev_id = "i2c_davinci.1",
|
||||
.table = {
|
||||
GPIO_LOOKUP("davinci_gpio", 44, "sda",
|
||||
GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SDA_PIN, "sda",
|
||||
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
|
||||
GPIO_LOOKUP("davinci_gpio", 43, "scl",
|
||||
GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SCL_PIN, "scl",
|
||||
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
|
||||
},
|
||||
};
|
||||
|
|
|
@ -532,11 +532,12 @@ static struct vpif_display_config dm646x_vpif_display_config = {
|
|||
.set_clock = set_vpif_clock,
|
||||
.subdevinfo = dm646x_vpif_subdev,
|
||||
.subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
|
||||
.i2c_adapter_id = 1,
|
||||
.chan_config[0] = {
|
||||
.outputs = dm6467_ch0_outputs,
|
||||
.output_count = ARRAY_SIZE(dm6467_ch0_outputs),
|
||||
},
|
||||
.card_name = "DM646x EVM",
|
||||
.card_name = "DM646x EVM Video Display",
|
||||
};
|
||||
|
||||
/**
|
||||
|
@ -674,6 +675,7 @@ static struct vpif_capture_config dm646x_vpif_capture_cfg = {
|
|||
.setup_input_channel_mode = setup_vpif_input_channel_mode,
|
||||
.subdev_info = vpif_capture_sdev_info,
|
||||
.subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
|
||||
.i2c_adapter_id = 1,
|
||||
.chan_config[0] = {
|
||||
.inputs = dm6467_ch0_inputs,
|
||||
.input_count = ARRAY_SIZE(dm6467_ch0_inputs),
|
||||
|
@ -694,6 +696,7 @@ static struct vpif_capture_config dm646x_vpif_capture_cfg = {
|
|||
.fid_pol = 0,
|
||||
},
|
||||
},
|
||||
.card_name = "DM646x EVM Video Capture",
|
||||
};
|
||||
|
||||
static void __init evm_init_video(void)
|
||||
|
|
|
@ -123,12 +123,16 @@ static const short hawk_mmcsd0_pins[] = {
|
|||
-1
|
||||
};
|
||||
|
||||
#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12)
|
||||
#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13)
|
||||
|
||||
static struct gpiod_lookup_table mmc_gpios_table = {
|
||||
.dev_id = "da830-mmc.0",
|
||||
.table = {
|
||||
/* CD: gpio3_12: gpio60: chip 1 contains gpio range 32-63*/
|
||||
GPIO_LOOKUP("davinci_gpio.0", 28, "cd", GPIO_ACTIVE_LOW),
|
||||
GPIO_LOOKUP("davinci_gpio.0", 29, "wp", GPIO_ACTIVE_LOW),
|
||||
GPIO_LOOKUP("davinci_gpio.0", DA850_HAWK_MMCSD_CD_PIN, "cd",
|
||||
GPIO_ACTIVE_LOW),
|
||||
GPIO_LOOKUP("davinci_gpio.0", DA850_HAWK_MMCSD_WP_PIN, "wp",
|
||||
GPIO_ACTIVE_LOW),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -488,7 +488,8 @@ static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
|
|||
[IRQ_DM646X_MCASP0TXINT] = 7,
|
||||
[IRQ_DM646X_MCASP0RXINT] = 7,
|
||||
[IRQ_DM646X_RESERVED_3] = 7,
|
||||
[IRQ_DM646X_MCASP1TXINT] = 7, /* clockevent */
|
||||
[IRQ_DM646X_MCASP1TXINT] = 7,
|
||||
[IRQ_TINT0_TINT12] = 7, /* clockevent */
|
||||
[IRQ_TINT0_TINT34] = 7, /* clocksource */
|
||||
[IRQ_TINT1_TINT12] = 7, /* DSP timer */
|
||||
[IRQ_TINT1_TINT34] = 7, /* system tick */
|
||||
|
|
|
@ -29,6 +29,7 @@ static struct dev_pm_domain keystone_pm_domain = {
|
|||
|
||||
static struct pm_clk_notifier_block platform_domain_notifier = {
|
||||
.pm_domain = &keystone_pm_domain,
|
||||
.con_ids = { NULL },
|
||||
};
|
||||
|
||||
static const struct of_device_id of_keystone_table[] = {
|
||||
|
|
|
@ -58,22 +58,24 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
|
|||
irq_num = gpio_to_irq(gpio);
|
||||
fiq_count = fiq_buffer[FIQ_CNT_INT_00 + gpio];
|
||||
|
||||
while (irq_counter[gpio] < fiq_count) {
|
||||
if (gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) {
|
||||
struct irq_data *d = irq_get_irq_data(irq_num);
|
||||
if (irq_counter[gpio] < fiq_count &&
|
||||
gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) {
|
||||
struct irq_data *d = irq_get_irq_data(irq_num);
|
||||
|
||||
/*
|
||||
* It looks like handle_edge_irq() that
|
||||
* OMAP GPIO edge interrupts default to,
|
||||
* expects interrupt already unmasked.
|
||||
*/
|
||||
if (irq_chip && irq_chip->irq_unmask)
|
||||
/*
|
||||
* handle_simple_irq() that OMAP GPIO edge
|
||||
* interrupts default to since commit 80ac93c27441
|
||||
* requires interrupt already acked and unmasked.
|
||||
*/
|
||||
if (irq_chip) {
|
||||
if (irq_chip->irq_ack)
|
||||
irq_chip->irq_ack(d);
|
||||
if (irq_chip->irq_unmask)
|
||||
irq_chip->irq_unmask(d);
|
||||
}
|
||||
generic_handle_irq(irq_num);
|
||||
|
||||
irq_counter[gpio]++;
|
||||
}
|
||||
for (; irq_counter[gpio] < fiq_count; irq_counter[gpio]++)
|
||||
generic_handle_irq(irq_num);
|
||||
}
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
|
|
@ -188,7 +188,7 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
|
|||
((prev & OMAP_POWERSTATE_MASK) << 0));
|
||||
trace_power_domain_target_rcuidle(pwrdm->name,
|
||||
trace_state,
|
||||
smp_processor_id());
|
||||
raw_smp_processor_id());
|
||||
}
|
||||
break;
|
||||
default:
|
||||
|
@ -518,7 +518,7 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
|
|||
if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) {
|
||||
/* Trace the pwrdm desired target state */
|
||||
trace_power_domain_target_rcuidle(pwrdm->name, pwrst,
|
||||
smp_processor_id());
|
||||
raw_smp_processor_id());
|
||||
/* Program the pwrdm desired target state */
|
||||
ret = arch_pwrdm->pwrdm_set_next_pwrst(pwrdm, pwrst);
|
||||
}
|
||||
|
|
|
@ -466,12 +466,6 @@ void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
|
|||
void __init dma_contiguous_remap(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (!dma_mmu_remap_num)
|
||||
return;
|
||||
|
||||
/* call flush_cache_all() since CMA area would be large enough */
|
||||
flush_cache_all();
|
||||
for (i = 0; i < dma_mmu_remap_num; i++) {
|
||||
phys_addr_t start = dma_mmu_remap[i].base;
|
||||
phys_addr_t end = start + dma_mmu_remap[i].size;
|
||||
|
@ -504,15 +498,7 @@ void __init dma_contiguous_remap(void)
|
|||
flush_tlb_kernel_range(__phys_to_virt(start),
|
||||
__phys_to_virt(end));
|
||||
|
||||
/*
|
||||
* All the memory in CMA region will be on ZONE_MOVABLE.
|
||||
* If that zone is considered as highmem, the memory in CMA
|
||||
* region is also considered as highmem even if it's
|
||||
* physical address belong to lowmem. In this case,
|
||||
* re-mapping isn't required.
|
||||
*/
|
||||
if (!is_highmem_idx(ZONE_MOVABLE))
|
||||
iotable_init(&map, 1);
|
||||
iotable_init(&map, 1);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -165,13 +165,14 @@ optimized_callback(struct optimized_kprobe *op, struct pt_regs *regs)
|
|||
{
|
||||
unsigned long flags;
|
||||
struct kprobe *p = &op->kp;
|
||||
struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
|
||||
struct kprobe_ctlblk *kcb;
|
||||
|
||||
/* Save skipped registers */
|
||||
regs->ARM_pc = (unsigned long)op->kp.addr;
|
||||
regs->ARM_ORIG_r0 = ~0UL;
|
||||
|
||||
local_irq_save(flags);
|
||||
kcb = get_kprobe_ctlblk();
|
||||
|
||||
if (kprobe_running()) {
|
||||
kprobes_inc_nmissed_count(&op->kp);
|
||||
|
@ -191,6 +192,7 @@ optimized_callback(struct optimized_kprobe *op, struct pt_regs *regs)
|
|||
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
NOKPROBE_SYMBOL(optimized_callback)
|
||||
|
||||
int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *orig)
|
||||
{
|
||||
|
|
|
@ -257,7 +257,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_
|
|||
|
||||
if (exceptions == VFP_EXCEPTION_ERROR) {
|
||||
vfp_panic("unhandled bounce", inst);
|
||||
vfp_raise_sigfpe(FPE_FIXME, regs);
|
||||
vfp_raise_sigfpe(FPE_FLTINV, regs);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
@ -1317,7 +1317,7 @@
|
|||
reg = <0x14d60000 0x100>;
|
||||
dmas = <&pdma0 31 &pdma0 30>;
|
||||
dma-names = "tx", "rx";
|
||||
interrupts = <GIC_SPI 435 IRQ_TYPE_NONE>;
|
||||
interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cmu_peric CLK_PCLK_I2S1>,
|
||||
<&cmu_peric CLK_PCLK_I2S1>,
|
||||
<&cmu_peric CLK_SCLK_I2S1>;
|
||||
|
|
|
@ -38,9 +38,10 @@
|
|||
compatible = "marvell,armada-7k-pp22";
|
||||
reg = <0x0 0x100000>, <0x129000 0xb000>;
|
||||
clocks = <&CP110_LABEL(clk) 1 3>, <&CP110_LABEL(clk) 1 9>,
|
||||
<&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 18>;
|
||||
<&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>,
|
||||
<&CP110_LABEL(clk) 1 18>;
|
||||
clock-names = "pp_clk", "gop_clk",
|
||||
"mg_clk", "axi_clk";
|
||||
"mg_clk", "mg_core_clk", "axi_clk";
|
||||
marvell,system-controller = <&CP110_LABEL(syscon0)>;
|
||||
status = "disabled";
|
||||
dma-coherent;
|
||||
|
@ -141,6 +142,8 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "marvell,xmdio";
|
||||
reg = <0x12a600 0x10>;
|
||||
clocks = <&CP110_LABEL(clk) 1 5>,
|
||||
<&CP110_LABEL(clk) 1 6>, <&CP110_LABEL(clk) 1 18>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -46,7 +46,7 @@
|
|||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x0>;
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -414,7 +414,7 @@
|
|||
mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-pwrseq = <&emmc_pwrseq>;
|
||||
cdns,phy-input-delay-legacy = <4>;
|
||||
cdns,phy-input-delay-legacy = <9>;
|
||||
cdns,phy-input-delay-mmc-highspeed = <2>;
|
||||
cdns,phy-input-delay-mmc-ddr = <3>;
|
||||
cdns,phy-dll-delay-sdclk = <21>;
|
||||
|
|
|
@ -67,3 +67,11 @@
|
|||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_ether_rgmii {
|
||||
tx {
|
||||
pins = "RGMII_TXCLK", "RGMII_TXD0", "RGMII_TXD1",
|
||||
"RGMII_TXD2", "RGMII_TXD3", "RGMII_TXCTL";
|
||||
drive-strength = <9>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -519,7 +519,7 @@
|
|||
mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-pwrseq = <&emmc_pwrseq>;
|
||||
cdns,phy-input-delay-legacy = <4>;
|
||||
cdns,phy-input-delay-legacy = <9>;
|
||||
cdns,phy-input-delay-mmc-highspeed = <2>;
|
||||
cdns,phy-input-delay-mmc-ddr = <3>;
|
||||
cdns,phy-dll-delay-sdclk = <21>;
|
||||
|
|
|
@ -334,7 +334,7 @@
|
|||
mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-pwrseq = <&emmc_pwrseq>;
|
||||
cdns,phy-input-delay-legacy = <4>;
|
||||
cdns,phy-input-delay-legacy = <9>;
|
||||
cdns,phy-input-delay-mmc-highspeed = <2>;
|
||||
cdns,phy-input-delay-mmc-ddr = <3>;
|
||||
cdns,phy-dll-delay-sdclk = <21>;
|
||||
|
|
|
@ -360,6 +360,22 @@ static inline unsigned int kvm_get_vmid_bits(void)
|
|||
return (cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR1_VMIDBITS_SHIFT) == 2) ? 16 : 8;
|
||||
}
|
||||
|
||||
/*
|
||||
* We are not in the kvm->srcu critical section most of the time, so we take
|
||||
* the SRCU read lock here. Since we copy the data from the user page, we
|
||||
* can immediately drop the lock again.
|
||||
*/
|
||||
static inline int kvm_read_guest_lock(struct kvm *kvm,
|
||||
gpa_t gpa, void *data, unsigned long len)
|
||||
{
|
||||
int srcu_idx = srcu_read_lock(&kvm->srcu);
|
||||
int ret = kvm_read_guest(kvm, gpa, data, len);
|
||||
|
||||
srcu_read_unlock(&kvm->srcu, srcu_idx);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_KVM_INDIRECT_VECTORS
|
||||
/*
|
||||
* EL2 vectors can be mapped and rerouted in a number of ways,
|
||||
|
|
|
@ -18,9 +18,9 @@
|
|||
#define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset))
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MACH_JZ4740) || defined(CONFIG_MACH_JZ4780)
|
||||
#include <asm/mach-jz4740/base.h>
|
||||
#define PORT(offset) (CKSEG1ADDR(JZ4740_UART0_BASE_ADDR) + (4 * offset))
|
||||
#ifdef CONFIG_MACH_INGENIC
|
||||
#define INGENIC_UART0_BASE_ADDR 0x10030000
|
||||
#define PORT(offset) (CKSEG1ADDR(INGENIC_UART0_BASE_ADDR) + (4 * offset))
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_XLR
|
||||
|
|
|
@ -1,4 +1,2 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
dtb-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += nexys4ddr.dtb
|
||||
|
||||
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
|
||||
|
|
|
@ -16,3 +16,4 @@ all-$(CONFIG_MIPS_GENERIC) := vmlinux.gz.itb
|
|||
its-y := vmlinux.its.S
|
||||
its-$(CONFIG_FIT_IMAGE_FDT_BOSTON) += board-boston.its.S
|
||||
its-$(CONFIG_FIT_IMAGE_FDT_NI169445) += board-ni169445.its.S
|
||||
its-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += board-xilfpga.its.S
|
||||
|
|
|
@ -463,7 +463,7 @@ static int fpr_get_msa(struct task_struct *target,
|
|||
/*
|
||||
* Copy the floating-point context to the supplied NT_PRFPREG buffer.
|
||||
* Choose the appropriate helper for general registers, and then copy
|
||||
* the FCSR register separately.
|
||||
* the FCSR and FIR registers separately.
|
||||
*/
|
||||
static int fpr_get(struct task_struct *target,
|
||||
const struct user_regset *regset,
|
||||
|
@ -471,6 +471,7 @@ static int fpr_get(struct task_struct *target,
|
|||
void *kbuf, void __user *ubuf)
|
||||
{
|
||||
const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
|
||||
const int fir_pos = fcr31_pos + sizeof(u32);
|
||||
int err;
|
||||
|
||||
if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t))
|
||||
|
@ -483,6 +484,12 @@ static int fpr_get(struct task_struct *target,
|
|||
err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
||||
&target->thread.fpu.fcr31,
|
||||
fcr31_pos, fcr31_pos + sizeof(u32));
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
||||
&boot_cpu_data.fpu_id,
|
||||
fir_pos, fir_pos + sizeof(u32));
|
||||
|
||||
return err;
|
||||
}
|
||||
|
@ -531,7 +538,8 @@ static int fpr_set_msa(struct task_struct *target,
|
|||
/*
|
||||
* Copy the supplied NT_PRFPREG buffer to the floating-point context.
|
||||
* Choose the appropriate helper for general registers, and then copy
|
||||
* the FCSR register separately.
|
||||
* the FCSR register separately. Ignore the incoming FIR register
|
||||
* contents though, as the register is read-only.
|
||||
*
|
||||
* We optimize for the case where `count % sizeof(elf_fpreg_t) == 0',
|
||||
* which is supposed to have been guaranteed by the kernel before
|
||||
|
@ -545,6 +553,7 @@ static int fpr_set(struct task_struct *target,
|
|||
const void *kbuf, const void __user *ubuf)
|
||||
{
|
||||
const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
|
||||
const int fir_pos = fcr31_pos + sizeof(u32);
|
||||
u32 fcr31;
|
||||
int err;
|
||||
|
||||
|
@ -572,6 +581,11 @@ static int fpr_set(struct task_struct *target,
|
|||
ptrace_setfcr31(target, fcr31);
|
||||
}
|
||||
|
||||
if (count > 0)
|
||||
err = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
|
||||
fir_pos,
|
||||
fir_pos + sizeof(u32));
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
@ -793,7 +807,7 @@ long arch_ptrace(struct task_struct *child, long request,
|
|||
fregs = get_fpu_regs(child);
|
||||
|
||||
#ifdef CONFIG_32BIT
|
||||
if (test_thread_flag(TIF_32BIT_FPREGS)) {
|
||||
if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
|
||||
/*
|
||||
* The odd registers are actually the high
|
||||
* order bits of the values stored in the even
|
||||
|
@ -888,7 +902,7 @@ long arch_ptrace(struct task_struct *child, long request,
|
|||
|
||||
init_fp_ctx(child);
|
||||
#ifdef CONFIG_32BIT
|
||||
if (test_thread_flag(TIF_32BIT_FPREGS)) {
|
||||
if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
|
||||
/*
|
||||
* The odd registers are actually the high
|
||||
* order bits of the values stored in the even
|
||||
|
|
|
@ -99,7 +99,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
|
|||
break;
|
||||
}
|
||||
fregs = get_fpu_regs(child);
|
||||
if (test_thread_flag(TIF_32BIT_FPREGS)) {
|
||||
if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
|
||||
/*
|
||||
* The odd registers are actually the high
|
||||
* order bits of the values stored in the even
|
||||
|
@ -212,7 +212,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
|
|||
sizeof(child->thread.fpu));
|
||||
child->thread.fpu.fcr31 = 0;
|
||||
}
|
||||
if (test_thread_flag(TIF_32BIT_FPREGS)) {
|
||||
if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
|
||||
/*
|
||||
* The odd registers are actually the high
|
||||
* order bits of the values stored in the even
|
||||
|
|
|
@ -45,7 +45,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
|
|||
{ "cache", VCPU_STAT(cache_exits), KVM_STAT_VCPU },
|
||||
{ "signal", VCPU_STAT(signal_exits), KVM_STAT_VCPU },
|
||||
{ "interrupt", VCPU_STAT(int_exits), KVM_STAT_VCPU },
|
||||
{ "cop_unsuable", VCPU_STAT(cop_unusable_exits), KVM_STAT_VCPU },
|
||||
{ "cop_unusable", VCPU_STAT(cop_unusable_exits), KVM_STAT_VCPU },
|
||||
{ "tlbmod", VCPU_STAT(tlbmod_exits), KVM_STAT_VCPU },
|
||||
{ "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits), KVM_STAT_VCPU },
|
||||
{ "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits), KVM_STAT_VCPU },
|
||||
|
|
|
@ -851,9 +851,12 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
|
|||
/*
|
||||
* Either no secondary cache or the available caches don't have the
|
||||
* subset property so we have to flush the primary caches
|
||||
* explicitly
|
||||
* explicitly.
|
||||
* If we would need IPI to perform an INDEX-type operation, then
|
||||
* we have to use the HIT-type alternative as IPI cannot be used
|
||||
* here due to interrupts possibly being disabled.
|
||||
*/
|
||||
if (size >= dcache_size) {
|
||||
if (!r4k_op_needs_ipi(R4K_INDEX) && size >= dcache_size) {
|
||||
r4k_blast_dcache();
|
||||
} else {
|
||||
R4600_HIT_CACHEOP_WAR_IMPL;
|
||||
|
@ -890,7 +893,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
|
|||
return;
|
||||
}
|
||||
|
||||
if (size >= dcache_size) {
|
||||
if (!r4k_op_needs_ipi(R4K_INDEX) && size >= dcache_size) {
|
||||
r4k_blast_dcache();
|
||||
} else {
|
||||
R4600_HIT_CACHEOP_WAR_IMPL;
|
||||
|
|
|
@ -268,7 +268,7 @@ static struct parisc_device *find_device_by_addr(unsigned long hpa)
|
|||
* Walks up the device tree looking for a device of the specified type.
|
||||
* If it finds it, it returns it. If not, it returns NULL.
|
||||
*/
|
||||
const struct parisc_device * __init
|
||||
const struct parisc_device *
|
||||
find_pa_parent_type(const struct parisc_device *padev, int type)
|
||||
{
|
||||
const struct device *dev = &padev->dev;
|
||||
|
|
|
@ -423,8 +423,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_PROC_FS
|
||||
int __init
|
||||
setup_profiling_timer(unsigned int multiplier)
|
||||
int setup_profiling_timer(unsigned int multiplier)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
|
|
@ -74,6 +74,27 @@
|
|||
*/
|
||||
#define EX_R3 EX_DAR
|
||||
|
||||
#define STF_ENTRY_BARRIER_SLOT \
|
||||
STF_ENTRY_BARRIER_FIXUP_SECTION; \
|
||||
nop; \
|
||||
nop; \
|
||||
nop
|
||||
|
||||
#define STF_EXIT_BARRIER_SLOT \
|
||||
STF_EXIT_BARRIER_FIXUP_SECTION; \
|
||||
nop; \
|
||||
nop; \
|
||||
nop; \
|
||||
nop; \
|
||||
nop; \
|
||||
nop
|
||||
|
||||
/*
|
||||
* r10 must be free to use, r13 must be paca
|
||||
*/
|
||||
#define INTERRUPT_TO_KERNEL \
|
||||
STF_ENTRY_BARRIER_SLOT
|
||||
|
||||
/*
|
||||
* Macros for annotating the expected destination of (h)rfid
|
||||
*
|
||||
|
@ -90,16 +111,19 @@
|
|||
rfid
|
||||
|
||||
#define RFI_TO_USER \
|
||||
STF_EXIT_BARRIER_SLOT; \
|
||||
RFI_FLUSH_SLOT; \
|
||||
rfid; \
|
||||
b rfi_flush_fallback
|
||||
|
||||
#define RFI_TO_USER_OR_KERNEL \
|
||||
STF_EXIT_BARRIER_SLOT; \
|
||||
RFI_FLUSH_SLOT; \
|
||||
rfid; \
|
||||
b rfi_flush_fallback
|
||||
|
||||
#define RFI_TO_GUEST \
|
||||
STF_EXIT_BARRIER_SLOT; \
|
||||
RFI_FLUSH_SLOT; \
|
||||
rfid; \
|
||||
b rfi_flush_fallback
|
||||
|
@ -108,21 +132,25 @@
|
|||
hrfid
|
||||
|
||||
#define HRFI_TO_USER \
|
||||
STF_EXIT_BARRIER_SLOT; \
|
||||
RFI_FLUSH_SLOT; \
|
||||
hrfid; \
|
||||
b hrfi_flush_fallback
|
||||
|
||||
#define HRFI_TO_USER_OR_KERNEL \
|
||||
STF_EXIT_BARRIER_SLOT; \
|
||||
RFI_FLUSH_SLOT; \
|
||||
hrfid; \
|
||||
b hrfi_flush_fallback
|
||||
|
||||
#define HRFI_TO_GUEST \
|
||||
STF_EXIT_BARRIER_SLOT; \
|
||||
RFI_FLUSH_SLOT; \
|
||||
hrfid; \
|
||||
b hrfi_flush_fallback
|
||||
|
||||
#define HRFI_TO_UNKNOWN \
|
||||
STF_EXIT_BARRIER_SLOT; \
|
||||
RFI_FLUSH_SLOT; \
|
||||
hrfid; \
|
||||
b hrfi_flush_fallback
|
||||
|
@ -254,6 +282,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
|
|||
#define __EXCEPTION_PROLOG_1_PRE(area) \
|
||||
OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
|
||||
OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
|
||||
INTERRUPT_TO_KERNEL; \
|
||||
SAVE_CTR(r10, area); \
|
||||
mfcr r9;
|
||||
|
||||
|
|
|
@ -187,6 +187,22 @@ label##3: \
|
|||
FTR_ENTRY_OFFSET label##1b-label##3b; \
|
||||
.popsection;
|
||||
|
||||
#define STF_ENTRY_BARRIER_FIXUP_SECTION \
|
||||
953: \
|
||||
.pushsection __stf_entry_barrier_fixup,"a"; \
|
||||
.align 2; \
|
||||
954: \
|
||||
FTR_ENTRY_OFFSET 953b-954b; \
|
||||
.popsection;
|
||||
|
||||
#define STF_EXIT_BARRIER_FIXUP_SECTION \
|
||||
955: \
|
||||
.pushsection __stf_exit_barrier_fixup,"a"; \
|
||||
.align 2; \
|
||||
956: \
|
||||
FTR_ENTRY_OFFSET 955b-956b; \
|
||||
.popsection;
|
||||
|
||||
#define RFI_FLUSH_FIXUP_SECTION \
|
||||
951: \
|
||||
.pushsection __rfi_flush_fixup,"a"; \
|
||||
|
@ -199,6 +215,9 @@ label##3: \
|
|||
#ifndef __ASSEMBLY__
|
||||
#include <linux/types.h>
|
||||
|
||||
extern long stf_barrier_fallback;
|
||||
extern long __start___stf_entry_barrier_fixup, __stop___stf_entry_barrier_fixup;
|
||||
extern long __start___stf_exit_barrier_fixup, __stop___stf_exit_barrier_fixup;
|
||||
extern long __start___rfi_flush_fixup, __stop___rfi_flush_fixup;
|
||||
|
||||
void apply_feature_fixups(void);
|
||||
|
|
|
@ -12,6 +12,17 @@
|
|||
extern unsigned long powerpc_security_features;
|
||||
extern bool rfi_flush;
|
||||
|
||||
/* These are bit flags */
|
||||
enum stf_barrier_type {
|
||||
STF_BARRIER_NONE = 0x1,
|
||||
STF_BARRIER_FALLBACK = 0x2,
|
||||
STF_BARRIER_EIEIO = 0x4,
|
||||
STF_BARRIER_SYNC_ORI = 0x8,
|
||||
};
|
||||
|
||||
void setup_stf_barrier(void);
|
||||
void do_stf_barrier_fixups(enum stf_barrier_type types);
|
||||
|
||||
static inline void security_ftr_set(unsigned long feature)
|
||||
{
|
||||
powerpc_security_features |= feature;
|
||||
|
|
|
@ -885,7 +885,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_TM)
|
|||
#endif
|
||||
|
||||
|
||||
EXC_REAL_MASKABLE(decrementer, 0x900, 0x80, IRQS_DISABLED)
|
||||
EXC_REAL_OOL_MASKABLE(decrementer, 0x900, 0x80, IRQS_DISABLED)
|
||||
EXC_VIRT_MASKABLE(decrementer, 0x4900, 0x80, 0x900, IRQS_DISABLED)
|
||||
TRAMP_KVM(PACA_EXGEN, 0x900)
|
||||
EXC_COMMON_ASYNC(decrementer_common, 0x900, timer_interrupt)
|
||||
|
@ -961,6 +961,7 @@ EXC_COMMON(trap_0b_common, 0xb00, unknown_exception)
|
|||
mtctr r13; \
|
||||
GET_PACA(r13); \
|
||||
std r10,PACA_EXGEN+EX_R10(r13); \
|
||||
INTERRUPT_TO_KERNEL; \
|
||||
KVMTEST_PR(0xc00); /* uses r10, branch to do_kvm_0xc00_system_call */ \
|
||||
HMT_MEDIUM; \
|
||||
mfctr r9;
|
||||
|
@ -969,7 +970,8 @@ EXC_COMMON(trap_0b_common, 0xb00, unknown_exception)
|
|||
#define SYSCALL_KVMTEST \
|
||||
HMT_MEDIUM; \
|
||||
mr r9,r13; \
|
||||
GET_PACA(r13);
|
||||
GET_PACA(r13); \
|
||||
INTERRUPT_TO_KERNEL;
|
||||
#endif
|
||||
|
||||
#define LOAD_SYSCALL_HANDLER(reg) \
|
||||
|
@ -1507,6 +1509,19 @@ masked_##_H##interrupt: \
|
|||
b .; \
|
||||
MASKED_DEC_HANDLER(_H)
|
||||
|
||||
TRAMP_REAL_BEGIN(stf_barrier_fallback)
|
||||
std r9,PACA_EXRFI+EX_R9(r13)
|
||||
std r10,PACA_EXRFI+EX_R10(r13)
|
||||
sync
|
||||
ld r9,PACA_EXRFI+EX_R9(r13)
|
||||
ld r10,PACA_EXRFI+EX_R10(r13)
|
||||
ori 31,31,0
|
||||
.rept 14
|
||||
b 1f
|
||||
1:
|
||||
.endr
|
||||
blr
|
||||
|
||||
TRAMP_REAL_BEGIN(rfi_flush_fallback)
|
||||
SET_SCRATCH0(r13);
|
||||
GET_PACA(r13);
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
#include <linux/device.h>
|
||||
#include <linux/seq_buf.h>
|
||||
|
||||
#include <asm/debugfs.h>
|
||||
#include <asm/security_features.h>
|
||||
|
||||
|
||||
|
@ -86,3 +87,151 @@ ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, c
|
|||
|
||||
return s.len;
|
||||
}
|
||||
|
||||
/*
|
||||
* Store-forwarding barrier support.
|
||||
*/
|
||||
|
||||
static enum stf_barrier_type stf_enabled_flush_types;
|
||||
static bool no_stf_barrier;
|
||||
bool stf_barrier;
|
||||
|
||||
static int __init handle_no_stf_barrier(char *p)
|
||||
{
|
||||
pr_info("stf-barrier: disabled on command line.");
|
||||
no_stf_barrier = true;
|
||||
return 0;
|
||||
}
|
||||
|
||||
early_param("no_stf_barrier", handle_no_stf_barrier);
|
||||
|
||||
/* This is the generic flag used by other architectures */
|
||||
static int __init handle_ssbd(char *p)
|
||||
{
|
||||
if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
|
||||
/* Until firmware tells us, we have the barrier with auto */
|
||||
return 0;
|
||||
} else if (strncmp(p, "off", 3) == 0) {
|
||||
handle_no_stf_barrier(NULL);
|
||||
return 0;
|
||||
} else
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
early_param("spec_store_bypass_disable", handle_ssbd);
|
||||
|
||||
/* This is the generic flag used by other architectures */
|
||||
static int __init handle_no_ssbd(char *p)
|
||||
{
|
||||
handle_no_stf_barrier(NULL);
|
||||
return 0;
|
||||
}
|
||||
early_param("nospec_store_bypass_disable", handle_no_ssbd);
|
||||
|
||||
static void stf_barrier_enable(bool enable)
|
||||
{
|
||||
if (enable)
|
||||
do_stf_barrier_fixups(stf_enabled_flush_types);
|
||||
else
|
||||
do_stf_barrier_fixups(STF_BARRIER_NONE);
|
||||
|
||||
stf_barrier = enable;
|
||||
}
|
||||
|
||||
void setup_stf_barrier(void)
|
||||
{
|
||||
enum stf_barrier_type type;
|
||||
bool enable, hv;
|
||||
|
||||
hv = cpu_has_feature(CPU_FTR_HVMODE);
|
||||
|
||||
/* Default to fallback in case fw-features are not available */
|
||||
if (cpu_has_feature(CPU_FTR_ARCH_300))
|
||||
type = STF_BARRIER_EIEIO;
|
||||
else if (cpu_has_feature(CPU_FTR_ARCH_207S))
|
||||
type = STF_BARRIER_SYNC_ORI;
|
||||
else if (cpu_has_feature(CPU_FTR_ARCH_206))
|
||||
type = STF_BARRIER_FALLBACK;
|
||||
else
|
||||
type = STF_BARRIER_NONE;
|
||||
|
||||
enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
|
||||
(security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
|
||||
(security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
|
||||
|
||||
if (type == STF_BARRIER_FALLBACK) {
|
||||
pr_info("stf-barrier: fallback barrier available\n");
|
||||
} else if (type == STF_BARRIER_SYNC_ORI) {
|
||||
pr_info("stf-barrier: hwsync barrier available\n");
|
||||
} else if (type == STF_BARRIER_EIEIO) {
|
||||
pr_info("stf-barrier: eieio barrier available\n");
|
||||
}
|
||||
|
||||
stf_enabled_flush_types = type;
|
||||
|
||||
if (!no_stf_barrier)
|
||||
stf_barrier_enable(enable);
|
||||
}
|
||||
|
||||
ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
|
||||
{
|
||||
if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
|
||||
const char *type;
|
||||
switch (stf_enabled_flush_types) {
|
||||
case STF_BARRIER_EIEIO:
|
||||
type = "eieio";
|
||||
break;
|
||||
case STF_BARRIER_SYNC_ORI:
|
||||
type = "hwsync";
|
||||
break;
|
||||
case STF_BARRIER_FALLBACK:
|
||||
type = "fallback";
|
||||
break;
|
||||
default:
|
||||
type = "unknown";
|
||||
}
|
||||
return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
|
||||
}
|
||||
|
||||
if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
|
||||
!security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
|
||||
return sprintf(buf, "Not affected\n");
|
||||
|
||||
return sprintf(buf, "Vulnerable\n");
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
static int stf_barrier_set(void *data, u64 val)
|
||||
{
|
||||
bool enable;
|
||||
|
||||
if (val == 1)
|
||||
enable = true;
|
||||
else if (val == 0)
|
||||
enable = false;
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
/* Only do anything if we're changing state */
|
||||
if (enable != stf_barrier)
|
||||
stf_barrier_enable(enable);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int stf_barrier_get(void *data, u64 *val)
|
||||
{
|
||||
*val = stf_barrier ? 1 : 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n");
|
||||
|
||||
static __init int stf_barrier_debugfs_init(void)
|
||||
{
|
||||
debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier);
|
||||
return 0;
|
||||
}
|
||||
device_initcall(stf_barrier_debugfs_init);
|
||||
#endif /* CONFIG_DEBUG_FS */
|
||||
|
|
|
@ -133,6 +133,20 @@ SECTIONS
|
|||
RO_DATA(PAGE_SIZE)
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
. = ALIGN(8);
|
||||
__stf_entry_barrier_fixup : AT(ADDR(__stf_entry_barrier_fixup) - LOAD_OFFSET) {
|
||||
__start___stf_entry_barrier_fixup = .;
|
||||
*(__stf_entry_barrier_fixup)
|
||||
__stop___stf_entry_barrier_fixup = .;
|
||||
}
|
||||
|
||||
. = ALIGN(8);
|
||||
__stf_exit_barrier_fixup : AT(ADDR(__stf_exit_barrier_fixup) - LOAD_OFFSET) {
|
||||
__start___stf_exit_barrier_fixup = .;
|
||||
*(__stf_exit_barrier_fixup)
|
||||
__stop___stf_exit_barrier_fixup = .;
|
||||
}
|
||||
|
||||
. = ALIGN(8);
|
||||
__rfi_flush_fixup : AT(ADDR(__rfi_flush_fixup) - LOAD_OFFSET) {
|
||||
__start___rfi_flush_fixup = .;
|
||||
|
|
|
@ -23,6 +23,7 @@
|
|||
#include <asm/page.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/security_features.h>
|
||||
#include <asm/firmware.h>
|
||||
|
||||
struct fixup_entry {
|
||||
|
@ -117,6 +118,120 @@ void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3S_64
|
||||
void do_stf_entry_barrier_fixups(enum stf_barrier_type types)
|
||||
{
|
||||
unsigned int instrs[3], *dest;
|
||||
long *start, *end;
|
||||
int i;
|
||||
|
||||
start = PTRRELOC(&__start___stf_entry_barrier_fixup),
|
||||
end = PTRRELOC(&__stop___stf_entry_barrier_fixup);
|
||||
|
||||
instrs[0] = 0x60000000; /* nop */
|
||||
instrs[1] = 0x60000000; /* nop */
|
||||
instrs[2] = 0x60000000; /* nop */
|
||||
|
||||
i = 0;
|
||||
if (types & STF_BARRIER_FALLBACK) {
|
||||
instrs[i++] = 0x7d4802a6; /* mflr r10 */
|
||||
instrs[i++] = 0x60000000; /* branch patched below */
|
||||
instrs[i++] = 0x7d4803a6; /* mtlr r10 */
|
||||
} else if (types & STF_BARRIER_EIEIO) {
|
||||
instrs[i++] = 0x7e0006ac; /* eieio + bit 6 hint */
|
||||
} else if (types & STF_BARRIER_SYNC_ORI) {
|
||||
instrs[i++] = 0x7c0004ac; /* hwsync */
|
||||
instrs[i++] = 0xe94d0000; /* ld r10,0(r13) */
|
||||
instrs[i++] = 0x63ff0000; /* ori 31,31,0 speculation barrier */
|
||||
}
|
||||
|
||||
for (i = 0; start < end; start++, i++) {
|
||||
dest = (void *)start + *start;
|
||||
|
||||
pr_devel("patching dest %lx\n", (unsigned long)dest);
|
||||
|
||||
patch_instruction(dest, instrs[0]);
|
||||
|
||||
if (types & STF_BARRIER_FALLBACK)
|
||||
patch_branch(dest + 1, (unsigned long)&stf_barrier_fallback,
|
||||
BRANCH_SET_LINK);
|
||||
else
|
||||
patch_instruction(dest + 1, instrs[1]);
|
||||
|
||||
patch_instruction(dest + 2, instrs[2]);
|
||||
}
|
||||
|
||||
printk(KERN_DEBUG "stf-barrier: patched %d entry locations (%s barrier)\n", i,
|
||||
(types == STF_BARRIER_NONE) ? "no" :
|
||||
(types == STF_BARRIER_FALLBACK) ? "fallback" :
|
||||
(types == STF_BARRIER_EIEIO) ? "eieio" :
|
||||
(types == (STF_BARRIER_SYNC_ORI)) ? "hwsync"
|
||||
: "unknown");
|
||||
}
|
||||
|
||||
void do_stf_exit_barrier_fixups(enum stf_barrier_type types)
|
||||
{
|
||||
unsigned int instrs[6], *dest;
|
||||
long *start, *end;
|
||||
int i;
|
||||
|
||||
start = PTRRELOC(&__start___stf_exit_barrier_fixup),
|
||||
end = PTRRELOC(&__stop___stf_exit_barrier_fixup);
|
||||
|
||||
instrs[0] = 0x60000000; /* nop */
|
||||
instrs[1] = 0x60000000; /* nop */
|
||||
instrs[2] = 0x60000000; /* nop */
|
||||
instrs[3] = 0x60000000; /* nop */
|
||||
instrs[4] = 0x60000000; /* nop */
|
||||
instrs[5] = 0x60000000; /* nop */
|
||||
|
||||
i = 0;
|
||||
if (types & STF_BARRIER_FALLBACK || types & STF_BARRIER_SYNC_ORI) {
|
||||
if (cpu_has_feature(CPU_FTR_HVMODE)) {
|
||||
instrs[i++] = 0x7db14ba6; /* mtspr 0x131, r13 (HSPRG1) */
|
||||
instrs[i++] = 0x7db04aa6; /* mfspr r13, 0x130 (HSPRG0) */
|
||||
} else {
|
||||
instrs[i++] = 0x7db243a6; /* mtsprg 2,r13 */
|
||||
instrs[i++] = 0x7db142a6; /* mfsprg r13,1 */
|
||||
}
|
||||
instrs[i++] = 0x7c0004ac; /* hwsync */
|
||||
instrs[i++] = 0xe9ad0000; /* ld r13,0(r13) */
|
||||
instrs[i++] = 0x63ff0000; /* ori 31,31,0 speculation barrier */
|
||||
if (cpu_has_feature(CPU_FTR_HVMODE)) {
|
||||
instrs[i++] = 0x7db14aa6; /* mfspr r13, 0x131 (HSPRG1) */
|
||||
} else {
|
||||
instrs[i++] = 0x7db242a6; /* mfsprg r13,2 */
|
||||
}
|
||||
} else if (types & STF_BARRIER_EIEIO) {
|
||||
instrs[i++] = 0x7e0006ac; /* eieio + bit 6 hint */
|
||||
}
|
||||
|
||||
for (i = 0; start < end; start++, i++) {
|
||||
dest = (void *)start + *start;
|
||||
|
||||
pr_devel("patching dest %lx\n", (unsigned long)dest);
|
||||
|
||||
patch_instruction(dest, instrs[0]);
|
||||
patch_instruction(dest + 1, instrs[1]);
|
||||
patch_instruction(dest + 2, instrs[2]);
|
||||
patch_instruction(dest + 3, instrs[3]);
|
||||
patch_instruction(dest + 4, instrs[4]);
|
||||
patch_instruction(dest + 5, instrs[5]);
|
||||
}
|
||||
printk(KERN_DEBUG "stf-barrier: patched %d exit locations (%s barrier)\n", i,
|
||||
(types == STF_BARRIER_NONE) ? "no" :
|
||||
(types == STF_BARRIER_FALLBACK) ? "fallback" :
|
||||
(types == STF_BARRIER_EIEIO) ? "eieio" :
|
||||
(types == (STF_BARRIER_SYNC_ORI)) ? "hwsync"
|
||||
: "unknown");
|
||||
}
|
||||
|
||||
|
||||
void do_stf_barrier_fixups(enum stf_barrier_type types)
|
||||
{
|
||||
do_stf_entry_barrier_fixups(types);
|
||||
do_stf_exit_barrier_fixups(types);
|
||||
}
|
||||
|
||||
void do_rfi_flush_fixups(enum l1d_flush_type types)
|
||||
{
|
||||
unsigned int instrs[3], *dest;
|
||||
|
|
|
@ -44,6 +44,10 @@ static ssize_t opal_nvram_read(char *buf, size_t count, loff_t *index)
|
|||
return count;
|
||||
}
|
||||
|
||||
/*
|
||||
* This can be called in the panic path with interrupts off, so use
|
||||
* mdelay in that case.
|
||||
*/
|
||||
static ssize_t opal_nvram_write(char *buf, size_t count, loff_t *index)
|
||||
{
|
||||
s64 rc = OPAL_BUSY;
|
||||
|
@ -58,10 +62,16 @@ static ssize_t opal_nvram_write(char *buf, size_t count, loff_t *index)
|
|||
while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
|
||||
rc = opal_write_nvram(__pa(buf), count, off);
|
||||
if (rc == OPAL_BUSY_EVENT) {
|
||||
msleep(OPAL_BUSY_DELAY_MS);
|
||||
if (in_interrupt() || irqs_disabled())
|
||||
mdelay(OPAL_BUSY_DELAY_MS);
|
||||
else
|
||||
msleep(OPAL_BUSY_DELAY_MS);
|
||||
opal_poll_events(NULL);
|
||||
} else if (rc == OPAL_BUSY) {
|
||||
msleep(OPAL_BUSY_DELAY_MS);
|
||||
if (in_interrupt() || irqs_disabled())
|
||||
mdelay(OPAL_BUSY_DELAY_MS);
|
||||
else
|
||||
msleep(OPAL_BUSY_DELAY_MS);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -131,6 +131,7 @@ static void __init pnv_setup_arch(void)
|
|||
set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
|
||||
|
||||
pnv_setup_rfi_flush();
|
||||
setup_stf_barrier();
|
||||
|
||||
/* Initialize SMP */
|
||||
pnv_smp_init();
|
||||
|
|
|
@ -710,6 +710,7 @@ static void __init pSeries_setup_arch(void)
|
|||
fwnmi_init();
|
||||
|
||||
pseries_setup_rfi_flush();
|
||||
setup_stf_barrier();
|
||||
|
||||
/* By default, only probe PCI (can be overridden by rtas_pci) */
|
||||
pci_add_flags(PCI_PROBE_ONLY);
|
||||
|
|
|
@ -261,9 +261,9 @@ CONFIG_IP_VS_NQ=m
|
|||
CONFIG_IP_VS_FTP=m
|
||||
CONFIG_IP_VS_PE_SIP=m
|
||||
CONFIG_NF_CONNTRACK_IPV4=m
|
||||
CONFIG_NF_TABLES_IPV4=m
|
||||
CONFIG_NF_TABLES_IPV4=y
|
||||
CONFIG_NFT_CHAIN_ROUTE_IPV4=m
|
||||
CONFIG_NF_TABLES_ARP=m
|
||||
CONFIG_NF_TABLES_ARP=y
|
||||
CONFIG_NFT_CHAIN_NAT_IPV4=m
|
||||
CONFIG_IP_NF_IPTABLES=m
|
||||
CONFIG_IP_NF_MATCH_AH=m
|
||||
|
@ -284,7 +284,7 @@ CONFIG_IP_NF_ARPTABLES=m
|
|||
CONFIG_IP_NF_ARPFILTER=m
|
||||
CONFIG_IP_NF_ARP_MANGLE=m
|
||||
CONFIG_NF_CONNTRACK_IPV6=m
|
||||
CONFIG_NF_TABLES_IPV6=m
|
||||
CONFIG_NF_TABLES_IPV6=y
|
||||
CONFIG_NFT_CHAIN_ROUTE_IPV6=m
|
||||
CONFIG_NFT_CHAIN_NAT_IPV6=m
|
||||
CONFIG_IP6_NF_IPTABLES=m
|
||||
|
@ -305,7 +305,7 @@ CONFIG_IP6_NF_RAW=m
|
|||
CONFIG_IP6_NF_SECURITY=m
|
||||
CONFIG_IP6_NF_NAT=m
|
||||
CONFIG_IP6_NF_TARGET_MASQUERADE=m
|
||||
CONFIG_NF_TABLES_BRIDGE=m
|
||||
CONFIG_NF_TABLES_BRIDGE=y
|
||||
CONFIG_RDS=m
|
||||
CONFIG_RDS_RDMA=m
|
||||
CONFIG_RDS_TCP=m
|
||||
|
@ -604,7 +604,6 @@ CONFIG_DETECT_HUNG_TASK=y
|
|||
CONFIG_WQ_WATCHDOG=y
|
||||
CONFIG_PANIC_ON_OOPS=y
|
||||
CONFIG_DEBUG_TIMEKEEPING=y
|
||||
CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y
|
||||
CONFIG_PROVE_LOCKING=y
|
||||
CONFIG_LOCK_STAT=y
|
||||
CONFIG_DEBUG_LOCKDEP=y
|
||||
|
|
|
@ -259,9 +259,9 @@ CONFIG_IP_VS_NQ=m
|
|||
CONFIG_IP_VS_FTP=m
|
||||
CONFIG_IP_VS_PE_SIP=m
|
||||
CONFIG_NF_CONNTRACK_IPV4=m
|
||||
CONFIG_NF_TABLES_IPV4=m
|
||||
CONFIG_NF_TABLES_IPV4=y
|
||||
CONFIG_NFT_CHAIN_ROUTE_IPV4=m
|
||||
CONFIG_NF_TABLES_ARP=m
|
||||
CONFIG_NF_TABLES_ARP=y
|
||||
CONFIG_NFT_CHAIN_NAT_IPV4=m
|
||||
CONFIG_IP_NF_IPTABLES=m
|
||||
CONFIG_IP_NF_MATCH_AH=m
|
||||
|
@ -282,7 +282,7 @@ CONFIG_IP_NF_ARPTABLES=m
|
|||
CONFIG_IP_NF_ARPFILTER=m
|
||||
CONFIG_IP_NF_ARP_MANGLE=m
|
||||
CONFIG_NF_CONNTRACK_IPV6=m
|
||||
CONFIG_NF_TABLES_IPV6=m
|
||||
CONFIG_NF_TABLES_IPV6=y
|
||||
CONFIG_NFT_CHAIN_ROUTE_IPV6=m
|
||||
CONFIG_NFT_CHAIN_NAT_IPV6=m
|
||||
CONFIG_IP6_NF_IPTABLES=m
|
||||
|
@ -303,7 +303,7 @@ CONFIG_IP6_NF_RAW=m
|
|||
CONFIG_IP6_NF_SECURITY=m
|
||||
CONFIG_IP6_NF_NAT=m
|
||||
CONFIG_IP6_NF_TARGET_MASQUERADE=m
|
||||
CONFIG_NF_TABLES_BRIDGE=m
|
||||
CONFIG_NF_TABLES_BRIDGE=y
|
||||
CONFIG_RDS=m
|
||||
CONFIG_RDS_RDMA=m
|
||||
CONFIG_RDS_TCP=m
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include <asm/vx-insn.h>
|
||||
|
||||
/* Vector register range containing CRC-32 constants */
|
||||
|
@ -67,6 +68,8 @@
|
|||
|
||||
.previous
|
||||
|
||||
GEN_BR_THUNK %r14
|
||||
|
||||
.text
|
||||
/*
|
||||
* The CRC-32 function(s) use these calling conventions:
|
||||
|
@ -203,6 +206,6 @@ ENTRY(crc32_be_vgfm_16)
|
|||
|
||||
.Ldone:
|
||||
VLGVF %r2,%v2,3
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
.previous
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include <asm/vx-insn.h>
|
||||
|
||||
/* Vector register range containing CRC-32 constants */
|
||||
|
@ -76,6 +77,7 @@
|
|||
|
||||
.previous
|
||||
|
||||
GEN_BR_THUNK %r14
|
||||
|
||||
.text
|
||||
|
||||
|
@ -264,6 +266,6 @@ crc32_le_vgfm_generic:
|
|||
|
||||
.Ldone:
|
||||
VLGVF %r2,%v2,2
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
.previous
|
||||
|
|
|
@ -0,0 +1,196 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _ASM_S390_NOSPEC_ASM_H
|
||||
#define _ASM_S390_NOSPEC_ASM_H
|
||||
|
||||
#include <asm/alternative-asm.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/dwarf.h>
|
||||
|
||||
#ifdef __ASSEMBLY__
|
||||
|
||||
#ifdef CONFIG_EXPOLINE
|
||||
|
||||
_LC_BR_R1 = __LC_BR_R1
|
||||
|
||||
/*
|
||||
* The expoline macros are used to create thunks in the same format
|
||||
* as gcc generates them. The 'comdat' section flag makes sure that
|
||||
* the various thunks are merged into a single copy.
|
||||
*/
|
||||
.macro __THUNK_PROLOG_NAME name
|
||||
.pushsection .text.\name,"axG",@progbits,\name,comdat
|
||||
.globl \name
|
||||
.hidden \name
|
||||
.type \name,@function
|
||||
\name:
|
||||
CFI_STARTPROC
|
||||
.endm
|
||||
|
||||
.macro __THUNK_EPILOG
|
||||
CFI_ENDPROC
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
.macro __THUNK_PROLOG_BR r1,r2
|
||||
__THUNK_PROLOG_NAME __s390x_indirect_jump_r\r2\()use_r\r1
|
||||
.endm
|
||||
|
||||
.macro __THUNK_PROLOG_BC d0,r1,r2
|
||||
__THUNK_PROLOG_NAME __s390x_indirect_branch_\d0\()_\r2\()use_\r1
|
||||
.endm
|
||||
|
||||
.macro __THUNK_BR r1,r2
|
||||
jg __s390x_indirect_jump_r\r2\()use_r\r1
|
||||
.endm
|
||||
|
||||
.macro __THUNK_BC d0,r1,r2
|
||||
jg __s390x_indirect_branch_\d0\()_\r2\()use_\r1
|
||||
.endm
|
||||
|
||||
.macro __THUNK_BRASL r1,r2,r3
|
||||
brasl \r1,__s390x_indirect_jump_r\r3\()use_r\r2
|
||||
.endm
|
||||
|
||||
.macro __DECODE_RR expand,reg,ruse
|
||||
.set __decode_fail,1
|
||||
.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
.ifc \reg,%r\r1
|
||||
.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
.ifc \ruse,%r\r2
|
||||
\expand \r1,\r2
|
||||
.set __decode_fail,0
|
||||
.endif
|
||||
.endr
|
||||
.endif
|
||||
.endr
|
||||
.if __decode_fail == 1
|
||||
.error "__DECODE_RR failed"
|
||||
.endif
|
||||
.endm
|
||||
|
||||
.macro __DECODE_RRR expand,rsave,rtarget,ruse
|
||||
.set __decode_fail,1
|
||||
.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
.ifc \rsave,%r\r1
|
||||
.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
.ifc \rtarget,%r\r2
|
||||
.irp r3,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
.ifc \ruse,%r\r3
|
||||
\expand \r1,\r2,\r3
|
||||
.set __decode_fail,0
|
||||
.endif
|
||||
.endr
|
||||
.endif
|
||||
.endr
|
||||
.endif
|
||||
.endr
|
||||
.if __decode_fail == 1
|
||||
.error "__DECODE_RRR failed"
|
||||
.endif
|
||||
.endm
|
||||
|
||||
.macro __DECODE_DRR expand,disp,reg,ruse
|
||||
.set __decode_fail,1
|
||||
.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
.ifc \reg,%r\r1
|
||||
.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
.ifc \ruse,%r\r2
|
||||
\expand \disp,\r1,\r2
|
||||
.set __decode_fail,0
|
||||
.endif
|
||||
.endr
|
||||
.endif
|
||||
.endr
|
||||
.if __decode_fail == 1
|
||||
.error "__DECODE_DRR failed"
|
||||
.endif
|
||||
.endm
|
||||
|
||||
.macro __THUNK_EX_BR reg,ruse
|
||||
# Be very careful when adding instructions to this macro!
|
||||
# The ALTERNATIVE replacement code has a .+10 which targets
|
||||
# the "br \reg" after the code has been patched.
|
||||
#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
|
||||
exrl 0,555f
|
||||
j .
|
||||
#else
|
||||
.ifc \reg,%r1
|
||||
ALTERNATIVE "ex %r0,_LC_BR_R1", ".insn ril,0xc60000000000,0,.+10", 35
|
||||
j .
|
||||
.else
|
||||
larl \ruse,555f
|
||||
ex 0,0(\ruse)
|
||||
j .
|
||||
.endif
|
||||
#endif
|
||||
555: br \reg
|
||||
.endm
|
||||
|
||||
.macro __THUNK_EX_BC disp,reg,ruse
|
||||
#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
|
||||
exrl 0,556f
|
||||
j .
|
||||
#else
|
||||
larl \ruse,556f
|
||||
ex 0,0(\ruse)
|
||||
j .
|
||||
#endif
|
||||
556: b \disp(\reg)
|
||||
.endm
|
||||
|
||||
.macro GEN_BR_THUNK reg,ruse=%r1
|
||||
__DECODE_RR __THUNK_PROLOG_BR,\reg,\ruse
|
||||
__THUNK_EX_BR \reg,\ruse
|
||||
__THUNK_EPILOG
|
||||
.endm
|
||||
|
||||
.macro GEN_B_THUNK disp,reg,ruse=%r1
|
||||
__DECODE_DRR __THUNK_PROLOG_BC,\disp,\reg,\ruse
|
||||
__THUNK_EX_BC \disp,\reg,\ruse
|
||||
__THUNK_EPILOG
|
||||
.endm
|
||||
|
||||
.macro BR_EX reg,ruse=%r1
|
||||
557: __DECODE_RR __THUNK_BR,\reg,\ruse
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 557b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
.macro B_EX disp,reg,ruse=%r1
|
||||
558: __DECODE_DRR __THUNK_BC,\disp,\reg,\ruse
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 558b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
.macro BASR_EX rsave,rtarget,ruse=%r1
|
||||
559: __DECODE_RRR __THUNK_BRASL,\rsave,\rtarget,\ruse
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 559b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
#else
|
||||
.macro GEN_BR_THUNK reg,ruse=%r1
|
||||
.endm
|
||||
|
||||
.macro GEN_B_THUNK disp,reg,ruse=%r1
|
||||
.endm
|
||||
|
||||
.macro BR_EX reg,ruse=%r1
|
||||
br \reg
|
||||
.endm
|
||||
|
||||
.macro B_EX disp,reg,ruse=%r1
|
||||
b \disp(\reg)
|
||||
.endm
|
||||
|
||||
.macro BASR_EX rsave,rtarget,ruse=%r1
|
||||
basr \rsave,\rtarget
|
||||
.endm
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_S390_NOSPEC_ASM_H */
|
|
@ -13,5 +13,11 @@
|
|||
|
||||
int verify_sha256_digest(void);
|
||||
|
||||
extern u64 kernel_entry;
|
||||
extern u64 kernel_type;
|
||||
|
||||
extern u64 crash_start;
|
||||
extern u64 crash_size;
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* _S390_PURGATORY_H_ */
|
||||
|
|
|
@ -65,6 +65,7 @@ obj-y += nospec-branch.o
|
|||
|
||||
extra-y += head.o head64.o vmlinux.lds
|
||||
|
||||
obj-$(CONFIG_SYSFS) += nospec-sysfs.o
|
||||
CFLAGS_REMOVE_nospec-branch.o += $(CC_FLAGS_EXPOLINE)
|
||||
|
||||
obj-$(CONFIG_MODULES) += module.o
|
||||
|
|
|
@ -181,6 +181,7 @@ int main(void)
|
|||
OFFSET(__LC_MACHINE_FLAGS, lowcore, machine_flags);
|
||||
OFFSET(__LC_PREEMPT_COUNT, lowcore, preempt_count);
|
||||
OFFSET(__LC_GMAP, lowcore, gmap);
|
||||
OFFSET(__LC_BR_R1, lowcore, br_r1_trampoline);
|
||||
/* software defined ABI-relevant lowcore locations 0xe00 - 0xe20 */
|
||||
OFFSET(__LC_DUMP_REIPL, lowcore, ipib);
|
||||
/* hardware defined lowcore locations 0x1000 - 0x18ff */
|
||||
|
|
|
@ -9,18 +9,22 @@
|
|||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/sigp.h>
|
||||
|
||||
GEN_BR_THUNK %r9
|
||||
GEN_BR_THUNK %r14
|
||||
|
||||
ENTRY(s390_base_mcck_handler)
|
||||
basr %r13,0
|
||||
0: lg %r15,__LC_PANIC_STACK # load panic stack
|
||||
aghi %r15,-STACK_FRAME_OVERHEAD
|
||||
larl %r1,s390_base_mcck_handler_fn
|
||||
lg %r1,0(%r1)
|
||||
ltgr %r1,%r1
|
||||
lg %r9,0(%r1)
|
||||
ltgr %r9,%r9
|
||||
jz 1f
|
||||
basr %r14,%r1
|
||||
BASR_EX %r14,%r9
|
||||
1: la %r1,4095
|
||||
lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
|
||||
lpswe __LC_MCK_OLD_PSW
|
||||
|
@ -37,10 +41,10 @@ ENTRY(s390_base_ext_handler)
|
|||
basr %r13,0
|
||||
0: aghi %r15,-STACK_FRAME_OVERHEAD
|
||||
larl %r1,s390_base_ext_handler_fn
|
||||
lg %r1,0(%r1)
|
||||
ltgr %r1,%r1
|
||||
lg %r9,0(%r1)
|
||||
ltgr %r9,%r9
|
||||
jz 1f
|
||||
basr %r14,%r1
|
||||
BASR_EX %r14,%r9
|
||||
1: lmg %r0,%r15,__LC_SAVE_AREA_ASYNC
|
||||
ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
|
||||
lpswe __LC_EXT_OLD_PSW
|
||||
|
@ -57,10 +61,10 @@ ENTRY(s390_base_pgm_handler)
|
|||
basr %r13,0
|
||||
0: aghi %r15,-STACK_FRAME_OVERHEAD
|
||||
larl %r1,s390_base_pgm_handler_fn
|
||||
lg %r1,0(%r1)
|
||||
ltgr %r1,%r1
|
||||
lg %r9,0(%r1)
|
||||
ltgr %r9,%r9
|
||||
jz 1f
|
||||
basr %r14,%r1
|
||||
BASR_EX %r14,%r9
|
||||
lmg %r0,%r15,__LC_SAVE_AREA_SYNC
|
||||
lpswe __LC_PGM_OLD_PSW
|
||||
1: lpswe disabled_wait_psw-0b(%r13)
|
||||
|
@ -117,7 +121,7 @@ ENTRY(diag308_reset)
|
|||
larl %r4,.Lcontinue_psw # Restore PSW flags
|
||||
lpswe 0(%r4)
|
||||
.Lcontinue:
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.align 16
|
||||
.Lrestart_psw:
|
||||
.long 0x00080000,0x80000000 + .Lrestart_part2
|
||||
|
|
|
@ -28,6 +28,7 @@
|
|||
#include <asm/setup.h>
|
||||
#include <asm/nmi.h>
|
||||
#include <asm/export.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
|
||||
__PT_R0 = __PT_GPRS
|
||||
__PT_R1 = __PT_GPRS + 8
|
||||
|
@ -183,67 +184,9 @@ _LPP_OFFSET = __LC_LPP
|
|||
"jnz .+8; .long 0xb2e8d000", 82
|
||||
.endm
|
||||
|
||||
#ifdef CONFIG_EXPOLINE
|
||||
|
||||
.macro GEN_BR_THUNK name,reg,tmp
|
||||
.section .text.\name,"axG",@progbits,\name,comdat
|
||||
.globl \name
|
||||
.hidden \name
|
||||
.type \name,@function
|
||||
\name:
|
||||
CFI_STARTPROC
|
||||
#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
|
||||
exrl 0,0f
|
||||
#else
|
||||
larl \tmp,0f
|
||||
ex 0,0(\tmp)
|
||||
#endif
|
||||
j .
|
||||
0: br \reg
|
||||
CFI_ENDPROC
|
||||
.endm
|
||||
|
||||
GEN_BR_THUNK __s390x_indirect_jump_r1use_r9,%r9,%r1
|
||||
GEN_BR_THUNK __s390x_indirect_jump_r1use_r14,%r14,%r1
|
||||
GEN_BR_THUNK __s390x_indirect_jump_r11use_r14,%r14,%r11
|
||||
|
||||
.macro BASR_R14_R9
|
||||
0: brasl %r14,__s390x_indirect_jump_r1use_r9
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 0b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
.macro BR_R1USE_R14
|
||||
0: jg __s390x_indirect_jump_r1use_r14
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 0b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
.macro BR_R11USE_R14
|
||||
0: jg __s390x_indirect_jump_r11use_r14
|
||||
.pushsection .s390_indirect_branches,"a",@progbits
|
||||
.long 0b-.
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
#else /* CONFIG_EXPOLINE */
|
||||
|
||||
.macro BASR_R14_R9
|
||||
basr %r14,%r9
|
||||
.endm
|
||||
|
||||
.macro BR_R1USE_R14
|
||||
br %r14
|
||||
.endm
|
||||
|
||||
.macro BR_R11USE_R14
|
||||
br %r14
|
||||
.endm
|
||||
|
||||
#endif /* CONFIG_EXPOLINE */
|
||||
|
||||
GEN_BR_THUNK %r9
|
||||
GEN_BR_THUNK %r14
|
||||
GEN_BR_THUNK %r14,%r11
|
||||
|
||||
.section .kprobes.text, "ax"
|
||||
.Ldummy:
|
||||
|
@ -260,7 +203,7 @@ _LPP_OFFSET = __LC_LPP
|
|||
ENTRY(__bpon)
|
||||
.globl __bpon
|
||||
BPON
|
||||
BR_R1USE_R14
|
||||
BR_EX %r14
|
||||
|
||||
/*
|
||||
* Scheduler resume function, called by switch_to
|
||||
|
@ -284,7 +227,7 @@ ENTRY(__switch_to)
|
|||
mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next
|
||||
lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
|
||||
ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
|
||||
BR_R1USE_R14
|
||||
BR_EX %r14
|
||||
|
||||
.L__critical_start:
|
||||
|
||||
|
@ -351,7 +294,7 @@ sie_exit:
|
|||
xgr %r5,%r5
|
||||
lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
|
||||
lg %r2,__SF_SIE_REASON(%r15) # return exit reason code
|
||||
BR_R1USE_R14
|
||||
BR_EX %r14
|
||||
.Lsie_fault:
|
||||
lghi %r14,-EFAULT
|
||||
stg %r14,__SF_SIE_REASON(%r15) # set exit reason code
|
||||
|
@ -410,7 +353,7 @@ ENTRY(system_call)
|
|||
lgf %r9,0(%r8,%r10) # get system call add.
|
||||
TSTMSK __TI_flags(%r12),_TIF_TRACE
|
||||
jnz .Lsysc_tracesys
|
||||
BASR_R14_R9 # call sys_xxxx
|
||||
BASR_EX %r14,%r9 # call sys_xxxx
|
||||
stg %r2,__PT_R2(%r11) # store return value
|
||||
|
||||
.Lsysc_return:
|
||||
|
@ -595,7 +538,7 @@ ENTRY(system_call)
|
|||
lmg %r3,%r7,__PT_R3(%r11)
|
||||
stg %r7,STACK_FRAME_OVERHEAD(%r15)
|
||||
lg %r2,__PT_ORIG_GPR2(%r11)
|
||||
BASR_R14_R9 # call sys_xxx
|
||||
BASR_EX %r14,%r9 # call sys_xxx
|
||||
stg %r2,__PT_R2(%r11) # store return value
|
||||
.Lsysc_tracenogo:
|
||||
TSTMSK __TI_flags(%r12),_TIF_TRACE
|
||||
|
@ -619,7 +562,7 @@ ENTRY(ret_from_fork)
|
|||
lmg %r9,%r10,__PT_R9(%r11) # load gprs
|
||||
ENTRY(kernel_thread_starter)
|
||||
la %r2,0(%r10)
|
||||
BASR_R14_R9
|
||||
BASR_EX %r14,%r9
|
||||
j .Lsysc_tracenogo
|
||||
|
||||
/*
|
||||
|
@ -701,7 +644,7 @@ ENTRY(pgm_check_handler)
|
|||
je .Lpgm_return
|
||||
lgf %r9,0(%r10,%r1) # load address of handler routine
|
||||
lgr %r2,%r11 # pass pointer to pt_regs
|
||||
BASR_R14_R9 # branch to interrupt-handler
|
||||
BASR_EX %r14,%r9 # branch to interrupt-handler
|
||||
.Lpgm_return:
|
||||
LOCKDEP_SYS_EXIT
|
||||
tm __PT_PSW+1(%r11),0x01 # returning to user ?
|
||||
|
@ -1019,7 +962,7 @@ ENTRY(psw_idle)
|
|||
stpt __TIMER_IDLE_ENTER(%r2)
|
||||
.Lpsw_idle_lpsw:
|
||||
lpswe __SF_EMPTY(%r15)
|
||||
BR_R1USE_R14
|
||||
BR_EX %r14
|
||||
.Lpsw_idle_end:
|
||||
|
||||
/*
|
||||
|
@ -1061,7 +1004,7 @@ ENTRY(save_fpu_regs)
|
|||
.Lsave_fpu_regs_done:
|
||||
oi __LC_CPU_FLAGS+7,_CIF_FPU
|
||||
.Lsave_fpu_regs_exit:
|
||||
BR_R1USE_R14
|
||||
BR_EX %r14
|
||||
.Lsave_fpu_regs_end:
|
||||
EXPORT_SYMBOL(save_fpu_regs)
|
||||
|
||||
|
@ -1107,7 +1050,7 @@ load_fpu_regs:
|
|||
.Lload_fpu_regs_done:
|
||||
ni __LC_CPU_FLAGS+7,255-_CIF_FPU
|
||||
.Lload_fpu_regs_exit:
|
||||
BR_R1USE_R14
|
||||
BR_EX %r14
|
||||
.Lload_fpu_regs_end:
|
||||
|
||||
.L__critical_end:
|
||||
|
@ -1322,7 +1265,7 @@ cleanup_critical:
|
|||
jl 0f
|
||||
clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
|
||||
jl .Lcleanup_load_fpu_regs
|
||||
0: BR_R11USE_R14
|
||||
0: BR_EX %r14
|
||||
|
||||
.align 8
|
||||
.Lcleanup_table:
|
||||
|
@ -1358,7 +1301,7 @@ cleanup_critical:
|
|||
ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
|
||||
lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
|
||||
larl %r9,sie_exit # skip forward to sie_exit
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14
|
||||
#endif
|
||||
|
||||
.Lcleanup_system_call:
|
||||
|
@ -1412,7 +1355,7 @@ cleanup_critical:
|
|||
stg %r15,56(%r11) # r15 stack pointer
|
||||
# set new psw address and exit
|
||||
larl %r9,.Lsysc_do_svc
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
.Lcleanup_system_call_insn:
|
||||
.quad system_call
|
||||
.quad .Lsysc_stmg
|
||||
|
@ -1424,7 +1367,7 @@ cleanup_critical:
|
|||
|
||||
.Lcleanup_sysc_tif:
|
||||
larl %r9,.Lsysc_tif
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
|
||||
.Lcleanup_sysc_restore:
|
||||
# check if stpt has been executed
|
||||
|
@ -1441,14 +1384,14 @@ cleanup_critical:
|
|||
mvc 0(64,%r11),__PT_R8(%r9)
|
||||
lmg %r0,%r7,__PT_R0(%r9)
|
||||
1: lmg %r8,%r9,__LC_RETURN_PSW
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
.Lcleanup_sysc_restore_insn:
|
||||
.quad .Lsysc_exit_timer
|
||||
.quad .Lsysc_done - 4
|
||||
|
||||
.Lcleanup_io_tif:
|
||||
larl %r9,.Lio_tif
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
|
||||
.Lcleanup_io_restore:
|
||||
# check if stpt has been executed
|
||||
|
@ -1462,7 +1405,7 @@ cleanup_critical:
|
|||
mvc 0(64,%r11),__PT_R8(%r9)
|
||||
lmg %r0,%r7,__PT_R0(%r9)
|
||||
1: lmg %r8,%r9,__LC_RETURN_PSW
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
.Lcleanup_io_restore_insn:
|
||||
.quad .Lio_exit_timer
|
||||
.quad .Lio_done - 4
|
||||
|
@ -1515,17 +1458,17 @@ cleanup_critical:
|
|||
# prepare return psw
|
||||
nihh %r8,0xfcfd # clear irq & wait state bits
|
||||
lg %r9,48(%r11) # return from psw_idle
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
.Lcleanup_idle_insn:
|
||||
.quad .Lpsw_idle_lpsw
|
||||
|
||||
.Lcleanup_save_fpu_regs:
|
||||
larl %r9,save_fpu_regs
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
|
||||
.Lcleanup_load_fpu_regs:
|
||||
larl %r9,load_fpu_regs
|
||||
BR_R11USE_R14
|
||||
BR_EX %r14,%r11
|
||||
|
||||
/*
|
||||
* Integer constants
|
||||
|
|
|
@ -176,10 +176,9 @@ void do_softirq_own_stack(void)
|
|||
new -= STACK_FRAME_OVERHEAD;
|
||||
((struct stack_frame *) new)->back_chain = old;
|
||||
asm volatile(" la 15,0(%0)\n"
|
||||
" basr 14,%2\n"
|
||||
" brasl 14,__do_softirq\n"
|
||||
" la 15,0(%1)\n"
|
||||
: : "a" (new), "a" (old),
|
||||
"a" (__do_softirq)
|
||||
: : "a" (new), "a" (old)
|
||||
: "0", "1", "2", "3", "4", "5", "14",
|
||||
"cc", "memory" );
|
||||
} else {
|
||||
|
|
|
@ -9,13 +9,17 @@
|
|||
#include <linux/linkage.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/ftrace.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/export.h>
|
||||
|
||||
GEN_BR_THUNK %r1
|
||||
GEN_BR_THUNK %r14
|
||||
|
||||
.section .kprobes.text, "ax"
|
||||
|
||||
ENTRY(ftrace_stub)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
#define STACK_FRAME_SIZE (STACK_FRAME_OVERHEAD + __PT_SIZE)
|
||||
#define STACK_PTREGS (STACK_FRAME_OVERHEAD)
|
||||
|
@ -23,7 +27,7 @@ ENTRY(ftrace_stub)
|
|||
#define STACK_PTREGS_PSW (STACK_PTREGS + __PT_PSW)
|
||||
|
||||
ENTRY(_mcount)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
EXPORT_SYMBOL(_mcount)
|
||||
|
||||
|
@ -53,7 +57,7 @@ ENTRY(ftrace_caller)
|
|||
#endif
|
||||
lgr %r3,%r14
|
||||
la %r5,STACK_PTREGS(%r15)
|
||||
basr %r14,%r1
|
||||
BASR_EX %r14,%r1
|
||||
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
|
||||
# The j instruction gets runtime patched to a nop instruction.
|
||||
# See ftrace_enable_ftrace_graph_caller.
|
||||
|
@ -68,7 +72,7 @@ ftrace_graph_caller_end:
|
|||
#endif
|
||||
lg %r1,(STACK_PTREGS_PSW+8)(%r15)
|
||||
lmg %r2,%r15,(STACK_PTREGS_GPRS+2*8)(%r15)
|
||||
br %r1
|
||||
BR_EX %r1
|
||||
|
||||
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
|
||||
|
||||
|
@ -81,6 +85,6 @@ ENTRY(return_to_handler)
|
|||
aghi %r15,STACK_FRAME_OVERHEAD
|
||||
lgr %r14,%r2
|
||||
lmg %r2,%r5,32(%r15)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
#endif
|
||||
|
|
|
@ -1,7 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <linux/module.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <asm/nospec-branch.h>
|
||||
|
||||
static int __init nobp_setup_early(char *str)
|
||||
|
@ -44,24 +43,6 @@ static int __init nospec_report(void)
|
|||
}
|
||||
arch_initcall(nospec_report);
|
||||
|
||||
#ifdef CONFIG_SYSFS
|
||||
ssize_t cpu_show_spectre_v1(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
return sprintf(buf, "Mitigation: __user pointer sanitization\n");
|
||||
}
|
||||
|
||||
ssize_t cpu_show_spectre_v2(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable)
|
||||
return sprintf(buf, "Mitigation: execute trampolines\n");
|
||||
if (__test_facility(82, S390_lowcore.alt_stfle_fac_list))
|
||||
return sprintf(buf, "Mitigation: limited branch prediction.\n");
|
||||
return sprintf(buf, "Vulnerable\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_EXPOLINE
|
||||
|
||||
int nospec_disable = IS_ENABLED(CONFIG_EXPOLINE_OFF);
|
||||
|
@ -112,7 +93,6 @@ static void __init_or_module __nospec_revert(s32 *start, s32 *end)
|
|||
s32 *epo;
|
||||
|
||||
/* Second part of the instruction replace is always a nop */
|
||||
memcpy(insnbuf + 2, (char[]) { 0x47, 0x00, 0x00, 0x00 }, 4);
|
||||
for (epo = start; epo < end; epo++) {
|
||||
instr = (u8 *) epo + *epo;
|
||||
if (instr[0] == 0xc0 && (instr[1] & 0x0f) == 0x04)
|
||||
|
@ -133,18 +113,34 @@ static void __init_or_module __nospec_revert(s32 *start, s32 *end)
|
|||
br = thunk + (*(int *)(thunk + 2)) * 2;
|
||||
else
|
||||
continue;
|
||||
if (br[0] != 0x07 || (br[1] & 0xf0) != 0xf0)
|
||||
/* Check for unconditional branch 0x07f? or 0x47f???? */
|
||||
if ((br[0] & 0xbf) != 0x07 || (br[1] & 0xf0) != 0xf0)
|
||||
continue;
|
||||
|
||||
memcpy(insnbuf + 2, (char[]) { 0x47, 0x00, 0x07, 0x00 }, 4);
|
||||
switch (type) {
|
||||
case BRCL_EXPOLINE:
|
||||
/* brcl to thunk, replace with br + nop */
|
||||
insnbuf[0] = br[0];
|
||||
insnbuf[1] = (instr[1] & 0xf0) | (br[1] & 0x0f);
|
||||
if (br[0] == 0x47) {
|
||||
/* brcl to b, replace with bc + nopr */
|
||||
insnbuf[2] = br[2];
|
||||
insnbuf[3] = br[3];
|
||||
} else {
|
||||
/* brcl to br, replace with bcr + nop */
|
||||
}
|
||||
break;
|
||||
case BRASL_EXPOLINE:
|
||||
/* brasl to thunk, replace with basr + nop */
|
||||
insnbuf[0] = 0x0d;
|
||||
insnbuf[1] = (instr[1] & 0xf0) | (br[1] & 0x0f);
|
||||
if (br[0] == 0x47) {
|
||||
/* brasl to b, replace with bas + nopr */
|
||||
insnbuf[0] = 0x4d;
|
||||
insnbuf[2] = br[2];
|
||||
insnbuf[3] = br[3];
|
||||
} else {
|
||||
/* brasl to br, replace with basr + nop */
|
||||
insnbuf[0] = 0x0d;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
@ -0,0 +1,21 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <linux/device.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <asm/facility.h>
|
||||
#include <asm/nospec-branch.h>
|
||||
|
||||
ssize_t cpu_show_spectre_v1(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
return sprintf(buf, "Mitigation: __user pointer sanitization\n");
|
||||
}
|
||||
|
||||
ssize_t cpu_show_spectre_v2(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable)
|
||||
return sprintf(buf, "Mitigation: execute trampolines\n");
|
||||
if (__test_facility(82, S390_lowcore.alt_stfle_fac_list))
|
||||
return sprintf(buf, "Mitigation: limited branch prediction\n");
|
||||
return sprintf(buf, "Vulnerable\n");
|
||||
}
|
|
@ -753,6 +753,10 @@ static int __hw_perf_event_init(struct perf_event *event)
|
|||
*/
|
||||
rate = 0;
|
||||
if (attr->freq) {
|
||||
if (!attr->sample_freq) {
|
||||
err = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
rate = freq_to_sample_rate(&si, attr->sample_freq);
|
||||
rate = hw_limit_rate(&si, rate);
|
||||
attr->freq = 0;
|
||||
|
|
|
@ -7,8 +7,11 @@
|
|||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include <asm/sigp.h>
|
||||
|
||||
GEN_BR_THUNK %r9
|
||||
|
||||
#
|
||||
# Issue "store status" for the current CPU to its prefix page
|
||||
# and call passed function afterwards
|
||||
|
@ -67,9 +70,9 @@ ENTRY(store_status)
|
|||
st %r4,0(%r1)
|
||||
st %r5,4(%r1)
|
||||
stg %r2,8(%r1)
|
||||
lgr %r1,%r2
|
||||
lgr %r9,%r2
|
||||
lgr %r2,%r3
|
||||
br %r1
|
||||
BR_EX %r9
|
||||
|
||||
.section .bss
|
||||
.align 8
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <asm/ptrace.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include <asm/sigp.h>
|
||||
|
||||
/*
|
||||
|
@ -24,6 +25,8 @@
|
|||
* (see below) in the resume process.
|
||||
* This function runs with disabled interrupts.
|
||||
*/
|
||||
GEN_BR_THUNK %r14
|
||||
|
||||
.section .text
|
||||
ENTRY(swsusp_arch_suspend)
|
||||
stmg %r6,%r15,__SF_GPRS(%r15)
|
||||
|
@ -103,7 +106,7 @@ ENTRY(swsusp_arch_suspend)
|
|||
spx 0x318(%r1)
|
||||
lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
|
||||
lghi %r2,0
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
/*
|
||||
* Restore saved memory image to correct place and restore register context.
|
||||
|
@ -197,11 +200,10 @@ pgm_check_entry:
|
|||
larl %r15,init_thread_union
|
||||
ahi %r15,1<<(PAGE_SHIFT+THREAD_SIZE_ORDER)
|
||||
larl %r2,.Lpanic_string
|
||||
larl %r3,sclp_early_printk
|
||||
lghi %r1,0
|
||||
sam31
|
||||
sigp %r1,%r0,SIGP_SET_ARCHITECTURE
|
||||
basr %r14,%r3
|
||||
brasl %r14,sclp_early_printk
|
||||
larl %r3,.Ldisabled_wait_31
|
||||
lpsw 0(%r3)
|
||||
4:
|
||||
|
@ -267,7 +269,7 @@ restore_registers:
|
|||
/* Return 0 */
|
||||
lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
|
||||
lghi %r2,0
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
|
||||
.section .data..nosave,"aw",@progbits
|
||||
.align 8
|
||||
|
|
|
@ -7,6 +7,9 @@
|
|||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/export.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
|
||||
GEN_BR_THUNK %r14
|
||||
|
||||
/*
|
||||
* void *memmove(void *dest, const void *src, size_t n)
|
||||
|
@ -33,14 +36,14 @@ ENTRY(memmove)
|
|||
.Lmemmove_forward_remainder:
|
||||
larl %r5,.Lmemmove_mvc
|
||||
ex %r4,0(%r5)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.Lmemmove_reverse:
|
||||
ic %r0,0(%r4,%r3)
|
||||
stc %r0,0(%r4,%r1)
|
||||
brctg %r4,.Lmemmove_reverse
|
||||
ic %r0,0(%r4,%r3)
|
||||
stc %r0,0(%r4,%r1)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.Lmemmove_mvc:
|
||||
mvc 0(1,%r1),0(%r3)
|
||||
EXPORT_SYMBOL(memmove)
|
||||
|
@ -77,7 +80,7 @@ ENTRY(memset)
|
|||
.Lmemset_clear_remainder:
|
||||
larl %r3,.Lmemset_xc
|
||||
ex %r4,0(%r3)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.Lmemset_fill:
|
||||
cghi %r4,1
|
||||
lgr %r1,%r2
|
||||
|
@ -95,10 +98,10 @@ ENTRY(memset)
|
|||
stc %r3,0(%r1)
|
||||
larl %r5,.Lmemset_mvc
|
||||
ex %r4,0(%r5)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.Lmemset_fill_exit:
|
||||
stc %r3,0(%r1)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.Lmemset_xc:
|
||||
xc 0(1,%r1),0(%r1)
|
||||
.Lmemset_mvc:
|
||||
|
@ -121,7 +124,7 @@ ENTRY(memcpy)
|
|||
.Lmemcpy_remainder:
|
||||
larl %r5,.Lmemcpy_mvc
|
||||
ex %r4,0(%r5)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.Lmemcpy_loop:
|
||||
mvc 0(256,%r1),0(%r3)
|
||||
la %r1,256(%r1)
|
||||
|
@ -159,10 +162,10 @@ ENTRY(__memset\bits)
|
|||
\insn %r3,0(%r1)
|
||||
larl %r5,.L__memset_mvc\bits
|
||||
ex %r4,0(%r5)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.L__memset_exit\bits:
|
||||
\insn %r3,0(%r2)
|
||||
br %r14
|
||||
BR_EX %r14
|
||||
.L__memset_mvc\bits:
|
||||
mvc \bytes(1,%r1),0(%r1)
|
||||
.endm
|
||||
|
|
|
@ -9,6 +9,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/nospec-insn.h>
|
||||
#include "bpf_jit.h"
|
||||
|
||||
/*
|
||||
|
@ -54,7 +55,7 @@ ENTRY(sk_load_##NAME##_pos); \
|
|||
clg %r3,STK_OFF_HLEN(%r15); /* Offset + SIZE > hlen? */ \
|
||||
jh sk_load_##NAME##_slow; \
|
||||
LOAD %r14,-SIZE(%r3,%r12); /* Get data from skb */ \
|
||||
b OFF_OK(%r6); /* Return */ \
|
||||
B_EX OFF_OK,%r6; /* Return */ \
|
||||
\
|
||||
sk_load_##NAME##_slow:; \
|
||||
lgr %r2,%r7; /* Arg1 = skb pointer */ \
|
||||
|
@ -64,11 +65,14 @@ sk_load_##NAME##_slow:; \
|
|||
brasl %r14,skb_copy_bits; /* Get data from skb */ \
|
||||
LOAD %r14,STK_OFF_TMP(%r15); /* Load from temp bufffer */ \
|
||||
ltgr %r2,%r2; /* Set cc to (%r2 != 0) */ \
|
||||
br %r6; /* Return */
|
||||
BR_EX %r6; /* Return */
|
||||
|
||||
sk_load_common(word, 4, llgf) /* r14 = *(u32 *) (skb->data+offset) */
|
||||
sk_load_common(half, 2, llgh) /* r14 = *(u16 *) (skb->data+offset) */
|
||||
|
||||
GEN_BR_THUNK %r6
|
||||
GEN_B_THUNK OFF_OK,%r6
|
||||
|
||||
/*
|
||||
* Load 1 byte from SKB (optimized version)
|
||||
*/
|
||||
|
@ -80,7 +84,7 @@ ENTRY(sk_load_byte_pos)
|
|||
clg %r3,STK_OFF_HLEN(%r15) # Offset >= hlen?
|
||||
jnl sk_load_byte_slow
|
||||
llgc %r14,0(%r3,%r12) # Get byte from skb
|
||||
b OFF_OK(%r6) # Return OK
|
||||
B_EX OFF_OK,%r6 # Return OK
|
||||
|
||||
sk_load_byte_slow:
|
||||
lgr %r2,%r7 # Arg1 = skb pointer
|
||||
|
@ -90,7 +94,7 @@ sk_load_byte_slow:
|
|||
brasl %r14,skb_copy_bits # Get data from skb
|
||||
llgc %r14,STK_OFF_TMP(%r15) # Load result from temp buffer
|
||||
ltgr %r2,%r2 # Set cc to (%r2 != 0)
|
||||
br %r6 # Return cc
|
||||
BR_EX %r6 # Return cc
|
||||
|
||||
#define sk_negative_common(NAME, SIZE, LOAD) \
|
||||
sk_load_##NAME##_slow_neg:; \
|
||||
|
@ -104,7 +108,7 @@ sk_load_##NAME##_slow_neg:; \
|
|||
jz bpf_error; \
|
||||
LOAD %r14,0(%r2); /* Get data from pointer */ \
|
||||
xr %r3,%r3; /* Set cc to zero */ \
|
||||
br %r6; /* Return cc */
|
||||
BR_EX %r6; /* Return cc */
|
||||
|
||||
sk_negative_common(word, 4, llgf)
|
||||
sk_negative_common(half, 2, llgh)
|
||||
|
@ -113,4 +117,4 @@ sk_negative_common(byte, 1, llgc)
|
|||
bpf_error:
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# force a return 0 from jit handler
|
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ltgr %r15,%r15 # Set condition code
|
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br %r6
|
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BR_EX %r6
|
||||
|
|
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