spi/spi_s3c64xx: Warn if PIO transfers time out
When using PIO we have a timeout for the TX and RX FIFOs to ensure that the data actually gets transferred. Warn if we hit that timeout - it should never happen, but this makes sure we'll find out if it does. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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c3f139b655
Коммит
be7852a839
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@ -200,6 +200,9 @@ static void flush_fifo(struct s3c64xx_spi_driver_data *sdd)
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val = readl(regs + S3C64XX_SPI_STATUS);
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} while (TX_FIFO_LVL(val, sci) && loops--);
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if (loops == 0)
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dev_warn(&sdd->pdev->dev, "Timed out flushing TX FIFO\n");
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/* Flush RxFIFO*/
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loops = msecs_to_loops(1);
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do {
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@ -210,6 +213,9 @@ static void flush_fifo(struct s3c64xx_spi_driver_data *sdd)
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break;
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} while (loops--);
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if (loops == 0)
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dev_warn(&sdd->pdev->dev, "Timed out flushing RX FIFO\n");
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val = readl(regs + S3C64XX_SPI_CH_CFG);
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val &= ~S3C64XX_SPI_CH_SW_RST;
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writel(val, regs + S3C64XX_SPI_CH_CFG);
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