soc: fsl: qe: convert QE interrupt controller to platform_device
Since 5.13 QE's ucc nodes can't get interrupts from devicetree: ucc@2000 { cell-index = <1>; reg = <0x2000 0x200>; interrupts = <32>; interrupt-parent = <&qeic>; }; Now fw_devlink expects driver to create and probe a struct device for interrupt controller. So lets convert this driver to simple platform_device with probe(). Also use platform_get_ and devm_ family function to get/allocate resources and drop unused .compatible = "qeic". [1] - https://lore.kernel.org/lkml/CAGETcx9PiX==mLxB9PO8Myyk6u2vhPVwTMsA5NkD-ywH5xhusw@mail.gmail.com Fixes:e590474768
("driver core: Set fw_devlink=on by default") Fixes:ea718c6990
("Revert "Revert "driver core: Set fw_devlink=on by default""") Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Saravana Kannan <saravanak@google.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
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e73f0f0ee7
Коммит
be7ecbd240
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@ -23,6 +23,7 @@
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#include <linux/signal.h>
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#include <linux/device.h>
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#include <linux/spinlock.h>
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#include <linux/platform_device.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <soc/fsl/qe/qe.h>
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@ -404,41 +405,40 @@ static void qe_ic_cascade_muxed_mpic(struct irq_desc *desc)
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chip->irq_eoi(&desc->irq_data);
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}
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static void __init qe_ic_init(struct device_node *node)
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static int qe_ic_init(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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void (*low_handler)(struct irq_desc *desc);
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void (*high_handler)(struct irq_desc *desc);
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struct qe_ic *qe_ic;
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struct resource res;
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u32 ret;
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struct resource *res;
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struct device_node *node = pdev->dev.of_node;
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ret = of_address_to_resource(node, 0, &res);
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if (ret)
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return;
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qe_ic = kzalloc(sizeof(*qe_ic), GFP_KERNEL);
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if (qe_ic == NULL)
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return;
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qe_ic->irqhost = irq_domain_add_linear(node, NR_QE_IC_INTS,
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&qe_ic_host_ops, qe_ic);
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if (qe_ic->irqhost == NULL) {
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kfree(qe_ic);
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return;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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dev_err(dev, "no memory resource defined\n");
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return -ENODEV;
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}
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qe_ic->regs = ioremap(res.start, resource_size(&res));
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qe_ic = devm_kzalloc(dev, sizeof(*qe_ic), GFP_KERNEL);
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if (qe_ic == NULL)
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return -ENOMEM;
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qe_ic->regs = devm_ioremap(dev, res->start, resource_size(res));
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if (qe_ic->regs == NULL) {
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dev_err(dev, "failed to ioremap() registers\n");
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return -ENODEV;
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}
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qe_ic->hc_irq = qe_ic_irq_chip;
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qe_ic->virq_high = irq_of_parse_and_map(node, 0);
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qe_ic->virq_low = irq_of_parse_and_map(node, 1);
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qe_ic->virq_high = platform_get_irq(pdev, 0);
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qe_ic->virq_low = platform_get_irq(pdev, 1);
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if (!qe_ic->virq_low) {
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printk(KERN_ERR "Failed to map QE_IC low IRQ\n");
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kfree(qe_ic);
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return;
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if (qe_ic->virq_low < 0) {
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return -ENODEV;
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}
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if (qe_ic->virq_high != qe_ic->virq_low) {
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low_handler = qe_ic_cascade_low;
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high_handler = qe_ic_cascade_high;
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@ -447,6 +447,13 @@ static void __init qe_ic_init(struct device_node *node)
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high_handler = NULL;
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}
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qe_ic->irqhost = irq_domain_add_linear(node, NR_QE_IC_INTS,
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&qe_ic_host_ops, qe_ic);
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if (qe_ic->irqhost == NULL) {
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dev_err(dev, "failed to add irq domain\n");
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return -ENODEV;
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}
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qe_ic_write(qe_ic->regs, QEIC_CICR, 0);
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irq_set_handler_data(qe_ic->virq_low, qe_ic);
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@ -456,20 +463,26 @@ static void __init qe_ic_init(struct device_node *node)
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irq_set_handler_data(qe_ic->virq_high, qe_ic);
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irq_set_chained_handler(qe_ic->virq_high, high_handler);
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}
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return 0;
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}
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static const struct of_device_id qe_ic_ids[] = {
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{ .compatible = "fsl,qe-ic"},
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{ .type = "qeic"},
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{},
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};
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static struct platform_driver qe_ic_driver =
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{
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.driver = {
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.name = "qe-ic",
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.of_match_table = qe_ic_ids,
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},
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.probe = qe_ic_init,
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};
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static int __init qe_ic_of_init(void)
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{
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struct device_node *np;
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np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
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if (!np) {
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np = of_find_node_by_type(NULL, "qeic");
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if (!np)
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return -ENODEV;
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}
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qe_ic_init(np);
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of_node_put(np);
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platform_driver_register(&qe_ic_driver);
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return 0;
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}
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subsys_initcall(qe_ic_of_init);
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