ARM: footbridge: remove custom DMA address handling
Footbridge is the last Arm platform that has its own __virt_to_bus()/__bus_to_virt()/phys_to_dma()/dma_to_phys() abstraction, but this is just a simple offset now. For PCI devices, the offset that is programmed into the PCI bridge must also be set in each device using dma_direct_set_offset(). As Arm does not have a pcibios_bus_add_device() helper yet, just use a bus notifier for this. For the ISA DMA, drivers now pass a non-translated physical address into set_dma_addr(), so they have to be converted back with the corresponding isa_bus_to_virt() function and then into the correct bus address with the offset using the isa_dma_dev. Tested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -1 +0,0 @@
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#include <mach/dma-direct.h>
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@ -106,7 +106,7 @@ extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg);
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*/
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extern void __set_dma_addr(unsigned int chan, void *addr);
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#define set_dma_addr(chan, addr) \
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__set_dma_addr(chan, (void *)__bus_to_virt(addr))
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__set_dma_addr(chan, (void *)isa_bus_to_virt(addr))
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/* Set the DMA byte count for this channel
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*
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@ -22,6 +22,13 @@
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#define DC21285_IO(x) (x)
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#endif
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/*
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* The footbridge is programmed to expose the system RAM at 0xe0000000.
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* The requirement is that the RAM isn't placed at bus address 0, which
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* would clash with VGA cards.
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*/
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#define BUS_OFFSET 0xe0000000
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#define CSR_PCICMD DC21285_IO(0x0004)
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#define CSR_CLASSREV DC21285_IO(0x0008)
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#define CSR_PCICACHELINESIZE DC21285_IO(0x000c)
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@ -369,17 +369,6 @@ static inline unsigned long __virt_to_idmap(unsigned long x)
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#define virt_to_idmap(x) __virt_to_idmap((unsigned long)(x))
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/*
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* Virtual <-> DMA view memory address translations
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* Again, these are *only* valid on the kernel direct mapped RAM
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* memory. Use of these is *deprecated* (and that doesn't mean
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* use the __ prefixed forms instead.) See dma-mapping.h.
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*/
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#ifndef __virt_to_bus
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#define __virt_to_bus __virt_to_phys
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#define __bus_to_virt __phys_to_virt
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#endif
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/*
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* Conversion between a struct page and a physical address.
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*
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@ -46,7 +46,6 @@ endmenu
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# Footbridge support
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config FOOTBRIDGE
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def_bool y
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select ARCH_HAS_PHYS_TO_DMA
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select ARCH_MIGHT_HAVE_PC_SERIO
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select ISA_DMA_API
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@ -281,13 +281,3 @@ void footbridge_restart(enum reboot_mode mode, const char *cmd)
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*CSR_SA110_CNTL |= (1 << 13);
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}
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}
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dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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return paddr + (BUS_OFFSET - PHYS_OFFSET);
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}
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phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
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{
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return dev_addr - (BUS_OFFSET - PHYS_OFFSET);
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}
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@ -5,6 +5,7 @@
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* Copyright (C) 1998-2001 Russell King
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* Copyright (C) 1998-2000 Phil Blundell
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*/
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#include <linux/dma-map-ops.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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@ -241,6 +242,22 @@ static irqreturn_t dc21285_parity_irq(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static int dc21285_pci_bus_notifier(struct notifier_block *nb,
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unsigned long action,
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void *data)
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{
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if (action != BUS_NOTIFY_ADD_DEVICE)
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return NOTIFY_DONE;
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dma_direct_set_offset(data, PHYS_OFFSET, BUS_OFFSET, SZ_256M);
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return NOTIFY_OK;
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}
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static struct notifier_block dc21285_pci_bus_nb = {
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.notifier_call = dc21285_pci_bus_notifier,
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};
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int __init dc21285_setup(int nr, struct pci_sys_data *sys)
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{
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struct resource *res;
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@ -266,6 +283,8 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
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pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
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pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
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bus_register_notifier(&pci_bus_type, &dc21285_pci_bus_nb);
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return 1;
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}
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@ -329,7 +348,7 @@ void __init dc21285_preinit(void)
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*/
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*CSR_PCICSRBASE = 0xf4000000;
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*CSR_PCICSRIOBASE = 0;
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*CSR_PCISDRAMBASE = __virt_to_bus(PAGE_OFFSET);
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*CSR_PCISDRAMBASE = BUS_OFFSET;
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*CSR_PCIROMBASE = 0;
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*CSR_PCICMD = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
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PCI_COMMAND_INVALIDATE | PCICMD_ERROR_BITS;
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@ -11,6 +11,7 @@
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* arch/arm/kernel/dma-ebsa285.c
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* Copyright (C) 1998 Phil Blundell
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*/
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#include <linux/dma-map-ops.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/dma-mapping.h>
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@ -18,6 +19,7 @@
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#include <asm/dma.h>
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#include <asm/mach/dma.h>
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#include <asm/hardware/dec21285.h>
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#define ISA_DMA_MASK 0
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#define ISA_DMA_MODE 1
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@ -221,6 +223,8 @@ static int __init isa_dma_init(void)
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request_dma(DMA_ISA_CASCADE, "cascade");
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}
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dma_direct_set_offset(&isa_dma_dev, PHYS_OFFSET, BUS_OFFSET, SZ_256M);
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return 0;
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}
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core_initcall(isa_dma_init);
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@ -1,8 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef MACH_FOOTBRIDGE_DMA_DIRECT_H
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#define MACH_FOOTBRIDGE_DMA_DIRECT_H 1
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dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
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phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr);
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#endif /* MACH_FOOTBRIDGE_DMA_DIRECT_H */
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@ -16,15 +16,6 @@
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#ifndef __ASM_ARCH_MEMORY_H
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#define __ASM_ARCH_MEMORY_H
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/*
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* The footbridge is programmed to expose the system RAM at 0xe0000000.
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* The requirement is that the RAM isn't placed at bus address 0, which
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* would clash with VGA cards.
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*/
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#define BUS_OFFSET 0xe0000000
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#define __virt_to_bus(x) ((x) + (BUS_OFFSET - PAGE_OFFSET))
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#define __bus_to_virt(x) ((x) - (BUS_OFFSET - PAGE_OFFSET))
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/*
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* Cache flushing area.
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*/
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