perf/x86/cstate: Use Intel Model name macros
This should be getting old by now. Use the new macros intead of open-coded magic numbers. Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave@sr71.net> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kan Liang <kan.liang@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: jacob.jun.pan@intel.com Link: http://lkml.kernel.org/r/20160603001940.FE69D646@viggo.jf.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -89,6 +89,7 @@
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#include <linux/slab.h>
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#include <linux/perf_event.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include "../perf_event.h"
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MODULE_LICENSE("GPL");
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@ -511,37 +512,37 @@ static const struct cstate_model slm_cstates __initconst = {
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{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long) &(states) }
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static const struct x86_cpu_id intel_cstates_match[] __initconst = {
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X86_CSTATES_MODEL(30, nhm_cstates), /* 45nm Nehalem */
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X86_CSTATES_MODEL(26, nhm_cstates), /* 45nm Nehalem-EP */
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X86_CSTATES_MODEL(46, nhm_cstates), /* 45nm Nehalem-EX */
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X86_CSTATES_MODEL(INTEL_FAM6_NEHALEM, nhm_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_NEHALEM_EP, nhm_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_NEHALEM_EX, nhm_cstates),
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X86_CSTATES_MODEL(37, nhm_cstates), /* 32nm Westmere */
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X86_CSTATES_MODEL(44, nhm_cstates), /* 32nm Westmere-EP */
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X86_CSTATES_MODEL(47, nhm_cstates), /* 32nm Westmere-EX */
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X86_CSTATES_MODEL(INTEL_FAM6_WESTMERE, nhm_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_WESTMERE_EP, nhm_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_WESTMERE_EX, nhm_cstates),
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X86_CSTATES_MODEL(42, snb_cstates), /* 32nm SandyBridge */
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X86_CSTATES_MODEL(45, snb_cstates), /* 32nm SandyBridge-E/EN/EP */
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X86_CSTATES_MODEL(INTEL_FAM6_SANDYBRIDGE, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_SANDYBRIDGE_X, snb_cstates),
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X86_CSTATES_MODEL(58, snb_cstates), /* 22nm IvyBridge */
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X86_CSTATES_MODEL(62, snb_cstates), /* 22nm IvyBridge-EP/EX */
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X86_CSTATES_MODEL(INTEL_FAM6_IVYBRIDGE, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_IVYBRIDGE_X, snb_cstates),
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X86_CSTATES_MODEL(60, snb_cstates), /* 22nm Haswell Core */
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X86_CSTATES_MODEL(63, snb_cstates), /* 22nm Haswell Server */
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X86_CSTATES_MODEL(70, snb_cstates), /* 22nm Haswell + GT3e */
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X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_CORE, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_X, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_GT3E, snb_cstates),
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X86_CSTATES_MODEL(69, hswult_cstates), /* 22nm Haswell ULT */
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X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_ULT, hswult_cstates),
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X86_CSTATES_MODEL(55, slm_cstates), /* 22nm Atom Silvermont */
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X86_CSTATES_MODEL(77, slm_cstates), /* 22nm Atom Avoton/Rangely */
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X86_CSTATES_MODEL(76, slm_cstates), /* 22nm Atom Airmont */
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X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT1, slm_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT2, slm_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_ATOM_AIRMONT, slm_cstates),
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X86_CSTATES_MODEL(61, snb_cstates), /* 14nm Broadwell Core-M */
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X86_CSTATES_MODEL(86, snb_cstates), /* 14nm Broadwell Xeon D */
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X86_CSTATES_MODEL(71, snb_cstates), /* 14nm Broadwell + GT3e */
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X86_CSTATES_MODEL(79, snb_cstates), /* 14nm Broadwell Server */
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X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_CORE, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_XEON_D, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_GT3E, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_X, snb_cstates),
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X86_CSTATES_MODEL(78, snb_cstates), /* 14nm Skylake Mobile */
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X86_CSTATES_MODEL(94, snb_cstates), /* 14nm Skylake Desktop */
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X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_MOBILE, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_DESKTOP, snb_cstates),
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{ },
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};
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MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);
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