[wireless ipw2200] trim trailing whitespace
This commit is contained in:
Jeff Garzik
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@ -1,23 +1,23 @@
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/******************************************************************************
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Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
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This program is free software; you can redistribute it and/or modify it
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under the terms of version 2 of the GNU General Public License as
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This program is free software; you can redistribute it and/or modify it
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under the terms of version 2 of the GNU General Public License as
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published by the Free Software Foundation.
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This program is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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This program is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc., 59
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this program; if not, write to the Free Software Foundation, Inc., 59
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Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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The full GNU General Public License is included in this distribution in the
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file called LICENSE.
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Contact Information:
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James P. Ketrenos <ipw2100-admin@linux.intel.com>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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@ -55,8 +55,8 @@
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#ifndef IRQ_NONE
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typedef void irqreturn_t;
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#define IRQ_NONE
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#define IRQ_HANDLED
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#define IRQ_NONE
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#define IRQ_HANDLED
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#define IRQ_RETVAL(x)
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#endif
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@ -179,18 +179,18 @@ enum connection_manager_assoc_states
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#define IPW_B_MODE 1
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#define IPW_G_MODE 2
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/*
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* TX Queue Flag Definitions
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/*
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* TX Queue Flag Definitions
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*/
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/* abort attempt if mgmt frame is rx'd */
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#define DCT_FLAG_ABORT_MGMT 0x01
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#define DCT_FLAG_ABORT_MGMT 0x01
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/* require CTS */
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#define DCT_FLAG_CTS_REQUIRED 0x02
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/* use short preamble */
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#define DCT_FLAG_SHORT_PREMBL 0x04
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#define DCT_FLAG_SHORT_PREMBL 0x04
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/* RTS/CTS first */
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#define DCT_FLAG_RTS_REQD 0x08
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@ -205,7 +205,7 @@ enum connection_manager_assoc_states
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#define DCT_FLAG_TSF_REQD 0x40
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/* ACK rx is expected to follow */
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#define DCT_FLAG_ACK_REQD 0x80
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#define DCT_FLAG_ACK_REQD 0x80
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#define DCT_FLAG_EXT_MODE_CCK 0x01
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#define DCT_FLAG_EXT_MODE_OFDM 0x00
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@ -238,13 +238,13 @@ enum connection_manager_assoc_states
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#define HOST_NOTIFICATION_CHANNEL_SWITCHED 23
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#define HOST_NOTIFICATION_RX_DURING_QUIET_PERIOD 24
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#define HOST_NOTIFICATION_NOISE_STATS 25
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#define HOST_NOTIFICATION_S36_MEASUREMENT_ACCEPTED 30
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#define HOST_NOTIFICATION_S36_MEASUREMENT_ACCEPTED 30
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#define HOST_NOTIFICATION_S36_MEASUREMENT_REFUSED 31
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#define HOST_NOTIFICATION_STATUS_BEACON_MISSING 1
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#define IPW_MB_DISASSOCIATE_THRESHOLD_DEFAULT 24
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#define IPW_MB_ROAMING_THRESHOLD_DEFAULT 8
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#define IPW_REAL_RATE_RX_PACKET_THRESHOLD 300
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#define IPW_REAL_RATE_RX_PACKET_THRESHOLD 300
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#define MACADRR_BYTE_LEN 6
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@ -258,7 +258,7 @@ enum connection_manager_assoc_states
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/**
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* Generic queue structure
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*
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*
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* Contains common data for Rx and Tx queues
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*/
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struct clx2_queue {
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@ -318,7 +318,7 @@ struct machdr24
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// TX TFD with 32 byte MAC Header
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struct tx_tfd_32
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{
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{
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struct machdr32 mchdr; // 32
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u32 uivplaceholder[2]; // 8
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} __attribute__ ((packed)) ;
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@ -368,8 +368,8 @@ struct tfd_data {
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/* Tx Parameters */
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u8 cmd_id;
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u8 seq_num;
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u16 len;
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u8 seq_num;
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u16 len;
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u8 priority;
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u8 tx_flags;
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u8 tx_flags_ext;
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@ -378,10 +378,10 @@ struct tfd_data {
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u8 rate;
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u8 antenna;
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u16 next_packet_duration;
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u16 next_frag_len;
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u16 next_frag_len;
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u16 back_off_counter; //////txop;
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u8 retrylimit;
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u16 cwcurrent;
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u16 cwcurrent;
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u8 reserved3;
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/* 802.11 MAC Header */
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@ -457,29 +457,29 @@ struct rate_histogram
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} failed;
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} __attribute__ ((packed));
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/* statistics command response */
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/* statistics command response */
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struct ipw_cmd_stats {
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u8 cmd_id;
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u8 seq_num;
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u16 good_sfd;
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u16 bad_plcp;
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u16 wrong_bssid;
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u16 valid_mpdu;
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u16 bad_mac_header;
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u16 reserved_frame_types;
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u16 rx_ina;
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u16 bad_crc32;
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u16 invalid_cts;
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u16 invalid_acks;
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u16 long_distance_ina_fina;
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u16 good_sfd;
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u16 bad_plcp;
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u16 wrong_bssid;
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u16 valid_mpdu;
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u16 bad_mac_header;
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u16 reserved_frame_types;
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u16 rx_ina;
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u16 bad_crc32;
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u16 invalid_cts;
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u16 invalid_acks;
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u16 long_distance_ina_fina;
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u16 dsp_silence_unreachable;
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u16 accumulated_rssi;
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u16 rx_ovfl_frame_tossed;
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u16 accumulated_rssi;
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u16 rx_ovfl_frame_tossed;
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u16 rssi_silence_threshold;
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u16 rx_ovfl_frame_supplied;
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u16 last_rx_frame_signal;
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u16 last_rx_frame_noise;
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u16 rx_autodetec_no_ofdm;
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u16 last_rx_frame_signal;
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u16 last_rx_frame_noise;
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u16 rx_autodetec_no_ofdm;
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u16 rx_autodetec_no_barker;
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u16 reserved;
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} __attribute__ ((packed));
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@ -568,11 +568,11 @@ struct ipw_rx_notification {
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} __attribute__ ((packed));
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struct ipw_rx_frame {
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u32 reserved1;
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u32 reserved1;
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u8 parent_tsf[4]; // fw_use[0] is boolean for OUR_TSF_IS_GREATER
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u8 received_channel; // The channel that this frame was received on.
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// Note that for .11b this does not have to be
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// the same as the channel that it was sent.
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// Note that for .11b this does not have to be
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// the same as the channel that it was sent.
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// Filled by LMAC
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u8 frameStatus;
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u8 rate;
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@ -583,13 +583,13 @@ struct ipw_rx_frame {
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u16 noise;
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u8 antennaAndPhy;
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u8 control; // control bit should be on in bg
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u8 rtscts_rate; // rate of rts or cts (in rts cts sequence rate
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u8 rtscts_rate; // rate of rts or cts (in rts cts sequence rate
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// is identical)
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u8 rtscts_seen; // 0x1 RTS seen ; 0x2 CTS seen
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u16 length;
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u8 data[0];
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} __attribute__ ((packed));
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struct ipw_rx_header {
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u8 message_type;
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u8 rx_seq_num;
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@ -716,8 +716,8 @@ struct ipw_wep_key
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} __attribute__ ((packed));
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struct ipw_tgi_tx_key
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{
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u8 key_id;
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{
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u8 key_id;
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u8 security_type;
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u8 station_index;
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u8 flags;
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@ -727,7 +727,7 @@ struct ipw_tgi_tx_key
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#define IPW_SCAN_CHANNELS 54
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struct ipw_scan_request
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struct ipw_scan_request
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{
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u8 scan_type;
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u16 dwell_time;
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@ -753,7 +753,7 @@ struct ipw_scan_request_ext
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u16 dwell_time[IPW_SCAN_TYPES];
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} __attribute__ ((packed));
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extern inline u8 ipw_get_scan_type(struct ipw_scan_request_ext *scan, u8 index)
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extern inline u8 ipw_get_scan_type(struct ipw_scan_request_ext *scan, u8 index)
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{
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if (index % 2)
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return scan->scan_type[index / 2] & 0x0F;
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@ -761,16 +761,16 @@ extern inline u8 ipw_get_scan_type(struct ipw_scan_request_ext *scan, u8 index)
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return (scan->scan_type[index / 2] & 0xF0) >> 4;
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}
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extern inline void ipw_set_scan_type(struct ipw_scan_request_ext *scan,
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extern inline void ipw_set_scan_type(struct ipw_scan_request_ext *scan,
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u8 index, u8 scan_type)
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{
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if (index % 2)
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scan->scan_type[index / 2] =
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(scan->scan_type[index / 2] & 0xF0) |
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if (index % 2)
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scan->scan_type[index / 2] =
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(scan->scan_type[index / 2] & 0xF0) |
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(scan_type & 0x0F);
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else
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scan->scan_type[index / 2] =
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(scan->scan_type[index / 2] & 0x0F) |
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scan->scan_type[index / 2] =
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(scan->scan_type[index / 2] & 0x0F) |
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((scan_type & 0x0F) << 4);
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}
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@ -909,14 +909,14 @@ struct ipw_sensitivity_calib
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/**
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* Host command structure.
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*
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*
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* On input, the following fields should be filled:
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* - cmd
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* - len
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* - status_len
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* - param (if needed)
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*
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* On output,
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*
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* On output,
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* - \a status contains status;
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* - \a param filled with status parameters.
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*/
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@ -926,8 +926,8 @@ struct ipw_cmd {
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u32 status_len; /**< How many 32 bit parameters in the status */
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u32 len; /**< incoming parameters length, bytes */
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/**
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* command parameters.
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* There should be enough space for incoming and
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* command parameters.
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* There should be enough space for incoming and
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* outcoming parameters.
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* Incoming parameters listed 1-st, followed by outcoming params.
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* nParams=(len+3)/4+status_len
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@ -955,8 +955,8 @@ struct ipw_cmd {
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#define STATUS_STATE_PENDING (1<<13)
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#define STATUS_SCAN_PENDING (1<<20)
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#define STATUS_SCANNING (1<<21)
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#define STATUS_SCAN_ABORTING (1<<22)
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#define STATUS_SCANNING (1<<21)
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#define STATUS_SCAN_ABORTING (1<<22)
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#define STATUS_INDIRECT_BYTE (1<<28) /* sysfs entry configured for access */
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#define STATUS_INDIRECT_DWORD (1<<29) /* sysfs entry configured for access */
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@ -1009,7 +1009,7 @@ struct ipw_priv {
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/* pci hardware address support */
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void __iomem *hw_base;
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unsigned long hw_len;
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struct fw_image_desc sram_desc;
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/* result of ucode download */
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@ -1036,7 +1036,7 @@ struct ipw_priv {
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int rx_pend_max; /**< maximum pending buffers for one IRQ */
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u32 hcmd_seq; /**< sequence number for hcmd */
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u32 missed_beacon_threshold;
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u32 roaming_threshold;
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u32 roaming_threshold;
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struct ipw_associate assoc_request;
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struct ieee80211_network *assoc_network;
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@ -1071,11 +1071,11 @@ struct ipw_priv {
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u8 channel;
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struct ipw_sys_config sys_config;
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u32 power_mode;
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u8 bssid[ETH_ALEN];
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u8 bssid[ETH_ALEN];
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u16 rts_threshold;
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u8 mac_addr[ETH_ALEN];
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u8 num_stations;
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u8 stations[MAX_STATIONS][ETH_ALEN];
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u8 stations[MAX_STATIONS][ETH_ALEN];
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u32 notif_missed_beacons;
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@ -1094,13 +1094,13 @@ struct ipw_priv {
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u32 quality;
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/* eeprom */
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u8 eeprom[0x100]; /* 256 bytes of eeprom */
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u8 eeprom[0x100]; /* 256 bytes of eeprom */
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int eeprom_delay;
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struct iw_statistics wstats;
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struct iw_statistics wstats;
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struct workqueue_struct *workqueue;
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|
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|
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struct work_struct adhoc_check;
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struct work_struct associate;
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struct work_struct disassociate;
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@ -1125,7 +1125,7 @@ struct ipw_priv {
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#define IPW_DEFAULT_TX_POWER 0x14
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u8 tx_power;
|
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|
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#ifdef CONFIG_PM
|
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#ifdef CONFIG_PM
|
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u32 pm_state[16];
|
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#endif
|
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|
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@ -1159,7 +1159,7 @@ do { if (ipw_debug_level & (level)) \
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* list here in the form of:
|
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*
|
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* #define IPW_DL_xxxx VALUE
|
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*
|
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*
|
||||
* shifting value to the left one bit from the previous entry. xxxx should be
|
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* the name of the classification (for example, WEP)
|
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*
|
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@ -1173,7 +1173,7 @@ do { if (ipw_debug_level & (level)) \
|
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*
|
||||
* you simply need to add your entry to the ipw_debug_levels array.
|
||||
*
|
||||
* If you do not see debug_level in /proc/net/ipw then you do not have
|
||||
* If you do not see debug_level in /proc/net/ipw then you do not have
|
||||
* CONFIG_IPW_DEBUG defined in your kernel configuration
|
||||
*
|
||||
*/
|
||||
|
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@ -1247,7 +1247,7 @@ do { if (ipw_debug_level & (level)) \
|
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|
||||
#define DINO_ENABLE_SYSTEM 0x80
|
||||
#define DINO_ENABLE_CS 0x40
|
||||
#define DINO_RXFIFO_DATA 0x01
|
||||
#define DINO_RXFIFO_DATA 0x01
|
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#define DINO_CONTROL_REG 0x00200000
|
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|
||||
#define CX2_INTA_RW 0x00000008
|
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|
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@ -1320,7 +1320,7 @@ do { if (ipw_debug_level & (level)) \
|
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|
||||
#define DMA_CONTROL_SMALL_CB_CONST_VALUE 0x00540000
|
||||
#define DMA_CB_STOP_AND_ABORT 0x00000C00
|
||||
#define DMA_CB_START 0x00000100
|
||||
#define DMA_CB_START 0x00000100
|
||||
|
||||
|
||||
#define CX2_SHARED_SRAM_SIZE 0x00030000
|
||||
|
|
@ -1410,7 +1410,7 @@ do { if (ipw_debug_level & (level)) \
|
|||
#define EEPROM_NIC_TYPE_HP 4
|
||||
|
||||
#define FW_MEM_REG_LOWER_BOUND 0x00300000
|
||||
#define FW_MEM_REG_EEPROM_ACCESS (FW_MEM_REG_LOWER_BOUND + 0x40)
|
||||
#define FW_MEM_REG_EEPROM_ACCESS (FW_MEM_REG_LOWER_BOUND + 0x40)
|
||||
|
||||
#define EEPROM_BIT_SK (1<<0)
|
||||
#define EEPROM_BIT_CS (1<<1)
|
||||
|
|
@ -1506,15 +1506,15 @@ enum {
|
|||
#define IPW_RATE_CONNECT 0
|
||||
|
||||
|
||||
/*
|
||||
* Rate values and masks
|
||||
/*
|
||||
* Rate values and masks
|
||||
*/
|
||||
#define IPW_TX_RATE_1MB 0x0A
|
||||
#define IPW_TX_RATE_2MB 0x14
|
||||
#define IPW_TX_RATE_5MB 0x37
|
||||
#define IPW_TX_RATE_6MB 0x0D
|
||||
#define IPW_TX_RATE_9MB 0x0F
|
||||
#define IPW_TX_RATE_11MB 0x6E
|
||||
#define IPW_TX_RATE_11MB 0x6E
|
||||
#define IPW_TX_RATE_12MB 0x05
|
||||
#define IPW_TX_RATE_18MB 0x07
|
||||
#define IPW_TX_RATE_24MB 0x09
|
||||
|
|
@ -1525,25 +1525,25 @@ enum {
|
|||
#define IPW_ORD_TABLE_ID_MASK 0x0000FF00
|
||||
#define IPW_ORD_TABLE_VALUE_MASK 0x000000FF
|
||||
|
||||
#define IPW_ORD_TABLE_0_MASK 0x0000F000
|
||||
#define IPW_ORD_TABLE_1_MASK 0x0000F100
|
||||
#define IPW_ORD_TABLE_2_MASK 0x0000F200
|
||||
#define IPW_ORD_TABLE_3_MASK 0x0000F300
|
||||
#define IPW_ORD_TABLE_4_MASK 0x0000F400
|
||||
#define IPW_ORD_TABLE_5_MASK 0x0000F500
|
||||
#define IPW_ORD_TABLE_6_MASK 0x0000F600
|
||||
#define IPW_ORD_TABLE_7_MASK 0x0000F700
|
||||
#define IPW_ORD_TABLE_0_MASK 0x0000F000
|
||||
#define IPW_ORD_TABLE_1_MASK 0x0000F100
|
||||
#define IPW_ORD_TABLE_2_MASK 0x0000F200
|
||||
#define IPW_ORD_TABLE_3_MASK 0x0000F300
|
||||
#define IPW_ORD_TABLE_4_MASK 0x0000F400
|
||||
#define IPW_ORD_TABLE_5_MASK 0x0000F500
|
||||
#define IPW_ORD_TABLE_6_MASK 0x0000F600
|
||||
#define IPW_ORD_TABLE_7_MASK 0x0000F700
|
||||
|
||||
/*
|
||||
* Table 0 Entries (all entries are 32 bits)
|
||||
*/
|
||||
enum {
|
||||
enum {
|
||||
IPW_ORD_STAT_TX_CURR_RATE = IPW_ORD_TABLE_0_MASK + 1,
|
||||
IPW_ORD_STAT_FRAG_TRESHOLD,
|
||||
IPW_ORD_STAT_RTS_THRESHOLD,
|
||||
IPW_ORD_STAT_TX_HOST_REQUESTS,
|
||||
IPW_ORD_STAT_TX_HOST_COMPLETE,
|
||||
IPW_ORD_STAT_TX_DIR_DATA,
|
||||
IPW_ORD_STAT_TX_HOST_REQUESTS,
|
||||
IPW_ORD_STAT_TX_HOST_COMPLETE,
|
||||
IPW_ORD_STAT_TX_DIR_DATA,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_B_1,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_B_2,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_B_5_5,
|
||||
|
|
@ -1561,18 +1561,18 @@ enum {
|
|||
IPW_ORD_STAT_TX_DIR_DATA_G_5_5,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_G_6,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_G_9,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_G_11,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_G_11,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_G_12,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_G_18,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_G_24,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_G_36,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_G_48,
|
||||
IPW_ORD_STAT_TX_DIR_DATA_G_54,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_B_1,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_B_2,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_B_5_5,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_B_11,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_B_11,
|
||||
/* Hole */
|
||||
|
||||
|
||||
|
|
@ -1586,7 +1586,7 @@ enum {
|
|||
IPW_ORD_STAT_TX_NON_DIR_DATA_G_5_5,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_G_6,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_G_9,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_G_11,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_G_11,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_G_12,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_G_18,
|
||||
IPW_ORD_STAT_TX_NON_DIR_DATA_G_24,
|
||||
|
|
@ -1601,12 +1601,12 @@ enum {
|
|||
IPW_ORD_STAT_FULL_SCANS,
|
||||
IPW_ORD_STAT_PARTIAL_SCANS,
|
||||
IPW_ORD_STAT_TGH_ABORTED_SCANS,
|
||||
IPW_ORD_STAT_TX_TOTAL_BYTES,
|
||||
IPW_ORD_STAT_TX_TOTAL_BYTES,
|
||||
IPW_ORD_STAT_CURR_RSSI_RAW,
|
||||
IPW_ORD_STAT_RX_BEACON,
|
||||
IPW_ORD_STAT_MISSED_BEACONS,
|
||||
IPW_ORD_TABLE_0_LAST
|
||||
};
|
||||
IPW_ORD_TABLE_0_LAST
|
||||
};
|
||||
|
||||
#define IPW_RSSI_TO_DBM 112
|
||||
|
||||
|
|
@ -1626,15 +1626,15 @@ enum {
|
|||
* ADDAPTER_MAC: 6 byte MAC address
|
||||
* RTC: 4 byte clock
|
||||
*/
|
||||
enum {
|
||||
enum {
|
||||
IPW_ORD_STAT_FW_VERSION = IPW_ORD_TABLE_2_MASK | 1,
|
||||
IPW_ORD_STAT_FW_DATE,
|
||||
IPW_ORD_STAT_FW_DATE,
|
||||
IPW_ORD_STAT_UCODE_VERSION,
|
||||
IPW_ORD_STAT_UCODE_DATE,
|
||||
IPW_ORD_STAT_ADAPTER_MAC,
|
||||
IPW_ORD_STAT_RTC,
|
||||
IPW_ORD_TABLE_2_LAST
|
||||
};
|
||||
IPW_ORD_STAT_UCODE_DATE,
|
||||
IPW_ORD_STAT_ADAPTER_MAC,
|
||||
IPW_ORD_STAT_RTC,
|
||||
IPW_ORD_TABLE_2_LAST
|
||||
};
|
||||
|
||||
/* Table 3 */
|
||||
enum {
|
||||
|
|
@ -1711,7 +1711,7 @@ struct host_cmd {
|
|||
#define CFG_BT_COEXISTENCE_WME_OVER_BT 0x08
|
||||
#define CFG_BT_COEXISTENCE_OOB 0x10
|
||||
#define CFG_BT_COEXISTENCE_MAX 0xFF
|
||||
#define CFG_BT_COEXISTENCE_DEF 0x80 /* read Bt from EEPROM*/
|
||||
#define CFG_BT_COEXISTENCE_DEF 0x80 /* read Bt from EEPROM*/
|
||||
|
||||
#define CFG_CTS_TO_ITSELF_ENABLED_MIN 0x0
|
||||
#define CFG_CTS_TO_ITSELF_ENABLED_MAX 0x1
|
||||
|
|
@ -1722,9 +1722,9 @@ struct host_cmd {
|
|||
#define CFG_SYS_ANTENNA_B 0x003
|
||||
|
||||
/*
|
||||
* The definitions below were lifted off the ipw2100 driver, which only
|
||||
* The definitions below were lifted off the ipw2100 driver, which only
|
||||
* supports 'b' mode, so I'm sure these are not exactly correct.
|
||||
*
|
||||
*
|
||||
* Somebody fix these!!
|
||||
*/
|
||||
#define REG_MIN_CHANNEL 0
|
||||
|
|
@ -1733,11 +1733,11 @@ struct host_cmd {
|
|||
#define REG_CHANNEL_MASK 0x00003FFF
|
||||
#define IPW_IBSS_11B_DEFAULT_MASK 0x87ff
|
||||
|
||||
static const long ipw_frequencies[] = {
|
||||
2412, 2417, 2422, 2427,
|
||||
2432, 2437, 2442, 2447,
|
||||
2452, 2457, 2462, 2467,
|
||||
2472, 2484
|
||||
static const long ipw_frequencies[] = {
|
||||
2412, 2417, 2422, 2427,
|
||||
2432, 2437, 2442, 2447,
|
||||
2452, 2457, 2462, 2467,
|
||||
2472, 2484
|
||||
};
|
||||
|
||||
#define FREQ_COUNT ARRAY_SIZE(ipw_frequencies)
|
||||
|
|
|
|||
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