cpuidle: Make CPUIDLE_FLAG_TLB_FLUSHED generic
This allows moving the leave_mm() call into generic code before rcu_idle_enter(). Gets rid of more trace_*_rcuidle() users. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Tested-by: Marco Elver <elver@google.com> Link: https://lkml.kernel.org/r/20200821085348.369441600@infradead.org
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@ -59,5 +59,6 @@ typedef struct {
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}
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void leave_mm(int cpu);
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#define leave_mm leave_mm
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#endif /* _ASM_X86_MMU_H */
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@ -555,21 +555,12 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
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this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen);
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load_new_mm_cr3(next->pgd, new_asid, true);
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/*
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* NB: This gets called via leave_mm() in the idle path
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* where RCU functions differently. Tracing normally
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* uses RCU, so we need to use the _rcuidle variant.
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*
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* (There is no good reason for this. The idle code should
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* be rearranged to call this before rcu_idle_enter().)
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*/
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trace_tlb_flush_rcuidle(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
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trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
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} else {
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/* The new ASID is already up to date. */
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load_new_mm_cr3(next->pgd, new_asid, false);
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/* See above wrt _rcuidle. */
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trace_tlb_flush_rcuidle(TLB_FLUSH_ON_TASK_SWITCH, 0);
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trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, 0);
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}
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/* Make sure we write CR3 before loaded_mm. */
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@ -22,6 +22,7 @@
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#include <linux/module.h>
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#include <linux/suspend.h>
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#include <linux/tick.h>
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#include <linux/mmu_context.h>
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#include <trace/events/power.h>
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#include "cpuidle.h"
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@ -228,6 +229,9 @@ int cpuidle_enter_state(struct cpuidle_device *dev, struct cpuidle_driver *drv,
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broadcast = false;
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}
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if (target_state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
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leave_mm(dev->cpu);
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/* Take note of the planned idle state. */
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sched_idle_set_state(target_state);
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@ -89,14 +89,6 @@ static unsigned int mwait_substates __initdata;
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*/
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#define CPUIDLE_FLAG_ALWAYS_ENABLE BIT(15)
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/*
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* Set this flag for states where the HW flushes the TLB for us
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* and so we don't need cross-calls to keep it consistent.
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* If this flag is set, SW flushes the TLB, so even if the
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* HW doesn't do the flushing, this flag is safe to use.
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*/
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#define CPUIDLE_FLAG_TLB_FLUSHED BIT(16)
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/*
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* MWAIT takes an 8-bit "hint" in EAX "suggesting"
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* the C-state (top nibble) and sub-state (bottom nibble)
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@ -131,14 +123,6 @@ static __cpuidle int intel_idle(struct cpuidle_device *dev,
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unsigned long eax = flg2MWAIT(state->flags);
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unsigned long ecx = 1; /* break on interrupt flag */
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bool tick;
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int cpu = smp_processor_id();
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/*
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* leave_mm() to avoid costly and often unnecessary wakeups
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* for flushing the user TLB's associated with the active mm.
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*/
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if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
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leave_mm(cpu);
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if (!static_cpu_has(X86_FEATURE_ARAT)) {
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/*
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@ -81,6 +81,7 @@ struct cpuidle_state {
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#define CPUIDLE_FLAG_TIMER_STOP BIT(2) /* timer is stopped on this state */
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#define CPUIDLE_FLAG_UNUSABLE BIT(3) /* avoid using this state */
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#define CPUIDLE_FLAG_OFF BIT(4) /* disable this state by default */
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#define CPUIDLE_FLAG_TLB_FLUSHED BIT(5) /* idle-state flushes TLBs */
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struct cpuidle_device_kobj;
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struct cpuidle_state_kobj;
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@ -3,10 +3,15 @@
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#define _LINUX_MMU_CONTEXT_H
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#include <asm/mmu_context.h>
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#include <asm/mmu.h>
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/* Architectures that care about IRQ state in switch_mm can override this. */
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#ifndef switch_mm_irqs_off
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# define switch_mm_irqs_off switch_mm
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#endif
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#ifndef leave_mm
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static inline void leave_mm(int cpu) { }
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#endif
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#endif
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