i2c: refactor documentation of struct i2c_msg
The information about 'i2c_msg' was spread between kdoc and comments. Move all the explanations to kdoc and duplicate only the requirements for the flags in the comments. Also, add some redundancy and fix some typos while here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Wolfram Sang
Wolfram Sang
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1059b2bcc6
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bfb3939c51
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@ -32,18 +32,41 @@
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/**
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* struct i2c_msg - an I2C transaction segment beginning with START
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* @addr: Slave address, either seven or ten bits. When this is a ten
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* bit address, I2C_M_TEN must be set in @flags and the adapter
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* must support I2C_FUNC_10BIT_ADDR.
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* @flags: I2C_M_RD is handled by all adapters. No other flags may be
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* provided unless the adapter exported the relevant I2C_FUNC_*
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* flags through i2c_check_functionality().
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* @len: Number of data bytes in @buf being read from or written to the
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* I2C slave address. For read transactions where I2C_M_RECV_LEN
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* is set, the caller guarantees that this buffer can hold up to
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* 32 bytes in addition to the initial length byte sent by the
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* slave (plus, if used, the SMBus PEC); and this value will be
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* incremented by the number of block data bytes received.
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*
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* @addr: Slave address, either 7 or 10 bits. When this is a 10 bit address,
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* %I2C_M_TEN must be set in @flags and the adapter must support
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* %I2C_FUNC_10BIT_ADDR.
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*
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* @flags:
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* Supported by all adapters:
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* %I2C_M_RD: read data (from slave to master). Guaranteed to be 0x0001!
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*
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* Optional:
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* %I2C_M_DMA_SAFE: the buffer of this message is DMA safe. Makes only sense
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* in kernelspace, because userspace buffers are copied anyway
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*
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* Only if I2C_FUNC_10BIT_ADDR is set:
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* %I2C_M_TEN: this is a 10 bit chip address
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*
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* Only if I2C_FUNC_SMBUS_READ_BLOCK_DATA is set:
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* %I2C_M_RECV_LEN: message length will be first received byte
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*
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* Only if I2C_FUNC_NOSTART is set:
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* %I2C_M_NOSTART: skip repeated start sequence
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* Only if I2C_FUNC_PROTOCOL_MANGLING is set:
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* %I2C_M_NO_RD_ACK: in a read message, master ACK/NACK bit is skipped
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* %I2C_M_IGNORE_NAK: treat NACK from client as ACK
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* %I2C_M_REV_DIR_ADDR: toggles the Rd/Wr bit
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* %I2C_M_STOP: force a STOP condition after the message
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*
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* @len: Number of data bytes in @buf being read from or written to the I2C
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* slave address. For read transactions where %I2C_M_RECV_LEN is set, the
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* caller guarantees that this buffer can hold up to %I2C_SMBUS_BLOCK_MAX
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* bytes in addition to the initial length byte sent by the slave (plus,
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* if used, the SMBus PEC); and this value will be incremented by the number
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* of block data bytes received.
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*
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* @buf: The buffer into which data is read, or from which it's written.
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*
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* An i2c_msg is the low level representation of one segment of an I2C
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@ -60,40 +83,36 @@
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* group, it is followed by a STOP. Otherwise it is followed by the next
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* @i2c_msg transaction segment, beginning with a (repeated) START.
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*
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* Alternatively, when the adapter supports I2C_FUNC_PROTOCOL_MANGLING then
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* Alternatively, when the adapter supports %I2C_FUNC_PROTOCOL_MANGLING then
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* passing certain @flags may have changed those standard protocol behaviors.
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* Those flags are only for use with broken/nonconforming slaves, and with
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* adapters which are known to support the specific mangling options they
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* need (one or more of IGNORE_NAK, NO_RD_ACK, NOSTART, and REV_DIR_ADDR).
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* adapters which are known to support the specific mangling options they need.
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*/
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struct i2c_msg {
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__u16 addr; /* slave address */
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__u16 addr;
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__u16 flags;
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#define I2C_M_RD 0x0001 /* read data, from slave to master */
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/* I2C_M_RD is guaranteed to be 0x0001! */
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#define I2C_M_TEN 0x0010 /* this is a ten bit chip address */
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#define I2C_M_DMA_SAFE 0x0200 /* the buffer of this message is DMA safe */
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/* makes only sense in kernelspace */
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/* userspace buffers are copied anyway */
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#define I2C_M_RECV_LEN 0x0400 /* length will be first received byte */
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#define I2C_M_NO_RD_ACK 0x0800 /* if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_IGNORE_NAK 0x1000 /* if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_REV_DIR_ADDR 0x2000 /* if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_NOSTART 0x4000 /* if I2C_FUNC_NOSTART */
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#define I2C_M_STOP 0x8000 /* if I2C_FUNC_PROTOCOL_MANGLING */
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__u16 len; /* msg length */
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__u8 *buf; /* pointer to msg data */
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#define I2C_M_RD 0x0001 /* guaranteed to be 0x0001! */
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#define I2C_M_TEN 0x0010 /* use only if I2C_FUNC_10BIT_ADDR */
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#define I2C_M_DMA_SAFE 0x0200 /* use only in kernel space */
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#define I2C_M_RECV_LEN 0x0400 /* use only if I2C_FUNC_SMBUS_READ_BLOCK_DATA */
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#define I2C_M_NO_RD_ACK 0x0800 /* use only if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_IGNORE_NAK 0x1000 /* use only if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_REV_DIR_ADDR 0x2000 /* use only if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_NOSTART 0x4000 /* use only if I2C_FUNC_NOSTART */
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#define I2C_M_STOP 0x8000 /* use only if I2C_FUNC_PROTOCOL_MANGLING */
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__u16 len;
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__u8 *buf;
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};
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/* To determine what functionality is present */
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#define I2C_FUNC_I2C 0x00000001
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#define I2C_FUNC_10BIT_ADDR 0x00000002
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#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_IGNORE_NAK etc. */
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#define I2C_FUNC_10BIT_ADDR 0x00000002 /* required for I2C_M_TEN */
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#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* required for I2C_M_IGNORE_NAK etc. */
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#define I2C_FUNC_SMBUS_PEC 0x00000008
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#define I2C_FUNC_NOSTART 0x00000010 /* I2C_M_NOSTART */
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#define I2C_FUNC_NOSTART 0x00000010 /* required for I2C_M_NOSTART */
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#define I2C_FUNC_SLAVE 0x00000020
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#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */
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#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 or later */
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#define I2C_FUNC_SMBUS_QUICK 0x00010000
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#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000
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#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000
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@ -102,11 +121,11 @@ struct i2c_msg {
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#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000
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#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000
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#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000
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#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000
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#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000 /* required for I2C_M_RECV_LEN */
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#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
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#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */
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#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */
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#define I2C_FUNC_SMBUS_HOST_NOTIFY 0x10000000
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#define I2C_FUNC_SMBUS_HOST_NOTIFY 0x10000000 /* SMBus 2.0 or later */
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#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \
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I2C_FUNC_SMBUS_WRITE_BYTE)
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