powerpc/powernv: Get rid of old scom_controller abstraction
Once upon a time, the SCOM access code was used by the WSP platform as well as powernv. Thus it made sense to have a generic SCOM access interface to abstract between different platforms. Now that it's just powernv, with no other platforms currently on the horizon, let's rip out scom_controller and make everything much simpler and more direct. While we're here, fix up the comment block at the top. Signed-off-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20190509051119.7694-3-ajd@linux.ibm.com
This commit is contained in:
Родитель
9edc6b919d
Коммит
bfd2f0d49a
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@ -4,7 +4,6 @@ obj-y += idle.o opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o
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obj-y += rng.o opal-elog.o opal-dump.o opal-sysparam.o opal-sensor.o
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obj-y += opal-msglog.o opal-hmi.o opal-power.o opal-irqchip.o
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obj-y += opal-kmsg.o opal-powercap.o opal-psr.o opal-sensor-groups.o
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obj-y += opal-xscom.o scom.o
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obj-$(CONFIG_SMP) += smp.o subcore.o subcore-asm.o
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obj-$(CONFIG_PCI) += pci.o pci-ioda.o npu-dma.o pci-ioda-tce.o
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@ -16,3 +15,4 @@ obj-$(CONFIG_PERF_EVENTS) += opal-imc.o
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obj-$(CONFIG_PPC_MEMTRACE) += memtrace.o
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obj-$(CONFIG_PPC_VAS) += vas.o vas-window.o vas-debug.o
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obj-$(CONFIG_OCXL_BASE) += ocxl.o
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obj-$(CONFIG_SCOM_DEBUGFS) += opal-xscom.o
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@ -1,7 +1,10 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* PowerNV LPC bus handling.
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* PowerNV SCOM bus debugfs interface
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*
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* Copyright 2010 Benjamin Herrenschmidt, IBM Corp
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* <benh@kernel.crashing.org>
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* and David Gibson, IBM Corporation.
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* Copyright 2013 IBM Corp.
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*/
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@ -10,63 +13,13 @@
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#include <linux/bug.h>
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#include <linux/gfp.h>
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#include <linux/slab.h>
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#include <linux/uaccess.h>
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#include <asm/machdep.h>
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#include <asm/firmware.h>
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#include <asm/opal.h>
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#include "scom.h"
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/*
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* We could probably fit that inside the scom_map_t
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* which is a void* after all but it's really too ugly
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* so let's kmalloc it for now
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*/
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struct opal_scom_map {
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uint32_t chip;
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uint64_t addr;
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};
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static scom_map_t opal_scom_map(struct device_node *dev, u64 reg, u64 count)
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{
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struct opal_scom_map *m;
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const __be32 *gcid;
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if (!of_get_property(dev, "scom-controller", NULL)) {
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pr_err("%s: device %pOF is not a SCOM controller\n",
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__func__, dev);
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return SCOM_MAP_INVALID;
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}
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gcid = of_get_property(dev, "ibm,chip-id", NULL);
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if (!gcid) {
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pr_err("%s: device %pOF has no ibm,chip-id\n",
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__func__, dev);
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return SCOM_MAP_INVALID;
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}
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m = kmalloc(sizeof(*m), GFP_KERNEL);
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if (!m)
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return NULL;
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m->chip = be32_to_cpup(gcid);
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m->addr = reg;
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return (scom_map_t)m;
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}
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static void opal_scom_unmap(scom_map_t map)
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{
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kfree(map);
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}
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static int opal_xscom_err_xlate(int64_t rc)
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{
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switch(rc) {
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case 0:
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return 0;
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/* Add more translations if necessary */
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default:
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return -EIO;
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}
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}
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#include <asm/debugfs.h>
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#include <asm/prom.h>
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static u64 opal_scom_unmangle(u64 addr)
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{
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@ -99,39 +52,154 @@ static u64 opal_scom_unmangle(u64 addr)
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return addr;
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}
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static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
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static int opal_scom_read(uint32_t chip, uint64_t addr, u64 reg, u64 *value)
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{
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struct opal_scom_map *m = map;
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int64_t rc;
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__be64 v;
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reg = opal_scom_unmangle(m->addr + reg);
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rc = opal_xscom_read(m->chip, reg, (__be64 *)__pa(&v));
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reg = opal_scom_unmangle(addr + reg);
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rc = opal_xscom_read(chip, reg, (__be64 *)__pa(&v));
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if (rc) {
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*value = 0xfffffffffffffffful;
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return -EIO;
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}
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*value = be64_to_cpu(v);
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return opal_xscom_err_xlate(rc);
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}
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static int opal_scom_write(scom_map_t map, u64 reg, u64 value)
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{
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struct opal_scom_map *m = map;
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int64_t rc;
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reg = opal_scom_unmangle(m->addr + reg);
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rc = opal_xscom_write(m->chip, reg, value);
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return opal_xscom_err_xlate(rc);
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}
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static const struct scom_controller opal_scom_controller = {
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.map = opal_scom_map,
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.unmap = opal_scom_unmap,
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.read = opal_scom_read,
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.write = opal_scom_write
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};
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static int opal_xscom_init(void)
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{
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if (firmware_has_feature(FW_FEATURE_OPAL))
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scom_init(&opal_scom_controller);
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return 0;
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}
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machine_arch_initcall(powernv, opal_xscom_init);
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static int opal_scom_write(uint32_t chip, uint64_t addr, u64 reg, u64 value)
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{
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int64_t rc;
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reg = opal_scom_unmangle(addr + reg);
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rc = opal_xscom_write(chip, reg, value);
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if (rc)
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return -EIO;
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return 0;
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}
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struct scom_debug_entry {
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u32 chip;
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struct debugfs_blob_wrapper path;
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char name[16];
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};
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static ssize_t scom_debug_read(struct file *filp, char __user *ubuf,
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size_t count, loff_t *ppos)
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{
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struct scom_debug_entry *ent = filp->private_data;
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u64 __user *ubuf64 = (u64 __user *)ubuf;
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loff_t off = *ppos;
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ssize_t done = 0;
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u64 reg, reg_base, reg_cnt, val;
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int rc;
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if (off < 0 || (off & 7) || (count & 7))
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return -EINVAL;
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reg_base = off >> 3;
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reg_cnt = count >> 3;
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for (reg = 0; reg < reg_cnt; reg++) {
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rc = opal_scom_read(ent->chip, reg_base, reg, &val);
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if (!rc)
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rc = put_user(val, ubuf64);
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if (rc) {
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if (!done)
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done = rc;
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break;
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}
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ubuf64++;
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*ppos += 8;
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done += 8;
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}
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return done;
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}
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static ssize_t scom_debug_write(struct file* filp, const char __user *ubuf,
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size_t count, loff_t *ppos)
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{
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struct scom_debug_entry *ent = filp->private_data;
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u64 __user *ubuf64 = (u64 __user *)ubuf;
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loff_t off = *ppos;
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ssize_t done = 0;
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u64 reg, reg_base, reg_cnt, val;
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int rc;
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if (off < 0 || (off & 7) || (count & 7))
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return -EINVAL;
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reg_base = off >> 3;
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reg_cnt = count >> 3;
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for (reg = 0; reg < reg_cnt; reg++) {
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rc = get_user(val, ubuf64);
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if (!rc)
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rc = opal_scom_write(ent->chip, reg_base, reg, val);
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if (rc) {
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if (!done)
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done = rc;
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break;
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}
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ubuf64++;
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done += 8;
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}
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return done;
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}
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static const struct file_operations scom_debug_fops = {
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.read = scom_debug_read,
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.write = scom_debug_write,
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.open = simple_open,
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.llseek = default_llseek,
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};
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static int scom_debug_init_one(struct dentry *root, struct device_node *dn,
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int chip)
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{
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struct scom_debug_entry *ent;
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struct dentry *dir;
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ent = kzalloc(sizeof(*ent), GFP_KERNEL);
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if (!ent)
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return -ENOMEM;
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ent->chip = chip;
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snprintf(ent->name, 16, "%08x", chip);
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ent->path.data = (void*)kasprintf(GFP_KERNEL, "%pOF", dn);
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ent->path.size = strlen((char *)ent->path.data);
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dir = debugfs_create_dir(ent->name, root);
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if (!dir) {
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kfree(ent->path.data);
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kfree(ent);
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return -1;
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}
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debugfs_create_blob("devspec", 0400, dir, &ent->path);
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debugfs_create_file("access", 0600, dir, ent, &scom_debug_fops);
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return 0;
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}
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static int scom_debug_init(void)
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{
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struct device_node *dn;
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struct dentry *root;
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int chip, rc;
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if (!firmware_has_feature(FW_FEATURE_OPAL))
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return 0;
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root = debugfs_create_dir("scom", powerpc_debugfs_root);
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if (!root)
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return -1;
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rc = 0;
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for_each_node_with_property(dn, "scom-controller") {
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chip = of_get_ibm_chip_id(dn);
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WARN_ON(chip == -1);
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rc |= scom_debug_init_one(root, dn, chip);
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}
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return rc;
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}
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device_initcall(scom_debug_init);
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@ -1,157 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2010 Benjamin Herrenschmidt, IBM Corp
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* <benh@kernel.crashing.org>
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* and David Gibson, IBM Corporation.
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*/
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/export.h>
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#include <asm/debugfs.h>
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#include <asm/prom.h>
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#include <linux/uaccess.h>
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#include "scom.h"
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const struct scom_controller *scom_controller;
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#ifdef CONFIG_SCOM_DEBUGFS
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struct scom_debug_entry {
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struct device_node *dn;
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struct debugfs_blob_wrapper path;
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char name[16];
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};
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static ssize_t scom_debug_read(struct file *filp, char __user *ubuf,
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size_t count, loff_t *ppos)
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{
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struct scom_debug_entry *ent = filp->private_data;
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u64 __user *ubuf64 = (u64 __user *)ubuf;
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loff_t off = *ppos;
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ssize_t done = 0;
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u64 reg, reg_cnt, val;
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scom_map_t map;
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int rc;
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if (off < 0 || (off & 7) || (count & 7))
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return -EINVAL;
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reg = off >> 3;
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reg_cnt = count >> 3;
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map = scom_map(ent->dn, reg, reg_cnt);
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if (!scom_map_ok(map))
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return -ENXIO;
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for (reg = 0; reg < reg_cnt; reg++) {
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rc = scom_read(map, reg, &val);
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if (!rc)
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rc = put_user(val, ubuf64);
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if (rc) {
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if (!done)
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done = rc;
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break;
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}
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ubuf64++;
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*ppos += 8;
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done += 8;
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}
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scom_unmap(map);
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return done;
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}
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static ssize_t scom_debug_write(struct file* filp, const char __user *ubuf,
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size_t count, loff_t *ppos)
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{
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struct scom_debug_entry *ent = filp->private_data;
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u64 __user *ubuf64 = (u64 __user *)ubuf;
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loff_t off = *ppos;
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ssize_t done = 0;
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u64 reg, reg_cnt, val;
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scom_map_t map;
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int rc;
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if (off < 0 || (off & 7) || (count & 7))
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return -EINVAL;
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reg = off >> 3;
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reg_cnt = count >> 3;
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map = scom_map(ent->dn, reg, reg_cnt);
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if (!scom_map_ok(map))
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return -ENXIO;
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for (reg = 0; reg < reg_cnt; reg++) {
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rc = get_user(val, ubuf64);
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if (!rc)
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rc = scom_write(map, reg, val);
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if (rc) {
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if (!done)
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done = rc;
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break;
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}
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ubuf64++;
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done += 8;
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}
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scom_unmap(map);
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return done;
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}
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static const struct file_operations scom_debug_fops = {
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.read = scom_debug_read,
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.write = scom_debug_write,
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.open = simple_open,
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.llseek = default_llseek,
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};
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static int scom_debug_init_one(struct dentry *root, struct device_node *dn,
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int i)
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{
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struct scom_debug_entry *ent;
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struct dentry *dir;
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ent = kzalloc(sizeof(*ent), GFP_KERNEL);
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if (!ent)
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return -ENOMEM;
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ent->dn = of_node_get(dn);
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snprintf(ent->name, 16, "%08x", i);
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ent->path.data = (void*)kasprintf(GFP_KERNEL, "%pOF", dn);
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ent->path.size = strlen((char *)ent->path.data);
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dir = debugfs_create_dir(ent->name, root);
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if (!dir) {
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of_node_put(dn);
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kfree(ent->path.data);
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kfree(ent);
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return -1;
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}
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debugfs_create_blob("devspec", 0400, dir, &ent->path);
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debugfs_create_file("access", 0600, dir, ent, &scom_debug_fops);
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return 0;
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}
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static int scom_debug_init(void)
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{
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struct device_node *dn;
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struct dentry *root;
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int i, rc;
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root = debugfs_create_dir("scom", powerpc_debugfs_root);
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if (!root)
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return -1;
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i = rc = 0;
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for_each_node_with_property(dn, "scom-controller") {
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int id = of_get_ibm_chip_id(dn);
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if (id == -1)
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id = i;
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rc |= scom_debug_init_one(root, dn, id);
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i++;
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}
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return rc;
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}
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device_initcall(scom_debug_init);
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#endif /* CONFIG_SCOM_DEBUGFS */
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@ -1,120 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
|
||||
* Copyright 2010 Benjamin Herrenschmidt, IBM Corp
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||||
* <benh@kernel.crashing.org>
|
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* and David Gibson, IBM Corporation.
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*/
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#ifndef _SCOM_H
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#define _SCOM_H
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/*
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* The SCOM bus is a sideband bus used for accessing various internal
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* registers of the processor or the chipset. The implementation details
|
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* differ between processors and platforms, and the access method as
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* well.
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*
|
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* This API allows to "map" ranges of SCOM register numbers associated
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* with a given SCOM controller. The later must be represented by a
|
||||
* device node, though some implementations might support NULL if there
|
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* is no possible ambiguity
|
||||
*
|
||||
* Then, scom_read/scom_write can be used to accesses registers inside
|
||||
* that range. The argument passed is a register number relative to
|
||||
* the beginning of the range mapped.
|
||||
*/
|
||||
|
||||
typedef void *scom_map_t;
|
||||
|
||||
/* Value for an invalid SCOM map */
|
||||
#define SCOM_MAP_INVALID (NULL)
|
||||
|
||||
/* The scom_controller data structure is what the platform passes
|
||||
* to the core code in scom_init, it provides the actual implementation
|
||||
* of all the SCOM functions
|
||||
*/
|
||||
struct scom_controller {
|
||||
scom_map_t (*map)(struct device_node *ctrl_dev, u64 reg, u64 count);
|
||||
void (*unmap)(scom_map_t map);
|
||||
|
||||
int (*read)(scom_map_t map, u64 reg, u64 *value);
|
||||
int (*write)(scom_map_t map, u64 reg, u64 value);
|
||||
};
|
||||
|
||||
extern const struct scom_controller *scom_controller;
|
||||
|
||||
/**
|
||||
* scom_init - Initialize the SCOM backend, called by the platform
|
||||
* @controller: The platform SCOM controller
|
||||
*/
|
||||
static inline void scom_init(const struct scom_controller *controller)
|
||||
{
|
||||
scom_controller = controller;
|
||||
}
|
||||
|
||||
/**
|
||||
* scom_map_ok - Test is a SCOM mapping is successful
|
||||
* @map: The result of scom_map to test
|
||||
*/
|
||||
static inline int scom_map_ok(scom_map_t map)
|
||||
{
|
||||
return map != SCOM_MAP_INVALID;
|
||||
}
|
||||
|
||||
/**
|
||||
* scom_map - Map a block of SCOM registers
|
||||
* @ctrl_dev: Device node of the SCOM controller
|
||||
* some implementations allow NULL here
|
||||
* @reg: first SCOM register to map
|
||||
* @count: Number of SCOM registers to map
|
||||
*/
|
||||
|
||||
static inline scom_map_t scom_map(struct device_node *ctrl_dev,
|
||||
u64 reg, u64 count)
|
||||
{
|
||||
return scom_controller->map(ctrl_dev, reg, count);
|
||||
}
|
||||
|
||||
/**
|
||||
* scom_unmap - Unmap a block of SCOM registers
|
||||
* @map: Result of scom_map is to be unmapped
|
||||
*/
|
||||
static inline void scom_unmap(scom_map_t map)
|
||||
{
|
||||
if (scom_map_ok(map))
|
||||
scom_controller->unmap(map);
|
||||
}
|
||||
|
||||
/**
|
||||
* scom_read - Read a SCOM register
|
||||
* @map: Result of scom_map
|
||||
* @reg: Register index within that map
|
||||
* @value: Updated with the value read
|
||||
*
|
||||
* Returns 0 (success) or a negative error code
|
||||
*/
|
||||
static inline int scom_read(scom_map_t map, u64 reg, u64 *value)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = scom_controller->read(map, reg, value);
|
||||
if (rc)
|
||||
*value = 0xfffffffffffffffful;
|
||||
return rc;
|
||||
}
|
||||
|
||||
/**
|
||||
* scom_write - Write to a SCOM register
|
||||
* @map: Result of scom_map
|
||||
* @reg: Register index within that map
|
||||
* @value: Value to write
|
||||
*
|
||||
* Returns 0 (success) or a negative error code
|
||||
*/
|
||||
static inline int scom_write(scom_map_t map, u64 reg, u64 value)
|
||||
{
|
||||
return scom_controller->write(map, reg, value);
|
||||
}
|
||||
|
||||
|
||||
#endif /* _SCOM_H */
|
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