We don't have any userspace interfaces that use HZ as a time unit, so
having our own DRM define is useless.

Remove this remnant from the shared drm core days.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Daniel Vetter 2013-12-11 11:34:41 +01:00 коммит произвёл Dave Airlie
Родитель d2e546b855
Коммит bfd8303af0
14 изменённых файлов: 20 добавлений и 22 удалений

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@ -960,7 +960,7 @@ void drm_vblank_put(struct drm_device *dev, int crtc)
if (atomic_dec_and_test(&dev->vblank[crtc].refcount) && if (atomic_dec_and_test(&dev->vblank[crtc].refcount) &&
(drm_vblank_offdelay > 0)) (drm_vblank_offdelay > 0))
mod_timer(&dev->vblank_disable_timer, mod_timer(&dev->vblank_disable_timer,
jiffies + ((drm_vblank_offdelay * DRM_HZ)/1000)); jiffies + ((drm_vblank_offdelay * HZ)/1000));
} }
EXPORT_SYMBOL(drm_vblank_put); EXPORT_SYMBOL(drm_vblank_put);
@ -1244,7 +1244,7 @@ int drm_wait_vblank(struct drm_device *dev, void *data,
DRM_DEBUG("waiting on vblank count %d, crtc %d\n", DRM_DEBUG("waiting on vblank count %d, crtc %d\n",
vblwait->request.sequence, crtc); vblwait->request.sequence, crtc);
dev->vblank[crtc].last_wait = vblwait->request.sequence; dev->vblank[crtc].last_wait = vblwait->request.sequence;
DRM_WAIT_ON(ret, dev->vblank[crtc].queue, 3 * DRM_HZ, DRM_WAIT_ON(ret, dev->vblank[crtc].queue, 3 * HZ,
(((drm_vblank_count(dev, crtc) - (((drm_vblank_count(dev, crtc) -
vblwait->request.sequence) <= (1 << 23)) || vblwait->request.sequence) <= (1 << 23)) ||
!dev->irq_enabled)); !dev->irq_enabled));

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@ -868,7 +868,7 @@ static void mixer_wait_for_vblank(void *ctx)
*/ */
if (!wait_event_timeout(mixer_ctx->wait_vsync_queue, if (!wait_event_timeout(mixer_ctx->wait_vsync_queue,
!atomic_read(&mixer_ctx->wait_vsync_event), !atomic_read(&mixer_ctx->wait_vsync_event),
DRM_HZ/20)) HZ/20))
DRM_DEBUG_KMS("vblank wait timed out.\n"); DRM_DEBUG_KMS("vblank wait timed out.\n");
} }

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@ -326,7 +326,7 @@ int psbfb_sync(struct fb_info *info)
struct psb_framebuffer *psbfb = &fbdev->pfb; struct psb_framebuffer *psbfb = &fbdev->pfb;
struct drm_device *dev = psbfb->base.dev; struct drm_device *dev = psbfb->base.dev;
struct drm_psb_private *dev_priv = dev->dev_private; struct drm_psb_private *dev_priv = dev->dev_private;
unsigned long _end = jiffies + DRM_HZ; unsigned long _end = jiffies + HZ;
int busy = 0; int busy = 0;
unsigned long flags; unsigned long flags;

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@ -212,8 +212,8 @@ enum {
#define PSB_HIGH_REG_OFFS 0x0600 #define PSB_HIGH_REG_OFFS 0x0600
#define PSB_NUM_VBLANKS 2 #define PSB_NUM_VBLANKS 2
#define PSB_WATCHDOG_DELAY (DRM_HZ * 2) #define PSB_WATCHDOG_DELAY (HZ * 2)
#define PSB_LID_DELAY (DRM_HZ / 10) #define PSB_LID_DELAY (HZ / 10)
#define MDFLD_PNW_B0 0x04 #define MDFLD_PNW_B0 0x04
#define MDFLD_PNW_C0 0x08 #define MDFLD_PNW_C0 0x08
@ -232,7 +232,7 @@ enum {
#define MDFLD_DSR_RR 45 #define MDFLD_DSR_RR 45
#define MDFLD_DPU_ENABLE (1 << 31) #define MDFLD_DPU_ENABLE (1 << 31)
#define MDFLD_DSR_FULLSCREEN (1 << 30) #define MDFLD_DSR_FULLSCREEN (1 << 30)
#define MDFLD_DSR_DELAY (DRM_HZ / MDFLD_DSR_RR) #define MDFLD_DSR_DELAY (HZ / MDFLD_DSR_RR)
#define PSB_PWR_STATE_ON 1 #define PSB_PWR_STATE_ON 1
#define PSB_PWR_STATE_OFF 2 #define PSB_PWR_STATE_OFF 2

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@ -456,7 +456,7 @@ static int psb_vblank_do_wait(struct drm_device *dev,
{ {
unsigned int cur_vblank; unsigned int cur_vblank;
int ret = 0; int ret = 0;
DRM_WAIT_ON(ret, dev->vblank.queue, 3 * DRM_HZ, DRM_WAIT_ON(ret, dev->vblank.queue, 3 * HZ,
(((cur_vblank = atomic_read(counter)) (((cur_vblank = atomic_read(counter))
- *sequence) <= (1 << 23))); - *sequence) <= (1 << 23)));
*sequence = cur_vblank; *sequence = cur_vblank;

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@ -783,7 +783,7 @@ static int i915_wait_irq(struct drm_device * dev, int irq_nr)
master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
if (ring->irq_get(ring)) { if (ring->irq_get(ring)) {
DRM_WAIT_ON(ret, ring->irq_queue, 3 * DRM_HZ, DRM_WAIT_ON(ret, ring->irq_queue, 3 * HZ,
READ_BREADCRUMB(dev_priv) >= irq_nr); READ_BREADCRUMB(dev_priv) >= irq_nr);
ring->irq_put(ring); ring->irq_put(ring);
} else if (wait_for(READ_BREADCRUMB(dev_priv) >= irq_nr, 3000)) } else if (wait_for(READ_BREADCRUMB(dev_priv) >= irq_nr, 3000))

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@ -128,7 +128,7 @@ int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
* by about a day rather than she wants to wait for years * by about a day rather than she wants to wait for years
* using fences. * using fences.
*/ */
DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ, DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * HZ,
(((cur_fence = atomic_read(&dev_priv->last_fence_retired)) (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
- *sequence) <= (1 << 23))); - *sequence) <= (1 << 23)));

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@ -143,7 +143,7 @@ nouveau_fence_emit(struct nouveau_fence *fence, struct nouveau_channel *chan)
int ret; int ret;
fence->channel = chan; fence->channel = chan;
fence->timeout = jiffies + (15 * DRM_HZ); fence->timeout = jiffies + (15 * HZ);
fence->sequence = ++fctx->sequence; fence->sequence = ++fctx->sequence;
ret = fctx->emit(fence); ret = fctx->emit(fence);

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@ -249,7 +249,7 @@ static int radeon_wait_irq(struct drm_device * dev, int swi_nr)
dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
DRM_WAIT_ON(ret, dev_priv->swi_queue, 3 * DRM_HZ, DRM_WAIT_ON(ret, dev_priv->swi_queue, 3 * HZ,
RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr); RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr);
return ret; return ret;

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@ -266,7 +266,7 @@ int sis_idle(struct drm_device *dev)
* because its polling frequency is too low. * because its polling frequency is too low.
*/ */
end = jiffies + (DRM_HZ * 3); end = jiffies + (HZ * 3);
for (i = 0; i < 4; ++i) { for (i = 0; i < 4; ++i) {
do { do {

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@ -363,7 +363,7 @@ via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
via_abort_dmablit(dev, engine); via_abort_dmablit(dev, engine);
blitq->aborting = 1; blitq->aborting = 1;
blitq->end = jiffies + DRM_HZ; blitq->end = jiffies + HZ;
} }
if (!blitq->is_active) { if (!blitq->is_active) {
@ -372,7 +372,7 @@ via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
blitq->is_active = 1; blitq->is_active = 1;
blitq->cur = cur; blitq->cur = cur;
blitq->num_outstanding--; blitq->num_outstanding--;
blitq->end = jiffies + DRM_HZ; blitq->end = jiffies + HZ;
if (!timer_pending(&blitq->poll_timer)) if (!timer_pending(&blitq->poll_timer))
mod_timer(&blitq->poll_timer, jiffies + 1); mod_timer(&blitq->poll_timer, jiffies + 1);
} else { } else {
@ -436,7 +436,7 @@ via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine)
int ret = 0; int ret = 0;
if (via_dmablit_active(blitq, engine, handle, &queue)) { if (via_dmablit_active(blitq, engine, handle, &queue)) {
DRM_WAIT_ON(ret, *queue, 3 * DRM_HZ, DRM_WAIT_ON(ret, *queue, 3 * HZ,
!via_dmablit_active(blitq, engine, handle, NULL)); !via_dmablit_active(blitq, engine, handle, NULL));
} }
DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n", DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n",
@ -688,7 +688,7 @@ via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
while (blitq->num_free == 0) { while (blitq->num_free == 0) {
spin_unlock_irqrestore(&blitq->blit_lock, irqsave); spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0); DRM_WAIT_ON(ret, blitq->busy_queue, HZ, blitq->num_free > 0);
if (ret) if (ret)
return (-EINTR == ret) ? -EAGAIN : ret; return (-EINTR == ret) ? -EAGAIN : ret;

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@ -239,12 +239,12 @@ via_driver_irq_wait(struct drm_device *dev, unsigned int irq, int force_sequence
cur_irq = dev_priv->via_irqs + real_irq; cur_irq = dev_priv->via_irqs + real_irq;
if (masks[real_irq][2] && !force_sequence) { if (masks[real_irq][2] && !force_sequence) {
DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * HZ,
((VIA_READ(masks[irq][2]) & masks[irq][3]) == ((VIA_READ(masks[irq][2]) & masks[irq][3]) ==
masks[irq][4])); masks[irq][4]));
cur_irq_sequence = atomic_read(&cur_irq->irq_received); cur_irq_sequence = atomic_read(&cur_irq->irq_received);
} else { } else {
DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * HZ,
(((cur_irq_sequence = (((cur_irq_sequence =
atomic_read(&cur_irq->irq_received)) - atomic_read(&cur_irq->irq_received)) -
*sequence) <= (1 << 23))); *sequence) <= (1 << 23)));

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@ -83,7 +83,7 @@ int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_
switch (fx->func) { switch (fx->func) {
case VIA_FUTEX_WAIT: case VIA_FUTEX_WAIT:
DRM_WAIT_ON(ret, dev_priv->decoder_queue[fx->lock], DRM_WAIT_ON(ret, dev_priv->decoder_queue[fx->lock],
(fx->ms / 10) * (DRM_HZ / 100), *lock != fx->val); (fx->ms / 10) * (HZ / 100), *lock != fx->val);
return ret; return ret;
case VIA_FUTEX_WAKE: case VIA_FUTEX_WAKE:
DRM_WAKEUP(&(dev_priv->decoder_queue[fx->lock])); DRM_WAKEUP(&(dev_priv->decoder_queue[fx->lock]));

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@ -58,8 +58,6 @@ static inline void writeq(u64 val, void __iomem *reg)
#define DRM_COPY_TO_USER(arg1, arg2, arg3) \ #define DRM_COPY_TO_USER(arg1, arg2, arg3) \
copy_to_user(arg1, arg2, arg3) copy_to_user(arg1, arg2, arg3)
#define DRM_HZ HZ
#define DRM_WAIT_ON( ret, queue, timeout, condition ) \ #define DRM_WAIT_ON( ret, queue, timeout, condition ) \
do { \ do { \
DECLARE_WAITQUEUE(entry, current); \ DECLARE_WAITQUEUE(entry, current); \