ASoC: cs4265: Fix setting dai format for Left/Right Justified
The settings in current code does not match the datasheet, fix it. DAC Control - Address 03h DAC Digital Interface Format (Bits 5:4) DAC_DIF1 DAC_DIF0 Description 0 0 Left Justified, up to 24-bit data (default) 0 1 I²S, up to 24-bit data 1 0 Right-Justified, 16-bit Data 1 1 Right-Justified, 24-bit Data Transmitter Control 2 - Address 12h Transmitter Digital Interface Format (Bits 7:6) Tx_DIF1 Tx_DIF0 Description Format Figure 0 0 Left Justified, up to 24-bit data (default) 0 1 I²S, up to 24-bit data 1 0 Right-Justified, 16-bit Data 1 1 Right-Justified, 24-bit Data Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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bc0195aad0
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bffc449688
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@ -457,14 +457,14 @@ static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream,
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case SND_SOC_DAIFMT_RIGHT_J:
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if (params_width(params) == 16) {
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snd_soc_update_bits(codec, CS4265_DAC_CTL,
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CS4265_DAC_CTL_DIF, (1 << 5));
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CS4265_DAC_CTL_DIF, (2 << 4));
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snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
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CS4265_SPDIF_CTL2_DIF, (1 << 7));
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CS4265_SPDIF_CTL2_DIF, (2 << 6));
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} else {
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snd_soc_update_bits(codec, CS4265_DAC_CTL,
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CS4265_DAC_CTL_DIF, (3 << 5));
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CS4265_DAC_CTL_DIF, (3 << 4));
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snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
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CS4265_SPDIF_CTL2_DIF, (1 << 7));
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CS4265_SPDIF_CTL2_DIF, (3 << 6));
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}
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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@ -473,7 +473,7 @@ static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream,
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snd_soc_update_bits(codec, CS4265_ADC_CTL,
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CS4265_ADC_DIF, 0);
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snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
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CS4265_SPDIF_CTL2_DIF, (1 << 6));
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CS4265_SPDIF_CTL2_DIF, 0);
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break;
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default:
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