MIPS: Add platform callback before initializing the L2 cache
Allow platforms to perform platform-specific steps before configuring the L2 cache. This is necessary for platforms with CM3 since the L2 parameters no longer live in the Config2 register. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10642/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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c014d164f2
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@ -81,6 +81,13 @@ int mips_cm_probe(void)
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phys_addr_t addr;
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u32 base_reg;
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/*
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* No need to probe again if we have already been
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* here before.
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*/
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if (mips_cm_base)
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return 0;
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addr = mips_cm_phys_base();
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BUG_ON((addr & CM_GCR_BASE_GCRBASE_MSK) != addr);
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if (!addr)
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@ -123,6 +123,10 @@ static int __init mips_sc_probe_cm3(void)
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return 1;
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}
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void __weak platform_early_l2_init(void)
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{
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}
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static inline int __init mips_sc_probe(void)
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{
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struct cpuinfo_mips *c = ¤t_cpu_data;
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@ -132,6 +136,12 @@ static inline int __init mips_sc_probe(void)
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/* Mark as not present until probe completed */
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c->scache.flags |= MIPS_CACHE_NOT_PRESENT;
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/*
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* Do we need some platform specific probing before
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* we configure L2?
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*/
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platform_early_l2_init();
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if (mips_cm_revision() >= CM_REV_CM3)
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return mips_sc_probe_cm3();
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@ -303,3 +303,10 @@ mips_pci_controller:
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if (!register_vsmp_smp_ops())
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return;
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}
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void platform_early_l2_init(void)
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{
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/* L2 configuration lives in the CM3 */
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if (mips_cm_revision() >= CM_REV_CM3)
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mips_cm_probe();
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}
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