dmaengine: pxa_dma: add debug information
Reuse the debugging features which were available in pxa architecture.
This is a copy of the code from arch/arm/plat-pxa/dma, which is doomed
to disappear once the conversion is completed towards dmaengine.
This is a transfer of the commit "[ARM] pxa/dma: add debugfs
entries" (d294948c2c).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Robert Jarzmik
Vinod Koul
Родитель
a57e16cf03
Коммит
c01d1b5159
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@ -125,6 +125,11 @@ struct pxad_device {
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void __iomem *base;
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struct pxad_phy *phys;
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spinlock_t phy_lock; /* Phy association */
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#ifdef CONFIG_DEBUG_FS
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struct dentry *dbgfs_root;
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struct dentry *dbgfs_state;
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struct dentry **dbgfs_chan;
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#endif
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};
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#define tx_to_pxad_desc(tx) \
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@ -168,6 +173,243 @@ static unsigned int pxad_drcmr(unsigned int line)
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return 0x100 + line * 4;
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return 0x1000 + line * 4;
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}
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/*
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* Debug fs
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*/
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#ifdef CONFIG_DEBUG_FS
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#include <linux/debugfs.h>
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#include <linux/uaccess.h>
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#include <linux/seq_file.h>
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static int dbg_show_requester_chan(struct seq_file *s, void *p)
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{
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int pos = 0;
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struct pxad_phy *phy = s->private;
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int i;
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u32 drcmr;
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pos += seq_printf(s, "DMA channel %d requester :\n", phy->idx);
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for (i = 0; i < 70; i++) {
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drcmr = readl_relaxed(phy->base + pxad_drcmr(i));
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if ((drcmr & DRCMR_CHLNUM) == phy->idx)
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pos += seq_printf(s, "\tRequester %d (MAPVLD=%d)\n", i,
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!!(drcmr & DRCMR_MAPVLD));
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}
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return pos;
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}
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static inline int dbg_burst_from_dcmd(u32 dcmd)
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{
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int burst = (dcmd >> 16) & 0x3;
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return burst ? 4 << burst : 0;
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}
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static int is_phys_valid(unsigned long addr)
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{
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return pfn_valid(__phys_to_pfn(addr));
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}
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#define PXA_DCSR_STR(flag) (dcsr & PXA_DCSR_##flag ? #flag" " : "")
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#define PXA_DCMD_STR(flag) (dcmd & PXA_DCMD_##flag ? #flag" " : "")
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static int dbg_show_descriptors(struct seq_file *s, void *p)
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{
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struct pxad_phy *phy = s->private;
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int i, max_show = 20, burst, width;
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u32 dcmd;
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unsigned long phys_desc, ddadr;
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struct pxad_desc_hw *desc;
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phys_desc = ddadr = _phy_readl_relaxed(phy, DDADR);
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seq_printf(s, "DMA channel %d descriptors :\n", phy->idx);
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seq_printf(s, "[%03d] First descriptor unknown\n", 0);
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for (i = 1; i < max_show && is_phys_valid(phys_desc); i++) {
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desc = phys_to_virt(phys_desc);
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dcmd = desc->dcmd;
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burst = dbg_burst_from_dcmd(dcmd);
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width = (1 << ((dcmd >> 14) & 0x3)) >> 1;
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seq_printf(s, "[%03d] Desc at %08lx(virt %p)\n",
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i, phys_desc, desc);
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seq_printf(s, "\tDDADR = %08x\n", desc->ddadr);
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seq_printf(s, "\tDSADR = %08x\n", desc->dsadr);
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seq_printf(s, "\tDTADR = %08x\n", desc->dtadr);
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seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d width=%d len=%d)\n",
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dcmd,
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PXA_DCMD_STR(INCSRCADDR), PXA_DCMD_STR(INCTRGADDR),
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PXA_DCMD_STR(FLOWSRC), PXA_DCMD_STR(FLOWTRG),
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PXA_DCMD_STR(STARTIRQEN), PXA_DCMD_STR(ENDIRQEN),
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PXA_DCMD_STR(ENDIAN), burst, width,
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dcmd & PXA_DCMD_LENGTH);
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phys_desc = desc->ddadr;
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}
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if (i == max_show)
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seq_printf(s, "[%03d] Desc at %08lx ... max display reached\n",
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i, phys_desc);
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else
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seq_printf(s, "[%03d] Desc at %08lx is %s\n",
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i, phys_desc, phys_desc == DDADR_STOP ?
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"DDADR_STOP" : "invalid");
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return 0;
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}
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static int dbg_show_chan_state(struct seq_file *s, void *p)
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{
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struct pxad_phy *phy = s->private;
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u32 dcsr, dcmd;
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int burst, width;
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static const char * const str_prio[] = {
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"high", "normal", "low", "invalid"
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};
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dcsr = _phy_readl_relaxed(phy, DCSR);
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dcmd = _phy_readl_relaxed(phy, DCMD);
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burst = dbg_burst_from_dcmd(dcmd);
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width = (1 << ((dcmd >> 14) & 0x3)) >> 1;
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seq_printf(s, "DMA channel %d\n", phy->idx);
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seq_printf(s, "\tPriority : %s\n",
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str_prio[(phy->idx & 0xf) / 4]);
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seq_printf(s, "\tUnaligned transfer bit: %s\n",
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_phy_readl_relaxed(phy, DALGN) & BIT(phy->idx) ?
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"yes" : "no");
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seq_printf(s, "\tDCSR = %08x (%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
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dcsr, PXA_DCSR_STR(RUN), PXA_DCSR_STR(NODESC),
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PXA_DCSR_STR(STOPIRQEN), PXA_DCSR_STR(EORIRQEN),
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PXA_DCSR_STR(EORJMPEN), PXA_DCSR_STR(EORSTOPEN),
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PXA_DCSR_STR(SETCMPST), PXA_DCSR_STR(CLRCMPST),
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PXA_DCSR_STR(CMPST), PXA_DCSR_STR(EORINTR),
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PXA_DCSR_STR(REQPEND), PXA_DCSR_STR(STOPSTATE),
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PXA_DCSR_STR(ENDINTR), PXA_DCSR_STR(STARTINTR),
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PXA_DCSR_STR(BUSERR));
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seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d width=%d len=%d)\n",
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dcmd,
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PXA_DCMD_STR(INCSRCADDR), PXA_DCMD_STR(INCTRGADDR),
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PXA_DCMD_STR(FLOWSRC), PXA_DCMD_STR(FLOWTRG),
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PXA_DCMD_STR(STARTIRQEN), PXA_DCMD_STR(ENDIRQEN),
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PXA_DCMD_STR(ENDIAN), burst, width, dcmd & PXA_DCMD_LENGTH);
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seq_printf(s, "\tDSADR = %08x\n", _phy_readl_relaxed(phy, DSADR));
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seq_printf(s, "\tDTADR = %08x\n", _phy_readl_relaxed(phy, DTADR));
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seq_printf(s, "\tDDADR = %08x\n", _phy_readl_relaxed(phy, DDADR));
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return 0;
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}
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static int dbg_show_state(struct seq_file *s, void *p)
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{
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struct pxad_device *pdev = s->private;
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/* basic device status */
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seq_puts(s, "DMA engine status\n");
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seq_printf(s, "\tChannel number: %d\n", pdev->nr_chans);
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return 0;
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}
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#define DBGFS_FUNC_DECL(name) \
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static int dbg_open_##name(struct inode *inode, struct file *file) \
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{ \
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return single_open(file, dbg_show_##name, inode->i_private); \
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} \
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static const struct file_operations dbg_fops_##name = { \
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.owner = THIS_MODULE, \
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.open = dbg_open_##name, \
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.llseek = seq_lseek, \
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.read = seq_read, \
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.release = single_release, \
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}
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DBGFS_FUNC_DECL(state);
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DBGFS_FUNC_DECL(chan_state);
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DBGFS_FUNC_DECL(descriptors);
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DBGFS_FUNC_DECL(requester_chan);
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static struct dentry *pxad_dbg_alloc_chan(struct pxad_device *pdev,
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int ch, struct dentry *chandir)
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{
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char chan_name[11];
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struct dentry *chan, *chan_state = NULL, *chan_descr = NULL;
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struct dentry *chan_reqs = NULL;
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void *dt;
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scnprintf(chan_name, sizeof(chan_name), "%d", ch);
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chan = debugfs_create_dir(chan_name, chandir);
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dt = (void *)&pdev->phys[ch];
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if (chan)
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chan_state = debugfs_create_file("state", 0400, chan, dt,
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&dbg_fops_chan_state);
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if (chan_state)
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chan_descr = debugfs_create_file("descriptors", 0400, chan, dt,
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&dbg_fops_descriptors);
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if (chan_descr)
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chan_reqs = debugfs_create_file("requesters", 0400, chan, dt,
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&dbg_fops_requester_chan);
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if (!chan_reqs)
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goto err_state;
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return chan;
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err_state:
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debugfs_remove_recursive(chan);
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return NULL;
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}
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static void pxad_init_debugfs(struct pxad_device *pdev)
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{
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int i;
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struct dentry *chandir;
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pdev->dbgfs_root = debugfs_create_dir(dev_name(pdev->slave.dev), NULL);
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if (IS_ERR(pdev->dbgfs_root) || !pdev->dbgfs_root)
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goto err_root;
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pdev->dbgfs_state = debugfs_create_file("state", 0400, pdev->dbgfs_root,
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pdev, &dbg_fops_state);
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if (!pdev->dbgfs_state)
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goto err_state;
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pdev->dbgfs_chan =
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kmalloc_array(pdev->nr_chans, sizeof(*pdev->dbgfs_state),
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GFP_KERNEL);
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if (!pdev->dbgfs_chan)
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goto err_alloc;
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chandir = debugfs_create_dir("channels", pdev->dbgfs_root);
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if (!chandir)
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goto err_chandir;
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for (i = 0; i < pdev->nr_chans; i++) {
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pdev->dbgfs_chan[i] = pxad_dbg_alloc_chan(pdev, i, chandir);
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if (!pdev->dbgfs_chan[i])
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goto err_chans;
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}
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return;
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err_chans:
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err_chandir:
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kfree(pdev->dbgfs_chan);
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err_alloc:
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err_state:
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debugfs_remove_recursive(pdev->dbgfs_root);
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err_root:
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pr_err("pxad: debugfs is not available\n");
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}
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static void pxad_cleanup_debugfs(struct pxad_device *pdev)
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{
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debugfs_remove_recursive(pdev->dbgfs_root);
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}
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#else
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static inline void pxad_init_debugfs(struct pxad_device *pdev) {}
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static inline void pxad_cleanup_debugfs(struct pxad_device *pdev) {}
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#endif
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static struct pxad_phy *lookup_phy(struct pxad_chan *pchan)
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{
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int prio, i;
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@ -982,6 +1224,7 @@ static int pxad_remove(struct platform_device *op)
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{
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struct pxad_device *pdev = platform_get_drvdata(op);
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pxad_cleanup_debugfs(pdev);
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pxad_free_channels(&pdev->slave);
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dma_async_device_unregister(&pdev->slave);
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return 0;
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@ -1154,6 +1397,7 @@ static int pxad_probe(struct platform_device *op)
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}
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platform_set_drvdata(op, pdev);
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pxad_init_debugfs(pdev);
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dev_info(pdev->slave.dev, "initialized %d channels\n", dma_channels);
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return 0;
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}
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