RISC-V: Add arch functions to support hibernation/suspend-to-disk
Low level Arch functions were created to support hibernation. swsusp_arch_suspend() relies code from __cpu_suspend_enter() to write cpu state onto the stack, then calling swsusp_save() to save the memory image. Arch specific hibernation header is implemented and is utilized by the arch_hibernation_header_restore() and arch_hibernation_header_save() functions. The arch specific hibernation header consists of satp, hartid, and the cpu_resume address. The kernel built version is also need to be saved into the hibernation image header to making sure only the same kernel is restore when resume. swsusp_arch_resume() creates a temporary page table that covering only the linear map. It copies the restore code to a 'safe' page, then start to restore the memory image. Once completed, it restores the original kernel's page table. It then calls into __hibernate_cpu_resume() to restore the CPU context. Finally, it follows the normal hibernation path back to the hibernation core. To enable hibernation/suspend to disk into RISCV, the below config need to be enabled: - CONFIG_HIBERNATION - CONFIG_ARCH_HIBERNATION_HEADER - CONFIG_ARCH_HIBERNATION_POSSIBLE Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> Reviewed-by: Mason Huo <mason.huo@starfivetech.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20230330064321.1008373-5-jeeheng.sia@starfivetech.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Sia Jee Heng
Palmer Dabbelt
Родитель
a15c90b67a
Коммит
c031721001
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@ -54,7 +54,7 @@ config RISCV
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select CLINT_TIMER if !MMU
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select CLONE_BACKWARDS
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select COMMON_CLK
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select CPU_PM if CPU_IDLE
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select CPU_PM if CPU_IDLE || HIBERNATION
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select EDAC_SUPPORT
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select GENERIC_ARCH_TOPOLOGY
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select GENERIC_ATOMIC64 if !64BIT
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@ -707,6 +707,12 @@ menu "Power management options"
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source "kernel/power/Kconfig"
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config ARCH_HIBERNATION_POSSIBLE
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def_bool y
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config ARCH_HIBERNATION_HEADER
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def_bool HIBERNATION
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endmenu # "Power management options"
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menu "CPU Power Management"
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@ -59,4 +59,24 @@
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REG_L s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0)
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.endm
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/*
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* copy_page - copy 1 page (4KB) of data from source to destination
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* @a0 - destination
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* @a1 - source
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*/
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.macro copy_page a0, a1
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lui a2, 0x1
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add a2, a2, a0
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1 :
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REG_L t0, 0(a1)
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REG_L t1, SZREG(a1)
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REG_S t0, 0(a0)
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REG_S t1, SZREG(a0)
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addi a0, a0, 2 * SZREG
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addi a1, a1, 2 * SZREG
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bne a2, a0, 1b
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.endm
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#endif /* __ASM_ASSEMBLER_H */
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@ -21,6 +21,11 @@ struct suspend_context {
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#endif
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};
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/*
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* Used by hibernation core and cleared during resume sequence
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*/
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extern int in_suspend;
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/* Low-level CPU suspend entry function */
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int __cpu_suspend_enter(struct suspend_context *context);
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@ -36,4 +41,18 @@ int __cpu_resume_enter(unsigned long hartid, unsigned long context);
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/* Used to save and restore the CSRs */
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void suspend_save_csrs(struct suspend_context *context);
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void suspend_restore_csrs(struct suspend_context *context);
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/* Low-level API to support hibernation */
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int swsusp_arch_suspend(void);
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int swsusp_arch_resume(void);
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int arch_hibernation_header_save(void *addr, unsigned int max_size);
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int arch_hibernation_header_restore(void *addr);
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int __hibernate_cpu_resume(void);
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/* Used to resume on the CPU we hibernated on */
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int hibernate_resume_nonboot_cpu_disable(void);
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asmlinkage void hibernate_restore_image(unsigned long resume_satp, unsigned long satp_temp,
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unsigned long cpu_resume);
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asmlinkage int hibernate_core_restore_code(void);
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#endif
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@ -64,6 +64,7 @@ obj-$(CONFIG_MODULES) += module.o
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obj-$(CONFIG_MODULE_SECTIONS) += module-sections.o
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obj-$(CONFIG_CPU_PM) += suspend_entry.o suspend.o
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obj-$(CONFIG_HIBERNATION) += hibernate.o hibernate-asm.o
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obj-$(CONFIG_FUNCTION_TRACER) += mcount.o ftrace.o
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obj-$(CONFIG_DYNAMIC_FTRACE) += mcount-dyn.o
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@ -9,6 +9,7 @@
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#include <linux/kbuild.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/suspend.h>
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#include <asm/kvm_host.h>
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#include <asm/thread_info.h>
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#include <asm/ptrace.h>
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@ -116,6 +117,10 @@ void asm_offsets(void)
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OFFSET(SUSPEND_CONTEXT_REGS, suspend_context, regs);
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OFFSET(HIBERN_PBE_ADDR, pbe, address);
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OFFSET(HIBERN_PBE_ORIG, pbe, orig_address);
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OFFSET(HIBERN_PBE_NEXT, pbe, next);
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OFFSET(KVM_ARCH_GUEST_ZERO, kvm_vcpu_arch, guest_context.zero);
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OFFSET(KVM_ARCH_GUEST_RA, kvm_vcpu_arch, guest_context.ra);
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OFFSET(KVM_ARCH_GUEST_SP, kvm_vcpu_arch, guest_context.sp);
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@ -0,0 +1,77 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Hibernation low level support for RISCV.
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*
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* Copyright (C) 2023 StarFive Technology Co., Ltd.
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*
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* Author: Jee Heng Sia <jeeheng.sia@starfivetech.com>
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*/
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#include <asm/asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/assembler.h>
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#include <asm/csr.h>
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#include <linux/linkage.h>
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/*
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* int __hibernate_cpu_resume(void)
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* Switch back to the hibernated image's page table prior to restoring the CPU
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* context.
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*
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* Always returns 0
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*/
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ENTRY(__hibernate_cpu_resume)
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/* switch to hibernated image's page table. */
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csrw CSR_SATP, s0
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sfence.vma
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REG_L a0, hibernate_cpu_context
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suspend_restore_csrs
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suspend_restore_regs
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/* Return zero value. */
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mv a0, zero
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ret
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END(__hibernate_cpu_resume)
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/*
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* Prepare to restore the image.
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* a0: satp of saved page tables.
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* a1: satp of temporary page tables.
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* a2: cpu_resume.
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*/
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ENTRY(hibernate_restore_image)
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mv s0, a0
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mv s1, a1
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mv s2, a2
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REG_L s4, restore_pblist
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REG_L a1, relocated_restore_code
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jalr a1
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END(hibernate_restore_image)
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/*
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* The below code will be executed from a 'safe' page.
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* It first switches to the temporary page table, then starts to copy the pages
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* back to the original memory location. Finally, it jumps to __hibernate_cpu_resume()
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* to restore the CPU context.
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*/
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ENTRY(hibernate_core_restore_code)
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/* switch to temp page table. */
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csrw satp, s1
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sfence.vma
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.Lcopy:
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/* The below code will restore the hibernated image. */
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REG_L a1, HIBERN_PBE_ADDR(s4)
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REG_L a0, HIBERN_PBE_ORIG(s4)
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copy_page a0, a1
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REG_L s4, HIBERN_PBE_NEXT(s4)
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bnez s4, .Lcopy
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jalr s2
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END(hibernate_core_restore_code)
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@ -0,0 +1,427 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Hibernation support for RISCV
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*
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* Copyright (C) 2023 StarFive Technology Co., Ltd.
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*
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* Author: Jee Heng Sia <jeeheng.sia@starfivetech.com>
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*/
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#include <asm/barrier.h>
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#include <asm/cacheflush.h>
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#include <asm/mmu_context.h>
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#include <asm/page.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/sections.h>
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#include <asm/set_memory.h>
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#include <asm/smp.h>
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#include <asm/suspend.h>
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#include <linux/cpu.h>
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#include <linux/memblock.h>
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#include <linux/pm.h>
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#include <linux/sched.h>
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#include <linux/suspend.h>
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#include <linux/utsname.h>
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/* The logical cpu number we should resume on, initialised to a non-cpu number. */
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static int sleep_cpu = -EINVAL;
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/* Pointer to the temporary resume page table. */
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static pgd_t *resume_pg_dir;
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/* CPU context to be saved. */
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struct suspend_context *hibernate_cpu_context;
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EXPORT_SYMBOL_GPL(hibernate_cpu_context);
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unsigned long relocated_restore_code;
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EXPORT_SYMBOL_GPL(relocated_restore_code);
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/**
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* struct arch_hibernate_hdr_invariants - container to store kernel build version.
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* @uts_version: to save the build number and date so that we do not resume with
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* a different kernel.
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*/
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struct arch_hibernate_hdr_invariants {
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char uts_version[__NEW_UTS_LEN + 1];
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};
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/**
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* struct arch_hibernate_hdr - helper parameters that help us to restore the image.
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* @invariants: container to store kernel build version.
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* @hartid: to make sure same boot_cpu executes the hibernate/restore code.
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* @saved_satp: original page table used by the hibernated image.
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* @restore_cpu_addr: the kernel's image address to restore the CPU context.
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*/
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static struct arch_hibernate_hdr {
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struct arch_hibernate_hdr_invariants invariants;
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unsigned long hartid;
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unsigned long saved_satp;
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unsigned long restore_cpu_addr;
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} resume_hdr;
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static void arch_hdr_invariants(struct arch_hibernate_hdr_invariants *i)
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{
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memset(i, 0, sizeof(*i));
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memcpy(i->uts_version, init_utsname()->version, sizeof(i->uts_version));
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}
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/*
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* Check if the given pfn is in the 'nosave' section.
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*/
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int pfn_is_nosave(unsigned long pfn)
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{
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unsigned long nosave_begin_pfn = sym_to_pfn(&__nosave_begin);
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unsigned long nosave_end_pfn = sym_to_pfn(&__nosave_end - 1);
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return ((pfn >= nosave_begin_pfn) && (pfn <= nosave_end_pfn));
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}
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void notrace save_processor_state(void)
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{
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WARN_ON(num_online_cpus() != 1);
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}
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void notrace restore_processor_state(void)
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{
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}
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/*
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* Helper parameters need to be saved to the hibernation image header.
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*/
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int arch_hibernation_header_save(void *addr, unsigned int max_size)
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{
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struct arch_hibernate_hdr *hdr = addr;
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if (max_size < sizeof(*hdr))
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return -EOVERFLOW;
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arch_hdr_invariants(&hdr->invariants);
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hdr->hartid = cpuid_to_hartid_map(sleep_cpu);
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hdr->saved_satp = csr_read(CSR_SATP);
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hdr->restore_cpu_addr = (unsigned long)__hibernate_cpu_resume;
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return 0;
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}
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EXPORT_SYMBOL_GPL(arch_hibernation_header_save);
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/*
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* Retrieve the helper parameters from the hibernation image header.
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*/
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int arch_hibernation_header_restore(void *addr)
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{
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struct arch_hibernate_hdr_invariants invariants;
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struct arch_hibernate_hdr *hdr = addr;
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int ret = 0;
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arch_hdr_invariants(&invariants);
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if (memcmp(&hdr->invariants, &invariants, sizeof(invariants))) {
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pr_crit("Hibernate image not generated by this kernel!\n");
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return -EINVAL;
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}
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sleep_cpu = riscv_hartid_to_cpuid(hdr->hartid);
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if (sleep_cpu < 0) {
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pr_crit("Hibernated on a CPU not known to this kernel!\n");
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sleep_cpu = -EINVAL;
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return -EINVAL;
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}
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#ifdef CONFIG_SMP
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ret = bringup_hibernate_cpu(sleep_cpu);
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if (ret) {
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sleep_cpu = -EINVAL;
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return ret;
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}
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#endif
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resume_hdr = *hdr;
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return ret;
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}
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EXPORT_SYMBOL_GPL(arch_hibernation_header_restore);
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int swsusp_arch_suspend(void)
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{
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int ret = 0;
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if (__cpu_suspend_enter(hibernate_cpu_context)) {
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sleep_cpu = smp_processor_id();
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suspend_save_csrs(hibernate_cpu_context);
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ret = swsusp_save();
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} else {
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suspend_restore_csrs(hibernate_cpu_context);
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flush_tlb_all();
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flush_icache_all();
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/*
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* Tell the hibernation core that we've just restored the memory.
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*/
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in_suspend = 0;
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sleep_cpu = -EINVAL;
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}
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return ret;
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}
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static int temp_pgtable_map_pte(pmd_t *dst_pmdp, pmd_t *src_pmdp, unsigned long start,
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unsigned long end, pgprot_t prot)
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{
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pte_t *src_ptep;
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pte_t *dst_ptep;
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if (pmd_none(READ_ONCE(*dst_pmdp))) {
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dst_ptep = (pte_t *)get_safe_page(GFP_ATOMIC);
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if (!dst_ptep)
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return -ENOMEM;
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pmd_populate_kernel(NULL, dst_pmdp, dst_ptep);
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}
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dst_ptep = pte_offset_kernel(dst_pmdp, start);
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src_ptep = pte_offset_kernel(src_pmdp, start);
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do {
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pte_t pte = READ_ONCE(*src_ptep);
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if (pte_present(pte))
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set_pte(dst_ptep, __pte(pte_val(pte) | pgprot_val(prot)));
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} while (dst_ptep++, src_ptep++, start += PAGE_SIZE, start < end);
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return 0;
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}
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static int temp_pgtable_map_pmd(pud_t *dst_pudp, pud_t *src_pudp, unsigned long start,
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unsigned long end, pgprot_t prot)
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{
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unsigned long next;
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unsigned long ret;
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pmd_t *src_pmdp;
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pmd_t *dst_pmdp;
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if (pud_none(READ_ONCE(*dst_pudp))) {
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dst_pmdp = (pmd_t *)get_safe_page(GFP_ATOMIC);
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if (!dst_pmdp)
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return -ENOMEM;
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pud_populate(NULL, dst_pudp, dst_pmdp);
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}
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dst_pmdp = pmd_offset(dst_pudp, start);
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src_pmdp = pmd_offset(src_pudp, start);
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do {
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pmd_t pmd = READ_ONCE(*src_pmdp);
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next = pmd_addr_end(start, end);
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if (pmd_none(pmd))
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continue;
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if (pmd_leaf(pmd)) {
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set_pmd(dst_pmdp, __pmd(pmd_val(pmd) | pgprot_val(prot)));
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} else {
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ret = temp_pgtable_map_pte(dst_pmdp, src_pmdp, start, next, prot);
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if (ret)
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return -ENOMEM;
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}
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} while (dst_pmdp++, src_pmdp++, start = next, start != end);
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return 0;
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}
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static int temp_pgtable_map_pud(p4d_t *dst_p4dp, p4d_t *src_p4dp, unsigned long start,
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unsigned long end, pgprot_t prot)
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{
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unsigned long next;
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unsigned long ret;
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pud_t *dst_pudp;
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pud_t *src_pudp;
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if (p4d_none(READ_ONCE(*dst_p4dp))) {
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dst_pudp = (pud_t *)get_safe_page(GFP_ATOMIC);
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if (!dst_pudp)
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return -ENOMEM;
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p4d_populate(NULL, dst_p4dp, dst_pudp);
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}
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dst_pudp = pud_offset(dst_p4dp, start);
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src_pudp = pud_offset(src_p4dp, start);
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do {
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pud_t pud = READ_ONCE(*src_pudp);
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next = pud_addr_end(start, end);
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if (pud_none(pud))
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continue;
|
||||
|
||||
if (pud_leaf(pud)) {
|
||||
set_pud(dst_pudp, __pud(pud_val(pud) | pgprot_val(prot)));
|
||||
} else {
|
||||
ret = temp_pgtable_map_pmd(dst_pudp, src_pudp, start, next, prot);
|
||||
if (ret)
|
||||
return -ENOMEM;
|
||||
}
|
||||
} while (dst_pudp++, src_pudp++, start = next, start != end);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int temp_pgtable_map_p4d(pgd_t *dst_pgdp, pgd_t *src_pgdp, unsigned long start,
|
||||
unsigned long end, pgprot_t prot)
|
||||
{
|
||||
unsigned long next;
|
||||
unsigned long ret;
|
||||
p4d_t *dst_p4dp;
|
||||
p4d_t *src_p4dp;
|
||||
|
||||
if (pgd_none(READ_ONCE(*dst_pgdp))) {
|
||||
dst_p4dp = (p4d_t *)get_safe_page(GFP_ATOMIC);
|
||||
if (!dst_p4dp)
|
||||
return -ENOMEM;
|
||||
|
||||
pgd_populate(NULL, dst_pgdp, dst_p4dp);
|
||||
}
|
||||
|
||||
dst_p4dp = p4d_offset(dst_pgdp, start);
|
||||
src_p4dp = p4d_offset(src_pgdp, start);
|
||||
|
||||
do {
|
||||
p4d_t p4d = READ_ONCE(*src_p4dp);
|
||||
|
||||
next = p4d_addr_end(start, end);
|
||||
|
||||
if (p4d_none(p4d))
|
||||
continue;
|
||||
|
||||
if (p4d_leaf(p4d)) {
|
||||
set_p4d(dst_p4dp, __p4d(p4d_val(p4d) | pgprot_val(prot)));
|
||||
} else {
|
||||
ret = temp_pgtable_map_pud(dst_p4dp, src_p4dp, start, next, prot);
|
||||
if (ret)
|
||||
return -ENOMEM;
|
||||
}
|
||||
} while (dst_p4dp++, src_p4dp++, start = next, start != end);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int temp_pgtable_mapping(pgd_t *pgdp, unsigned long start, unsigned long end, pgprot_t prot)
|
||||
{
|
||||
pgd_t *dst_pgdp = pgd_offset_pgd(pgdp, start);
|
||||
pgd_t *src_pgdp = pgd_offset_k(start);
|
||||
unsigned long next;
|
||||
unsigned long ret;
|
||||
|
||||
do {
|
||||
pgd_t pgd = READ_ONCE(*src_pgdp);
|
||||
|
||||
next = pgd_addr_end(start, end);
|
||||
|
||||
if (pgd_none(pgd))
|
||||
continue;
|
||||
|
||||
if (pgd_leaf(pgd)) {
|
||||
set_pgd(dst_pgdp, __pgd(pgd_val(pgd) | pgprot_val(prot)));
|
||||
} else {
|
||||
ret = temp_pgtable_map_p4d(dst_pgdp, src_pgdp, start, next, prot);
|
||||
if (ret)
|
||||
return -ENOMEM;
|
||||
}
|
||||
} while (dst_pgdp++, src_pgdp++, start = next, start != end);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned long relocate_restore_code(void)
|
||||
{
|
||||
void *page = (void *)get_safe_page(GFP_ATOMIC);
|
||||
|
||||
if (!page)
|
||||
return -ENOMEM;
|
||||
|
||||
copy_page(page, hibernate_core_restore_code);
|
||||
|
||||
/* Make the page containing the relocated code executable. */
|
||||
set_memory_x((unsigned long)page, 1);
|
||||
|
||||
return (unsigned long)page;
|
||||
}
|
||||
|
||||
int swsusp_arch_resume(void)
|
||||
{
|
||||
unsigned long end = (unsigned long)pfn_to_virt(max_low_pfn);
|
||||
unsigned long start = PAGE_OFFSET;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* Memory allocated by get_safe_page() will be dealt with by the hibernation core,
|
||||
* we don't need to free it here.
|
||||
*/
|
||||
resume_pg_dir = (pgd_t *)get_safe_page(GFP_ATOMIC);
|
||||
if (!resume_pg_dir)
|
||||
return -ENOMEM;
|
||||
|
||||
/*
|
||||
* Create a temporary page table and map the whole linear region as executable and
|
||||
* writable.
|
||||
*/
|
||||
ret = temp_pgtable_mapping(resume_pg_dir, start, end, __pgprot(_PAGE_WRITE | _PAGE_EXEC));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Move the restore code to a new page so that it doesn't get overwritten by itself. */
|
||||
relocated_restore_code = relocate_restore_code();
|
||||
if (relocated_restore_code == -ENOMEM)
|
||||
return -ENOMEM;
|
||||
|
||||
/*
|
||||
* Map the __hibernate_cpu_resume() address to the temporary page table so that the
|
||||
* restore code can jumps to it after finished restore the image. The next execution
|
||||
* code doesn't find itself in a different address space after switching over to the
|
||||
* original page table used by the hibernated image.
|
||||
* The __hibernate_cpu_resume() mapping is unnecessary for RV32 since the kernel and
|
||||
* linear addresses are identical, but different for RV64. To ensure consistency, we
|
||||
* map it for both RV32 and RV64 kernels.
|
||||
* Additionally, we should ensure that the page is writable before restoring the image.
|
||||
*/
|
||||
start = (unsigned long)resume_hdr.restore_cpu_addr;
|
||||
end = start + PAGE_SIZE;
|
||||
|
||||
ret = temp_pgtable_mapping(resume_pg_dir, start, end, __pgprot(_PAGE_WRITE));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
hibernate_restore_image(resume_hdr.saved_satp, (PFN_DOWN(__pa(resume_pg_dir)) | satp_mode),
|
||||
resume_hdr.restore_cpu_addr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP_SMP
|
||||
int hibernate_resume_nonboot_cpu_disable(void)
|
||||
{
|
||||
if (sleep_cpu < 0) {
|
||||
pr_err("Failing to resume from hibernate on an unknown CPU\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
return freeze_secondary_cpus(sleep_cpu);
|
||||
}
|
||||
#endif
|
||||
|
||||
static int __init riscv_hibernate_init(void)
|
||||
{
|
||||
hibernate_cpu_context = kzalloc(sizeof(*hibernate_cpu_context), GFP_KERNEL);
|
||||
|
||||
if (WARN_ON(!hibernate_cpu_context))
|
||||
return -ENOMEM;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
early_initcall(riscv_hibernate_init);
|
||||
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