KVM: VMX: Fix conditions for guest IA32_XSS support
Volume 4 of the SDM says that IA32_XSS is supported
if CPUID(EAX=0DH,ECX=1):EAX.XSS[bit 3] is set, so only the
X86_FEATURE_XSAVES check is necessary (X86_FEATURE_XSAVES is the Linux
name for CPUID(EAX=0DH,ECX=1):EAX.XSS[bit 3]).
Fixes: 4d763b168e
("KVM: VMX: check CPUID before allowing read/write of IA32_XSS")
Reviewed-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Aaron Lewis <aaronlewis@google.com>
Change-Id: I9059b9f2e3595e4b09a4cdcf14b933b22ebad419
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Родитель
7204160eb7
Коммит
c034f2aa86
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@ -1830,10 +1830,8 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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return vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index,
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return vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index,
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&msr_info->data);
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&msr_info->data);
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case MSR_IA32_XSS:
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case MSR_IA32_XSS:
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if (!vmx_xsaves_supported() ||
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if (!msr_info->host_initiated &&
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(!msr_info->host_initiated &&
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!guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
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!(guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
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guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))))
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return 1;
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return 1;
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msr_info->data = vcpu->arch.ia32_xss;
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msr_info->data = vcpu->arch.ia32_xss;
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break;
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break;
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@ -2073,10 +2071,8 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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return 1;
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return 1;
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return vmx_set_vmx_msr(vcpu, msr_index, data);
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return vmx_set_vmx_msr(vcpu, msr_index, data);
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case MSR_IA32_XSS:
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case MSR_IA32_XSS:
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if (!vmx_xsaves_supported() ||
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if (!msr_info->host_initiated &&
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(!msr_info->host_initiated &&
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!guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
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!(guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
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guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))))
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return 1;
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return 1;
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/*
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/*
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* The only supported bit as of Skylake is bit 8, but
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* The only supported bit as of Skylake is bit 8, but
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@ -2085,11 +2081,13 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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if (data != 0)
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if (data != 0)
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return 1;
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return 1;
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vcpu->arch.ia32_xss = data;
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vcpu->arch.ia32_xss = data;
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if (vcpu->arch.ia32_xss != host_xss)
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if (vcpu->arch.xsaves_enabled) {
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add_atomic_switch_msr(vmx, MSR_IA32_XSS,
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if (vcpu->arch.ia32_xss != host_xss)
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vcpu->arch.ia32_xss, host_xss, false);
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add_atomic_switch_msr(vmx, MSR_IA32_XSS,
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else
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vcpu->arch.ia32_xss, host_xss, false);
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clear_atomic_switch_msr(vmx, MSR_IA32_XSS);
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else
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clear_atomic_switch_msr(vmx, MSR_IA32_XSS);
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}
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break;
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break;
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case MSR_IA32_RTIT_CTL:
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case MSR_IA32_RTIT_CTL:
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if ((pt_mode != PT_MODE_HOST_GUEST) ||
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if ((pt_mode != PT_MODE_HOST_GUEST) ||
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