[POWERPC] 4xx: Add AMCC Glacier 460GT eval board dts
The patch adds the Glacier dts. The Glacier is nearly identical to the Canyonlands (460EX). Here the differences: - 4 ethernet ports instead of 2 - no SATA port - no USB port Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
This commit is contained in:
Stefan Roese
Josh Boyer
Родитель
ac64673449
Коммит
c06cf7dad6
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@ -0,0 +1,464 @@
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/*
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* Device Tree Source for AMCC Glacier (460GT)
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*
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* Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*/
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/ {
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#address-cells = <2>;
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#size-cells = <1>;
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model = "amcc,glacier";
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compatible = "amcc,glacier", "amcc,canyonlands";
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dcr-parent = <&/cpus/cpu@0>;
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aliases {
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ethernet0 = &EMAC0;
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ethernet1 = &EMAC1;
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ethernet2 = &EMAC2;
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ethernet3 = &EMAC3;
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serial0 = &UART0;
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serial1 = &UART1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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model = "PowerPC,460GT";
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reg = <0>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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timebase-frequency = <0>; /* Filled in by U-Boot */
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i-cache-line-size = <20>;
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d-cache-line-size = <20>;
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i-cache-size = <8000>;
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d-cache-size = <8000>;
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dcr-controller;
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dcr-access-method = "native";
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0 0>; /* Filled in by U-Boot */
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};
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UIC0: interrupt-controller0 {
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compatible = "ibm,uic-460gt","ibm,uic";
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interrupt-controller;
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cell-index = <0>;
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dcr-reg = <0c0 009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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};
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UIC1: interrupt-controller1 {
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compatible = "ibm,uic-460gt","ibm,uic";
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interrupt-controller;
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cell-index = <1>;
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dcr-reg = <0d0 009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <1e 4 1f 4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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UIC2: interrupt-controller2 {
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compatible = "ibm,uic-460gt","ibm,uic";
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interrupt-controller;
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cell-index = <2>;
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dcr-reg = <0e0 009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <a 4 b 4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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UIC3: interrupt-controller3 {
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compatible = "ibm,uic-460gt","ibm,uic";
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interrupt-controller;
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cell-index = <3>;
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dcr-reg = <0f0 009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <10 4 11 4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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SDR0: sdr {
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compatible = "ibm,sdr-460gt";
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dcr-reg = <00e 002>;
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};
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CPR0: cpr {
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compatible = "ibm,cpr-460gt";
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dcr-reg = <00c 002>;
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};
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plb {
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compatible = "ibm,plb-460gt", "ibm,plb4";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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clock-frequency = <0>; /* Filled in by U-Boot */
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SDRAM0: sdram {
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compatible = "ibm,sdram-460gt", "ibm,sdram-405gp";
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dcr-reg = <010 2>;
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};
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MAL0: mcmal {
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compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
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dcr-reg = <180 62>;
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num-tx-chans = <4>;
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num-rx-chans = <20>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-parent = <&UIC2>;
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interrupts = < /*TXEOB*/ 6 4
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/*RXEOB*/ 7 4
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/*SERR*/ 3 4
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/*TXDE*/ 4 4
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/*RXDE*/ 5 4>;
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desc-base-addr-high = <8>;
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};
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POB0: opb {
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compatible = "ibm,opb-460gt", "ibm,opb";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <b0000000 4 b0000000 50000000>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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EBC0: ebc {
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compatible = "ibm,ebc-460gt", "ibm,ebc";
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dcr-reg = <012 2>;
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#address-cells = <2>;
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#size-cells = <1>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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interrupts = <6 4>;
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interrupt-parent = <&UIC1>;
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};
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UART0: serial@ef600300 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600300 8>;
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virtual-reg = <ef600300>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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current-speed = <0>; /* Filled in by U-Boot */
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interrupt-parent = <&UIC1>;
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interrupts = <1 4>;
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};
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UART1: serial@ef600400 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600400 8>;
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virtual-reg = <ef600400>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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current-speed = <0>; /* Filled in by U-Boot */
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interrupt-parent = <&UIC0>;
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interrupts = <1 4>;
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};
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UART2: serial@ef600500 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600500 8>;
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virtual-reg = <ef600500>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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current-speed = <0>; /* Filled in by U-Boot */
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interrupt-parent = <&UIC1>;
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interrupts = <1d 4>;
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};
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UART3: serial@ef600600 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600600 8>;
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virtual-reg = <ef600600>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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current-speed = <0>; /* Filled in by U-Boot */
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interrupt-parent = <&UIC1>;
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interrupts = <1e 4>;
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};
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IIC0: i2c@ef600700 {
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compatible = "ibm,iic-460gt", "ibm,iic";
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reg = <ef600700 14>;
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interrupt-parent = <&UIC0>;
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interrupts = <2 4>;
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};
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IIC1: i2c@ef600800 {
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compatible = "ibm,iic-460gt", "ibm,iic";
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reg = <ef600800 14>;
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interrupt-parent = <&UIC0>;
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interrupts = <3 4>;
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};
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ZMII0: emac-zmii@ef600d00 {
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compatible = "ibm,zmii-460gt", "ibm,zmii";
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reg = <ef600d00 c>;
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};
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RGMII0: emac-rgmii@ef601500 {
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compatible = "ibm,rgmii-460gt", "ibm,rgmii";
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reg = <ef601500 8>;
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has-mdio;
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};
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RGMII1: emac-rgmii@ef601600 {
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compatible = "ibm,rgmii-460gt", "ibm,rgmii";
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reg = <ef601600 8>;
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has-mdio;
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};
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TAH0: emac-tah@ef601350 {
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compatible = "ibm,tah-460gt", "ibm,tah";
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reg = <ef601350 30>;
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};
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TAH1: emac-tah@ef601450 {
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compatible = "ibm,tah-460gt", "ibm,tah";
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reg = <ef601450 30>;
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};
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EMAC0: ethernet@ef600e00 {
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device_type = "network";
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compatible = "ibm,emac-460gt", "ibm,emac4";
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interrupt-parent = <&EMAC0>;
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interrupts = <0 1>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*Status*/ 0 &UIC2 10 4
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/*Wake*/ 1 &UIC2 14 4>;
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reg = <ef600e00 70>;
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local-mac-address = [000000000000]; /* Filled in by U-Boot */
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mal-device = <&MAL0>;
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mal-tx-channel = <0>;
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mal-rx-channel = <0>;
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cell-index = <0>;
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max-frame-size = <2328>;
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rx-fifo-size = <1000>;
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tx-fifo-size = <800>;
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phy-mode = "rgmii";
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phy-map = <00000000>;
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rgmii-device = <&RGMII0>;
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rgmii-channel = <0>;
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tah-device = <&TAH0>;
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tah-channel = <0>;
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has-inverted-stacr-oc;
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has-new-stacr-staopc;
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};
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EMAC1: ethernet@ef600f00 {
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device_type = "network";
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compatible = "ibm,emac-460gt", "ibm,emac4";
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interrupt-parent = <&EMAC1>;
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interrupts = <0 1>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*Status*/ 0 &UIC2 11 4
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/*Wake*/ 1 &UIC2 15 4>;
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reg = <ef600f00 70>;
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local-mac-address = [000000000000]; /* Filled in by U-Boot */
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mal-device = <&MAL0>;
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mal-tx-channel = <1>;
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mal-rx-channel = <8>;
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cell-index = <1>;
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max-frame-size = <2328>;
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rx-fifo-size = <1000>;
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tx-fifo-size = <800>;
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phy-mode = "rgmii";
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phy-map = <00000000>;
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rgmii-device = <&RGMII0>;
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rgmii-channel = <1>;
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tah-device = <&TAH1>;
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tah-channel = <0>;
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has-inverted-stacr-oc;
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has-new-stacr-staopc;
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};
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EMAC2: ethernet@ef601100 {
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device_type = "network";
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compatible = "ibm,emac-460gt", "ibm,emac4";
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||||||
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interrupt-parent = <&EMAC2>;
|
||||||
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interrupts = <0 1>;
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||||||
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#interrupt-cells = <1>;
|
||||||
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#address-cells = <0>;
|
||||||
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#size-cells = <0>;
|
||||||
|
interrupt-map = </*Status*/ 0 &UIC2 12 4
|
||||||
|
/*Wake*/ 1 &UIC2 16 4>;
|
||||||
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reg = <ef601100 70>;
|
||||||
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local-mac-address = [000000000000]; /* Filled in by U-Boot */
|
||||||
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mal-device = <&MAL0>;
|
||||||
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mal-tx-channel = <2>;
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||||||
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mal-rx-channel = <10>;
|
||||||
|
cell-index = <2>;
|
||||||
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max-frame-size = <2328>;
|
||||||
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rx-fifo-size = <1000>;
|
||||||
|
tx-fifo-size = <800>;
|
||||||
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phy-mode = "rgmii";
|
||||||
|
phy-map = <00000000>;
|
||||||
|
rgmii-device = <&RGMII1>;
|
||||||
|
rgmii-channel = <0>;
|
||||||
|
has-inverted-stacr-oc;
|
||||||
|
has-new-stacr-staopc;
|
||||||
|
};
|
||||||
|
|
||||||
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EMAC3: ethernet@ef601200 {
|
||||||
|
device_type = "network";
|
||||||
|
compatible = "ibm,emac-460gt", "ibm,emac4";
|
||||||
|
interrupt-parent = <&EMAC3>;
|
||||||
|
interrupts = <0 1>;
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
#address-cells = <0>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
interrupt-map = </*Status*/ 0 &UIC2 13 4
|
||||||
|
/*Wake*/ 1 &UIC2 17 4>;
|
||||||
|
reg = <ef601200 70>;
|
||||||
|
local-mac-address = [000000000000]; /* Filled in by U-Boot */
|
||||||
|
mal-device = <&MAL0>;
|
||||||
|
mal-tx-channel = <3>;
|
||||||
|
mal-rx-channel = <18>;
|
||||||
|
cell-index = <3>;
|
||||||
|
max-frame-size = <2328>;
|
||||||
|
rx-fifo-size = <1000>;
|
||||||
|
tx-fifo-size = <800>;
|
||||||
|
phy-mode = "rgmii";
|
||||||
|
phy-map = <00000000>;
|
||||||
|
rgmii-device = <&RGMII1>;
|
||||||
|
rgmii-channel = <1>;
|
||||||
|
has-inverted-stacr-oc;
|
||||||
|
has-new-stacr-staopc;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
PCIX0: pci@c0ec00000 {
|
||||||
|
device_type = "pci";
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
#size-cells = <2>;
|
||||||
|
#address-cells = <3>;
|
||||||
|
compatible = "ibm,plb-pcix-460gt", "ibm,plb-pcix";
|
||||||
|
primary;
|
||||||
|
large-inbound-windows;
|
||||||
|
enable-msi-hole;
|
||||||
|
reg = <c 0ec00000 8 /* Config space access */
|
||||||
|
0 0 0 /* no IACK cycles */
|
||||||
|
c 0ed00000 4 /* Special cycles */
|
||||||
|
c 0ec80000 100 /* Internal registers */
|
||||||
|
c 0ec80100 fc>; /* Internal messaging registers */
|
||||||
|
|
||||||
|
/* Outbound ranges, one memory and one IO,
|
||||||
|
* later cannot be changed
|
||||||
|
*/
|
||||||
|
ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
|
||||||
|
01000000 0 00000000 0000000c 08000000 0 00010000>;
|
||||||
|
|
||||||
|
/* Inbound 2GB range starting at 0 */
|
||||||
|
dma-ranges = <42000000 0 0 0 0 0 80000000>;
|
||||||
|
|
||||||
|
/* This drives busses 0 to 0x3f */
|
||||||
|
bus-range = <0 3f>;
|
||||||
|
|
||||||
|
/* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
|
||||||
|
interrupt-map-mask = <0000 0 0 0>;
|
||||||
|
interrupt-map = < 0000 0 0 0 &UIC1 0 8 >;
|
||||||
|
};
|
||||||
|
|
||||||
|
PCIE0: pciex@d00000000 {
|
||||||
|
device_type = "pci";
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
#size-cells = <2>;
|
||||||
|
#address-cells = <3>;
|
||||||
|
compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
|
||||||
|
primary;
|
||||||
|
port = <0>; /* port number */
|
||||||
|
reg = <d 00000000 20000000 /* Config space access */
|
||||||
|
c 08010000 00001000>; /* Registers */
|
||||||
|
dcr-reg = <100 020>;
|
||||||
|
sdr-base = <300>;
|
||||||
|
|
||||||
|
/* Outbound ranges, one memory and one IO,
|
||||||
|
* later cannot be changed
|
||||||
|
*/
|
||||||
|
ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
|
||||||
|
01000000 0 00000000 0000000f 80000000 0 00010000>;
|
||||||
|
|
||||||
|
/* Inbound 2GB range starting at 0 */
|
||||||
|
dma-ranges = <42000000 0 0 0 0 0 80000000>;
|
||||||
|
|
||||||
|
/* This drives busses 40 to 0x7f */
|
||||||
|
bus-range = <40 7f>;
|
||||||
|
|
||||||
|
/* Legacy interrupts (note the weird polarity, the bridge seems
|
||||||
|
* to invert PCIe legacy interrupts).
|
||||||
|
* We are de-swizzling here because the numbers are actually for
|
||||||
|
* port of the root complex virtual P2P bridge. But I want
|
||||||
|
* to avoid putting a node for it in the tree, so the numbers
|
||||||
|
* below are basically de-swizzled numbers.
|
||||||
|
* The real slot is on idsel 0, so the swizzling is 1:1
|
||||||
|
*/
|
||||||
|
interrupt-map-mask = <0000 0 0 7>;
|
||||||
|
interrupt-map = <
|
||||||
|
0000 0 0 1 &UIC3 c 4 /* swizzled int A */
|
||||||
|
0000 0 0 2 &UIC3 d 4 /* swizzled int B */
|
||||||
|
0000 0 0 3 &UIC3 e 4 /* swizzled int C */
|
||||||
|
0000 0 0 4 &UIC3 f 4 /* swizzled int D */>;
|
||||||
|
};
|
||||||
|
|
||||||
|
PCIE1: pciex@d20000000 {
|
||||||
|
device_type = "pci";
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
#size-cells = <2>;
|
||||||
|
#address-cells = <3>;
|
||||||
|
compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
|
||||||
|
primary;
|
||||||
|
port = <1>; /* port number */
|
||||||
|
reg = <d 20000000 20000000 /* Config space access */
|
||||||
|
c 08011000 00001000>; /* Registers */
|
||||||
|
dcr-reg = <120 020>;
|
||||||
|
sdr-base = <340>;
|
||||||
|
|
||||||
|
/* Outbound ranges, one memory and one IO,
|
||||||
|
* later cannot be changed
|
||||||
|
*/
|
||||||
|
ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
|
||||||
|
01000000 0 00000000 0000000f 80010000 0 00010000>;
|
||||||
|
|
||||||
|
/* Inbound 2GB range starting at 0 */
|
||||||
|
dma-ranges = <42000000 0 0 0 0 0 80000000>;
|
||||||
|
|
||||||
|
/* This drives busses 80 to 0xbf */
|
||||||
|
bus-range = <80 bf>;
|
||||||
|
|
||||||
|
/* Legacy interrupts (note the weird polarity, the bridge seems
|
||||||
|
* to invert PCIe legacy interrupts).
|
||||||
|
* We are de-swizzling here because the numbers are actually for
|
||||||
|
* port of the root complex virtual P2P bridge. But I want
|
||||||
|
* to avoid putting a node for it in the tree, so the numbers
|
||||||
|
* below are basically de-swizzled numbers.
|
||||||
|
* The real slot is on idsel 0, so the swizzling is 1:1
|
||||||
|
*/
|
||||||
|
interrupt-map-mask = <0000 0 0 7>;
|
||||||
|
interrupt-map = <
|
||||||
|
0000 0 0 1 &UIC3 10 4 /* swizzled int A */
|
||||||
|
0000 0 0 2 &UIC3 11 4 /* swizzled int B */
|
||||||
|
0000 0 0 3 &UIC3 12 4 /* swizzled int C */
|
||||||
|
0000 0 0 4 &UIC3 13 4 /* swizzled int D */>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
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