ASoC: dmaengine-pcm: Add support for querying DMA capabilities
Currently each platform making use the the generic dmaengine PCM driver still needs to provide a custom snd_pcm_hardware struct which specifies the capabilities of the DMA controller, e.g. the maximum period size that can be supported. This patch adds code which uses the newly introduced dma_get_slave_caps() API to query this information from the dmaengine driver. The new code path will only be taken if the 'pcm_hardware' field of the snd_dmaengine_pcm_config struct is NULL. The patch also introduces a new 'fifo_size' field to the snd_dmaengine_dai_dma_data struct which is used to initialize the snd_pcm_hardware 'fifo_size' field and needs to be set by the DAI driver. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
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61e6cfa80d
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c0de42bf59
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@ -61,6 +61,7 @@ struct dma_chan *snd_dmaengine_pcm_get_chan(struct snd_pcm_substream *substream)
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* @slave_id: Slave requester id for the DMA channel.
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* @filter_data: Custom DMA channel filter data, this will usually be used when
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* requesting the DMA channel.
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* @fifo_size: FIFO size of the DAI controller in bytes
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*/
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struct snd_dmaengine_dai_dma_data {
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dma_addr_t addr;
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@ -68,6 +69,7 @@ struct snd_dmaengine_dai_dma_data {
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u32 maxburst;
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unsigned int slave_id;
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void *filter_data;
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unsigned int fifo_size;
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};
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void snd_dmaengine_pcm_set_config_from_dai_data(
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@ -36,6 +36,15 @@ static struct dmaengine_pcm *soc_platform_to_pcm(struct snd_soc_platform *p)
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return container_of(p, struct dmaengine_pcm, platform);
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}
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static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm,
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struct snd_pcm_substream *substream)
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{
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if (!pcm->chan[substream->stream])
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return NULL;
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return pcm->chan[substream->stream]->device->dev;
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}
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/**
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* snd_dmaengine_pcm_prepare_slave_config() - Generic prepare_slave_config callback
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* @substream: PCM substream
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@ -92,6 +101,42 @@ static int dmaengine_pcm_hw_params(struct snd_pcm_substream *substream,
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return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
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}
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static int dmaengine_pcm_set_runtime_hwparams(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform);
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struct device *dma_dev = dmaengine_dma_dev(pcm, substream);
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struct dma_chan *chan = pcm->chan[substream->stream];
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struct snd_dmaengine_dai_dma_data *dma_data;
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struct dma_slave_caps dma_caps;
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struct snd_pcm_hardware hw;
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int ret;
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if (pcm->config->pcm_hardware)
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return snd_soc_set_runtime_hwparams(substream,
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pcm->config->pcm_hardware);
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dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
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memset(&hw, 0, sizeof(hw));
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hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_INTERLEAVED;
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hw.periods_min = 2;
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hw.periods_max = UINT_MAX;
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hw.period_bytes_min = 256;
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hw.period_bytes_max = dma_get_max_seg_size(dma_dev);
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hw.buffer_bytes_max = SIZE_MAX;
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hw.fifo_size = dma_data->fifo_size;
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ret = dma_get_slave_caps(chan, &dma_caps);
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if (ret == 0) {
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if (dma_caps.cmd_pause)
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hw.info |= SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME;
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}
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return snd_soc_set_runtime_hwparams(substream, &hw);
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}
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static int dmaengine_pcm_open(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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@ -99,23 +144,13 @@ static int dmaengine_pcm_open(struct snd_pcm_substream *substream)
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struct dma_chan *chan = pcm->chan[substream->stream];
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int ret;
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ret = snd_soc_set_runtime_hwparams(substream,
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pcm->config->pcm_hardware);
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ret = dmaengine_pcm_set_runtime_hwparams(substream);
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if (ret)
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return ret;
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return snd_dmaengine_pcm_open(substream, chan);
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}
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static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm,
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struct snd_pcm_substream *substream)
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{
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if (!pcm->chan[substream->stream])
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return NULL;
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return pcm->chan[substream->stream]->device->dev;
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}
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static void dmaengine_pcm_free(struct snd_pcm *pcm)
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{
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snd_pcm_lib_preallocate_free_for_all(pcm);
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