sh: sh2a: Improve cache flush/invalidate functions
The cache functions lock out interrupts for long periods; this patch reduces the impact when operating on large address ranges. In such cases it will: - Invalidate the entire cache rather than individual addresses. - Do nothing when flushing the operand cache in write-through mode. - When flushing the operand cache in write-back mdoe, index the search for matching addresses on the cache entires instead of the addresses to flush Note: sh2a__flush_purge_region was only invalidating the operand cache, this adds flush. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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e343a895a9
Коммит
c1537b4863
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@ -15,35 +15,78 @@
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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/*
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* The maximum number of pages we support up to when doing ranged dcache
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* flushing. Anything exceeding this will simply flush the dcache in its
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* entirety.
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*/
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#define MAX_OCACHE_PAGES 32
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#define MAX_ICACHE_PAGES 32
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static void sh2a_flush_oc_line(unsigned long v, int way)
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{
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unsigned long addr = (v & 0x000007f0) | (way << 11);
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unsigned long data;
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data = __raw_readl(CACHE_OC_ADDRESS_ARRAY | addr);
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if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
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data &= ~SH_CACHE_UPDATED;
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__raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr);
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}
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}
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static void sh2a_invalidate_line(unsigned long cache_addr, unsigned long v)
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{
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/* Set associative bit to hit all ways */
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unsigned long addr = (v & 0x000007f0) | SH_CACHE_ASSOC;
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__raw_writel((addr & CACHE_PHYSADDR_MASK), cache_addr | addr);
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}
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/*
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* Write back the dirty D-caches, but not invalidate them.
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*/
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static void sh2a__flush_wback_region(void *start, int size)
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{
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#ifdef CONFIG_CACHE_WRITEBACK
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unsigned long v;
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unsigned long begin, end;
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unsigned long flags;
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int nr_ways;
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begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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nr_ways = current_cpu_data.dcache.ways;
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local_irq_save(flags);
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jump_to_uncached();
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0);
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/* If there are too many pages then flush the entire cache */
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if (((end - begin) >> PAGE_SHIFT) >= MAX_OCACHE_PAGES) {
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begin = CACHE_OC_ADDRESS_ARRAY;
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end = begin + (nr_ways * current_cpu_data.dcache.way_size);
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for (v = begin; v < end; v += L1_CACHE_BYTES) {
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unsigned long data = __raw_readl(v);
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if (data & SH_CACHE_UPDATED)
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__raw_writel(data & ~SH_CACHE_UPDATED, v);
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}
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} else {
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int way;
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for (way = 0; way < 4; way++) {
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unsigned long data = __raw_readl(addr | (way << 11));
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if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
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data &= ~SH_CACHE_UPDATED;
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__raw_writel(data, addr | (way << 11));
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}
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for (way = 0; way < nr_ways; way++) {
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for (v = begin; v < end; v += L1_CACHE_BYTES)
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sh2a_flush_oc_line(v, way);
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}
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}
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back_to_cached();
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local_irq_restore(flags);
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#endif
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}
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/*
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* Write back the dirty D-caches and invalidate them.
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*/
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static void sh2a__flush_purge_region(void *start, int size)
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{
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unsigned long v;
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@ -58,13 +101,22 @@ static void sh2a__flush_purge_region(void *start, int size)
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jump_to_uncached();
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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__raw_writel((v & CACHE_PHYSADDR_MASK),
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CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
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#ifdef CONFIG_CACHE_WRITEBACK
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int way;
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int nr_ways = current_cpu_data.dcache.ways;
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for (way = 0; way < nr_ways; way++)
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sh2a_flush_oc_line(v, way);
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#endif
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sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v);
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}
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back_to_cached();
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local_irq_restore(flags);
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}
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/*
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* Invalidate the D-caches, but no write back please
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*/
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static void sh2a__flush_invalidate_region(void *start, int size)
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{
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unsigned long v;
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@ -74,29 +126,25 @@ static void sh2a__flush_invalidate_region(void *start, int size)
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begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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local_irq_save(flags);
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jump_to_uncached();
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#ifdef CONFIG_CACHE_WRITEBACK
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__raw_writel(__raw_readl(CCR) | CCR_OCACHE_INVALIDATE, CCR);
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/* I-cache invalidate */
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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__raw_writel((v & CACHE_PHYSADDR_MASK),
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CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
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/* If there are too many pages then just blow the cache */
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if (((end - begin) >> PAGE_SHIFT) >= MAX_OCACHE_PAGES) {
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__raw_writel(__raw_readl(CCR) | CCR_OCACHE_INVALIDATE, CCR);
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} else {
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for (v = begin; v < end; v += L1_CACHE_BYTES)
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sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v);
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}
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#else
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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__raw_writel((v & CACHE_PHYSADDR_MASK),
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CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
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__raw_writel((v & CACHE_PHYSADDR_MASK),
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CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
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}
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#endif
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back_to_cached();
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local_irq_restore(flags);
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}
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/* WBack O-Cache and flush I-Cache */
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/*
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* Write back the range of D-cache, and purge the I-cache.
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*/
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static void sh2a_flush_icache_range(void *args)
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{
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struct flusher_data *data = args;
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@ -107,23 +155,20 @@ static void sh2a_flush_icache_range(void *args)
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start = data->addr1 & ~(L1_CACHE_BYTES-1);
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end = (data->addr2 + L1_CACHE_BYTES-1) & ~(L1_CACHE_BYTES-1);
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#ifdef CONFIG_CACHE_WRITEBACK
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sh2a__flush_wback_region((void *)start, end-start);
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#endif
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local_irq_save(flags);
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jump_to_uncached();
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for (v = start; v < end; v+=L1_CACHE_BYTES) {
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unsigned long addr = (v & 0x000007f0);
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int way;
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/* O-Cache writeback */
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for (way = 0; way < 4; way++) {
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unsigned long data = __raw_readl(CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
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if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
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data &= ~SH_CACHE_UPDATED;
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__raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
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}
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}
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/* I-Cache invalidate */
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__raw_writel(addr,
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CACHE_IC_ADDRESS_ARRAY | addr | 0x00000008);
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/* I-Cache invalidate */
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/* If there are too many pages then just blow the cache */
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if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) {
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__raw_writel(__raw_readl(CCR) | CCR_ICACHE_INVALIDATE, CCR);
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} else {
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for (v = start; v < end; v += L1_CACHE_BYTES)
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sh2a_invalidate_line(CACHE_IC_ADDRESS_ARRAY, v);
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}
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back_to_cached();
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