ARM: riscpc: use GENERIC_IRQ_MULTI_HANDLER
This is one of the last platforms using the old entry path. While this code path is spread over a few files, it is fairly straightforward to convert it into an equivalent C version, leaving the existing algorithm and all the priority handling the same. Unlike most irqchip drivers, this means reading the status register(s) in a loop and always handling the highest-priority irq first. The IOMD_IRQREQC and IOMD_IRQREQD registers are not actaully used here, but I left the code in place for the time being, to keep the conversion as direct as possible. It could be removed in a cleanup on top. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [ardb: drop obsolete IOMD_IRQREQC/IOMD_IRQREQD handling] Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Marc Zyngier <maz@kernel.org> Tested-by: Vladimir Murzin <vladimir.murzin@arm.com> # ARMv7M
This commit is contained in:
Arnd Bergmann
Ard Biesheuvel
Родитель
d60ff2e766
Коммит
c1fe8d054c
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@ -444,6 +444,7 @@ config ARCH_RPC
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select ARM_HAS_SG_CHAIN
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select CPU_SA110
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select FIQ
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select GENERIC_IRQ_MULTI_HANDLER
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select HAVE_PATA_PLATFORM
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select ISA_DMA_API
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select LEGACY_TIMER_TICK
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@ -1,84 +0,0 @@
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/*
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* arch/arm/include/asm/hardware/entry-macro-iomd.S
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*
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* Low-level IRQ helper macros for IOC/IOMD based platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/* IOC / IOMD based hardware */
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#include <asm/hardware/iomd.h>
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first
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ldr \tmp, =irq_prio_h
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teq \irqstat, #0
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#ifdef IOMD_BASE
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ldrbeq \irqstat, [\base, #IOMD_DMAREQ] @ get dma
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addeq \tmp, \tmp, #256 @ irq_prio_h table size
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teqeq \irqstat, #0
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bne 2406f
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#endif
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ldrbeq \irqstat, [\base, #IOMD_IRQREQA] @ get low priority
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addeq \tmp, \tmp, #256 @ irq_prio_d table size
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teqeq \irqstat, #0
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2406: ldrbne \irqnr, [\tmp, \irqstat] @ get IRQ number
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.endm
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/*
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* Interrupt table (incorporates priority). Please note that we
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* rely on the order of these tables (see above code).
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*/
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.align 5
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irq_prio_h: .byte 0, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 12, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 14,14,14,14,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 14,14,14,14,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
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.byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
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#ifdef IOMD_BASE
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irq_prio_d: .byte 0,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 20,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 23,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 23,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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.byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
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#endif
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irq_prio_l: .byte 0, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3
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.byte 4, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3
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.byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
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.byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
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.byte 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3
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.byte 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3
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.byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
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.byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
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.byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
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.byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
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.byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
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.byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
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.byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
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.byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
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.byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
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.byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
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@ -2,10 +2,11 @@
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <mach/hardware.h>
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#include <mach/entry-macro.S>
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.equ ioc_base_high, IOC_BASE & 0xff000000
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.equ ioc_base_low, IOC_BASE & 0x00ff0000
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.text
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.global rpc_default_fiq_end
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ENTRY(rpc_default_fiq_start)
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mov r12, #ioc_base_high
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@ -1,13 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#include <mach/hardware.h>
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#include <asm/hardware/entry-macro-iomd.S>
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.equ ioc_base_high, IOC_BASE & 0xff000000
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.equ ioc_base_low, IOC_BASE & 0x00ff0000
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.macro get_irqnr_preamble, base, tmp
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mov \base, #ioc_base_high @ point at IOC
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.if ioc_base_low
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orr \base, \base, #ioc_base_low
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.endif
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.endm
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@ -14,6 +14,99 @@
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#define CLR 0x04
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#define MASK 0x08
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static const u8 irq_prio_h[256] = {
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0, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10,
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12, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10,
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13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10,
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13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10,
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14,14,14,14,10,10,10,10,11,11,11,11,10,10,10,10,
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14,14,14,14,10,10,10,10,11,11,11,11,10,10,10,10,
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13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10,
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13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10,
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15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10,
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15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10,
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13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10,
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13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10,
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15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10,
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15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10,
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13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10,
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13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10,
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};
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static const u8 irq_prio_d[256] = {
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0,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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20,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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23,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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23,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
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};
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static const u8 irq_prio_l[256] = {
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0, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
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4, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3,
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6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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};
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static int iomd_get_irq_nr(void)
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{
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int irq;
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u8 reg;
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/* get highest priority first */
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reg = readb(IOC_BASE + IOMD_IRQREQB);
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irq = irq_prio_h[reg];
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if (irq)
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return irq;
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/* get DMA */
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reg = readb(IOC_BASE + IOMD_DMAREQ);
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irq = irq_prio_d[reg];
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if (irq)
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return irq;
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/* get low priority */
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reg = readb(IOC_BASE + IOMD_IRQREQA);
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irq = irq_prio_l[reg];
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if (irq)
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return irq;
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return 0;
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}
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static void iomd_handle_irq(struct pt_regs *regs)
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{
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int irq;
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do {
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irq = iomd_get_irq_nr();
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if (irq)
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generic_handle_irq(irq);
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} while (irq);
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}
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static void __iomem *iomd_get_base(struct irq_data *d)
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{
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void *cd = irq_data_get_irq_chip_data(d);
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@ -82,6 +175,8 @@ void __init rpc_init_irq(void)
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set_fiq_handler(&rpc_default_fiq_start,
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&rpc_default_fiq_end - &rpc_default_fiq_start);
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set_handle_irq(iomd_handle_irq);
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for (irq = 0; irq < NR_IRQS; irq++) {
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clr = IRQ_NOREQUEST;
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set = 0;
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