MIPSsim: General cleanup
General cleanups mostly as suggested by checkpatch plus getting rid of homebrew version of offsetof(). Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Родитель
6629b97d57
Коммит
c2af68e5f5
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@ -7,12 +7,12 @@
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#define DEBUG
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/platform_device.h>
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#include <asm/io.h>
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#include <asm/mips-boards/simint.h>
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#include "mipsnet.h" /* actual device IO mapping */
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@ -33,9 +33,8 @@ static int ioiocpy_frommipsnet(struct net_device *dev, unsigned char *kdata,
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if (available_len < len)
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return -EFAULT;
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for (; len > 0; len--, kdata++) {
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for (; len > 0; len--, kdata++)
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*kdata = inb(mipsnet_reg_address(dev, rxDataBuffer));
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}
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return inl(mipsnet_reg_address(dev, rxDataCount));
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}
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@ -47,16 +46,15 @@ static inline ssize_t mipsnet_put_todevice(struct net_device *dev,
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char *buf_ptr = skb->data;
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pr_debug("%s: %s(): telling MIPSNET txDataCount(%d)\n",
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dev->name, __FUNCTION__, skb->len);
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dev->name, __FUNCTION__, skb->len);
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outl(skb->len, mipsnet_reg_address(dev, txDataCount));
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pr_debug("%s: %s(): sending data to MIPSNET txDataBuffer(%d)\n",
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dev->name, __FUNCTION__, skb->len);
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dev->name, __FUNCTION__, skb->len);
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for (; count_to_go; buf_ptr++, count_to_go--) {
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for (; count_to_go; buf_ptr++, count_to_go--)
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outb(*buf_ptr, mipsnet_reg_address(dev, txDataBuffer));
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}
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dev->stats.tx_packets++;
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dev->stats.tx_bytes += skb->len;
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@ -67,7 +65,7 @@ static inline ssize_t mipsnet_put_todevice(struct net_device *dev,
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static int mipsnet_xmit(struct sk_buff *skb, struct net_device *dev)
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{
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pr_debug("%s:%s(): transmitting %d bytes\n",
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dev->name, __FUNCTION__, skb->len);
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dev->name, __FUNCTION__, skb->len);
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/* Only one packet at a time. Once TXDONE interrupt is serviced, the
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* queue will be restarted.
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@ -83,7 +81,8 @@ static inline ssize_t mipsnet_get_fromdev(struct net_device *dev, size_t count)
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struct sk_buff *skb;
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size_t len = count;
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if (!(skb = alloc_skb(len + 2, GFP_KERNEL))) {
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skb = alloc_skb(len + 2, GFP_KERNEL);
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if (!skb) {
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dev->stats.rx_dropped++;
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return -ENOMEM;
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}
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@ -96,7 +95,7 @@ static inline ssize_t mipsnet_get_fromdev(struct net_device *dev, size_t count)
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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pr_debug("%s:%s(): pushing RXed data to kernel\n",
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dev->name, __FUNCTION__);
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dev->name, __FUNCTION__);
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netif_rx(skb);
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dev->stats.rx_packets++;
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@ -114,42 +113,44 @@ static irqreturn_t mipsnet_interrupt(int irq, void *dev_id)
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if (irq == dev->irq) {
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pr_debug("%s:%s(): irq %d for device\n",
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dev->name, __FUNCTION__, irq);
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dev->name, __FUNCTION__, irq);
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retval = IRQ_HANDLED;
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interruptFlags =
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inl(mipsnet_reg_address(dev, interruptControl));
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pr_debug("%s:%s(): intCtl=0x%016llx\n", dev->name,
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__FUNCTION__, interruptFlags);
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__FUNCTION__, interruptFlags);
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if (interruptFlags & MIPSNET_INTCTL_TXDONE) {
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pr_debug("%s:%s(): got TXDone\n",
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dev->name, __FUNCTION__);
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dev->name, __FUNCTION__);
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outl(MIPSNET_INTCTL_TXDONE,
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mipsnet_reg_address(dev, interruptControl));
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// only one packet at a time, we are done.
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/* only one packet at a time, we are done. */
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netif_wake_queue(dev);
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} else if (interruptFlags & MIPSNET_INTCTL_RXDONE) {
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pr_debug("%s:%s(): got RX data\n",
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dev->name, __FUNCTION__);
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dev->name, __FUNCTION__);
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mipsnet_get_fromdev(dev,
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inl(mipsnet_reg_address(dev, rxDataCount)));
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inl(mipsnet_reg_address(dev, rxDataCount)));
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pr_debug("%s:%s(): clearing RX int\n",
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dev->name, __FUNCTION__);
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dev->name, __FUNCTION__);
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outl(MIPSNET_INTCTL_RXDONE,
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mipsnet_reg_address(dev, interruptControl));
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} else if (interruptFlags & MIPSNET_INTCTL_TESTBIT) {
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pr_debug("%s:%s(): got test interrupt\n",
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dev->name, __FUNCTION__);
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// TESTBIT is cleared on read.
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// And takes effect after a write with 0
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dev->name, __FUNCTION__);
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/*
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* TESTBIT is cleared on read.
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* And takes effect after a write with 0
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*/
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outl(0, mipsnet_reg_address(dev, interruptControl));
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} else {
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pr_debug("%s:%s(): no valid fags 0x%016llx\n",
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dev->name, __FUNCTION__, interruptFlags);
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// Maybe shared IRQ, just ignore, no clearing.
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dev->name, __FUNCTION__, interruptFlags);
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/* Maybe shared IRQ, just ignore, no clearing. */
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retval = IRQ_NONE;
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}
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@ -159,7 +160,7 @@ static irqreturn_t mipsnet_interrupt(int irq, void *dev_id)
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retval = IRQ_NONE;
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}
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return retval;
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} //mipsnet_interrupt()
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}
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static int mipsnet_open(struct net_device *dev)
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{
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@ -171,18 +172,18 @@ static int mipsnet_open(struct net_device *dev)
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if (err) {
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pr_debug("%s: %s(): can't get irq %d\n",
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dev->name, __FUNCTION__, dev->irq);
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dev->name, __FUNCTION__, dev->irq);
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release_region(dev->base_addr, MIPSNET_IO_EXTENT);
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return err;
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}
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pr_debug("%s: %s(): got IO region at 0x%04lx and irq %d for dev.\n",
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dev->name, __FUNCTION__, dev->base_addr, dev->irq);
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dev->name, __FUNCTION__, dev->base_addr, dev->irq);
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netif_start_queue(dev);
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// test interrupt handler
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/* test interrupt handler */
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outl(MIPSNET_INTCTL_TESTBIT,
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mipsnet_reg_address(dev, interruptControl));
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@ -199,8 +200,6 @@ static int mipsnet_close(struct net_device *dev)
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static void mipsnet_set_mclist(struct net_device *dev)
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{
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// we don't do anything
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return;
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}
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static int __init mipsnet_probe(struct device *dev)
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@ -226,13 +225,13 @@ static int __init mipsnet_probe(struct device *dev)
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*/
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netdev->base_addr = 0x4200;
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netdev->irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB0 +
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inl(mipsnet_reg_address(netdev, interruptInfo));
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inl(mipsnet_reg_address(netdev, interruptInfo));
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// Get the io region now, get irq on open()
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/* Get the io region now, get irq on open() */
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if (!request_region(netdev->base_addr, MIPSNET_IO_EXTENT, "mipsnet")) {
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pr_debug("%s: %s(): IO region {start: 0x%04lux, len: %d} "
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"for dev is not availble.\n", netdev->name,
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__FUNCTION__, netdev->base_addr, MIPSNET_IO_EXTENT);
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"for dev is not availble.\n", netdev->name,
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__FUNCTION__, netdev->base_addr, MIPSNET_IO_EXTENT);
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err = -EBUSY;
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goto out_free_netdev;
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}
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@ -9,32 +9,34 @@
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/*
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* Id of this Net device, as seen by the core.
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*/
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#define MIPS_NET_DEV_ID ((uint64_t) \
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((uint64_t)'M'<< 0)| \
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((uint64_t)'I'<< 8)| \
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((uint64_t)'P'<<16)| \
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((uint64_t)'S'<<24)| \
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((uint64_t)'N'<<32)| \
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((uint64_t)'E'<<40)| \
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((uint64_t)'T'<<48)| \
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((uint64_t)'0'<<56))
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#define MIPS_NET_DEV_ID ((uint64_t) \
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((uint64_t) 'M' << 0)| \
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((uint64_t) 'I' << 8)| \
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((uint64_t) 'P' << 16)| \
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((uint64_t) 'S' << 24)| \
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((uint64_t) 'N' << 32)| \
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((uint64_t) 'E' << 40)| \
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((uint64_t) 'T' << 48)| \
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((uint64_t) '0' << 56))
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/*
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* Net status/control block as seen by sw in the core.
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* (Why not use bit fields? can't be bothered with cross-platform struct
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* packing.)
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*/
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typedef struct _net_control_block {
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/// dev info for probing
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/// reads as MIPSNET%d where %d is some form of version
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uint64_t devId; /*0x00 */
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struct net_control_block {
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/*
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* dev info for probing
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* reads as MIPSNET%d where %d is some form of version
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*/
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uint64_t devId; /* 0x00 */
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/*
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* read only busy flag.
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* Set and cleared by the Net Device to indicate that an rx or a tx
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* is in progress.
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*/
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uint32_t busy; /*0x08 */
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uint32_t busy; /* 0x08 */
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/*
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* Set by the Net Device.
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@ -43,16 +45,16 @@ typedef struct _net_control_block {
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* rxDataBuffer. The value will decrease till 0 until all the data
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* from rxDataBuffer has been read.
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*/
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uint32_t rxDataCount; /*0x0c */
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uint32_t rxDataCount; /* 0x0c */
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#define MIPSNET_MAX_RXTX_DATACOUNT (1<<16)
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/*
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* Settable from the MIPS core, cleared by the Net Device.
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* The core should set the number of bytes it wants to send,
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* then it should write those bytes of data to txDataBuffer.
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* The device will clear txDataCount has been processed (not necessarily sent).
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* Settable from the MIPS core, cleared by the Net Device. The core
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* should set the number of bytes it wants to send, then it should
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* write those bytes of data to txDataBuffer. The device will clear
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* txDataCount has been processed (not necessarily sent).
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*/
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uint32_t txDataCount; /*0x10 */
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uint32_t txDataCount; /* 0x10 */
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/*
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* Interrupt control
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@ -69,39 +71,42 @@ typedef struct _net_control_block {
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* To clear the test interrupt, write 0 to this register.
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*/
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uint32_t interruptControl; /*0x14 */
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#define MIPSNET_INTCTL_TXDONE ((uint32_t)(1<< 0))
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#define MIPSNET_INTCTL_RXDONE ((uint32_t)(1<< 1))
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#define MIPSNET_INTCTL_TESTBIT ((uint32_t)(1<<31))
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#define MIPSNET_INTCTL_ALLSOURCES (MIPSNET_INTCTL_TXDONE|MIPSNET_INTCTL_RXDONE|MIPSNET_INTCTL_TESTBIT)
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#define MIPSNET_INTCTL_TXDONE ((uint32_t)(1 << 0))
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#define MIPSNET_INTCTL_RXDONE ((uint32_t)(1 << 1))
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#define MIPSNET_INTCTL_TESTBIT ((uint32_t)(1 << 31))
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#define MIPSNET_INTCTL_ALLSOURCES (MIPSNET_INTCTL_TXDONE | \
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MIPSNET_INTCTL_RXDONE | \
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MIPSNET_INTCTL_TESTBIT)
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/*
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* Readonly core-specific interrupt info for the device to signal the core.
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* The meaning of the contents of this field might change.
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* Readonly core-specific interrupt info for the device to signal the
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* core. The meaning of the contents of this field might change.
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*
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* TODO: the whole memIntf interrupt scheme is messy: the device should
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* have no control what so ever of what VPE/register set is being
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* used. The MemIntf should only expose interrupt lines, and
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* something in the config should be responsible for the
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* line<->core/vpe bindings.
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*/
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/*###\todo: the whole memIntf interrupt scheme is messy: the device should have
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* no control what so ever of what VPE/register set is being used.
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* The MemIntf should only expose interrupt lines, and something in the
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* config should be responsible for the line<->core/vpe bindings.
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*/
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uint32_t interruptInfo; /*0x18 */
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uint32_t interruptInfo; /* 0x18 */
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/*
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* This is where the received data is read out.
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* There is more data to read until rxDataReady is 0.
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* Only 1 byte at this regs offset is used.
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*/
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uint32_t rxDataBuffer; /*0x1c */
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uint32_t rxDataBuffer; /* 0x1c */
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/*
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* This is where the data to transmit is written.
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* Data should be written for the amount specified in the txDataCount register.
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* Only 1 byte at this regs offset is used.
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* This is where the data to transmit is written. Data should be
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* written for the amount specified in the txDataCount register. Only
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* 1 byte at this regs offset is used.
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*/
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uint32_t txDataBuffer; /*0x20 */
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} MIPS_T_NetControl;
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uint32_t txDataBuffer; /* 0x20 */
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};
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#define MIPSNET_IO_EXTENT 0x40 /* being generous */
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#define field_offset(field) ((int)&((MIPS_T_NetControl*)(0))->field)
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#define field_offset(field) (offsetof(struct net_control_block, field))
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#endif /* __MIPSNET_H */
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