MIPS: Decrease size of au1xxx_dbdma_pm_regs[][]
There are 16 individual channels (NUM_DBDMA_CHANS) to save/restore plus the global ddma block config (the +1). The last register in a channel can be skipped since it's read-only (at offset 0x18). Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Cc: Manuel Lauss <manuel.lauss@googlemail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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c2e3214907
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@ -175,7 +175,7 @@ static dbdev_tab_t dbdev_tab[] = {
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#define DBDEV_TAB_SIZE ARRAY_SIZE(dbdev_tab)
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#ifdef CONFIG_PM
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static u32 au1xxx_dbdma_pm_regs[NUM_DBDMA_CHANS + 1][8];
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static u32 au1xxx_dbdma_pm_regs[NUM_DBDMA_CHANS + 1][6];
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#endif
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@ -993,14 +993,13 @@ void au1xxx_dbdma_suspend(void)
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au1xxx_dbdma_pm_regs[0][3] = au_readl(addr + 0x0c);
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/* save channel configurations */
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for (i = 1, addr = DDMA_CHANNEL_BASE; i < NUM_DBDMA_CHANS; i++) {
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for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) {
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au1xxx_dbdma_pm_regs[i][0] = au_readl(addr + 0x00);
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au1xxx_dbdma_pm_regs[i][1] = au_readl(addr + 0x04);
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au1xxx_dbdma_pm_regs[i][2] = au_readl(addr + 0x08);
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au1xxx_dbdma_pm_regs[i][3] = au_readl(addr + 0x0c);
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au1xxx_dbdma_pm_regs[i][4] = au_readl(addr + 0x10);
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au1xxx_dbdma_pm_regs[i][5] = au_readl(addr + 0x14);
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au1xxx_dbdma_pm_regs[i][6] = au_readl(addr + 0x18);
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/* halt channel */
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au_writel(au1xxx_dbdma_pm_regs[i][0] & ~1, addr + 0x00);
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@ -1027,14 +1026,13 @@ void au1xxx_dbdma_resume(void)
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au_writel(au1xxx_dbdma_pm_regs[0][3], addr + 0x0c);
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/* restore channel configurations */
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for (i = 1, addr = DDMA_CHANNEL_BASE; i < NUM_DBDMA_CHANS; i++) {
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for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) {
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au_writel(au1xxx_dbdma_pm_regs[i][0], addr + 0x00);
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au_writel(au1xxx_dbdma_pm_regs[i][1], addr + 0x04);
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au_writel(au1xxx_dbdma_pm_regs[i][2], addr + 0x08);
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au_writel(au1xxx_dbdma_pm_regs[i][3], addr + 0x0c);
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au_writel(au1xxx_dbdma_pm_regs[i][4], addr + 0x10);
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au_writel(au1xxx_dbdma_pm_regs[i][5], addr + 0x14);
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au_writel(au1xxx_dbdma_pm_regs[i][6], addr + 0x18);
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au_sync();
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addr += 0x100; /* next channel base */
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}
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