net: dsa: microchip: break KSZ9477 DSA driver into two files
Break KSZ9477 DSA driver into two files in preparation to add more KSZ switch drivers. Add common functions in ksz_common.h so that other KSZ switch drivers can access code in ksz_common.c. Add ksz_spi.h for common functions used by KSZ switch SPI drivers. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Reviewed-by: Woojung Huh <Woojung.Huh@microchip.com> Reviewed-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Tristram Ha
David S. Miller
Родитель
74a7194f15
Коммит
c2e866911e
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@ -1,7 +1,11 @@
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config NET_DSA_MICROCHIP_KSZ_COMMON
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tristate
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menuconfig NET_DSA_MICROCHIP_KSZ9477
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tristate "Microchip KSZ9477 series switch support"
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depends on NET_DSA
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select NET_DSA_TAG_KSZ
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select NET_DSA_MICROCHIP_KSZ_COMMON
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help
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This driver adds support for Microchip KSZ9477 switch chips.
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@ -1,2 +1,3 @@
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obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ9477) += ksz_common.o
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obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON) += ksz_common.o
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obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ9477) += ksz9477.o
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obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ9477_SPI) += ksz9477_spi.o
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Microchip KSZ series register access through SPI
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* Microchip KSZ9477 series register access through SPI
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*
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* Copyright (C) 2017-2018 Microchip Technology Inc.
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*/
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@ -13,6 +13,7 @@
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#include <linux/spi/spi.h>
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#include "ksz_priv.h"
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#include "ksz_spi.h"
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/* SPI frame opcodes */
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#define KS_SPIOP_RD 3
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@ -22,8 +23,11 @@
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#define SPI_ADDR_MASK (BIT(SPI_ADDR_SHIFT) - 1)
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#define SPI_TURNAROUND_SHIFT 5
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static int ksz_spi_read_reg(struct spi_device *spi, u32 reg, u8 *val,
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unsigned int len)
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/* Enough to read all switch port registers. */
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#define SPI_TX_BUF_LEN 0x100
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static int ksz9477_spi_read_reg(struct spi_device *spi, u32 reg, u8 *val,
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unsigned int len)
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{
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u32 txbuf;
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int ret;
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@ -37,27 +41,36 @@ static int ksz_spi_read_reg(struct spi_device *spi, u32 reg, u8 *val,
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return ret;
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}
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static int ksz9477_spi_write_reg(struct spi_device *spi, u32 reg, u8 *val,
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unsigned int len)
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{
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u32 *txbuf = (u32 *)val;
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*txbuf = reg & SPI_ADDR_MASK;
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*txbuf |= (KS_SPIOP_WR << SPI_ADDR_SHIFT);
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*txbuf <<= SPI_TURNAROUND_SHIFT;
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*txbuf = cpu_to_be32(*txbuf);
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return spi_write(spi, txbuf, 4 + len);
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}
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static int ksz_spi_read(struct ksz_device *dev, u32 reg, u8 *data,
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unsigned int len)
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{
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struct spi_device *spi = dev->priv;
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return ksz_spi_read_reg(spi, reg, data, len);
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return ksz9477_spi_read_reg(spi, reg, data, len);
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}
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static int ksz_spi_read8(struct ksz_device *dev, u32 reg, u8 *val)
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static int ksz_spi_write(struct ksz_device *dev, u32 reg, void *data,
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unsigned int len)
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{
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return ksz_spi_read(dev, reg, val, 1);
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}
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struct spi_device *spi = dev->priv;
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static int ksz_spi_read16(struct ksz_device *dev, u32 reg, u16 *val)
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{
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int ret = ksz_spi_read(dev, reg, (u8 *)val, 2);
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if (!ret)
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*val = be16_to_cpu(*val);
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return ret;
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if (len > SPI_TX_BUF_LEN)
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len = SPI_TX_BUF_LEN;
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memcpy(&dev->txbuf[4], data, len);
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return ksz9477_spi_write_reg(spi, reg, dev->txbuf, len);
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}
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static int ksz_spi_read24(struct ksz_device *dev, u32 reg, u32 *val)
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@ -75,72 +88,15 @@ static int ksz_spi_read24(struct ksz_device *dev, u32 reg, u32 *val)
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return ret;
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}
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static int ksz_spi_read32(struct ksz_device *dev, u32 reg, u32 *val)
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{
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int ret = ksz_spi_read(dev, reg, (u8 *)val, 4);
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if (!ret)
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*val = be32_to_cpu(*val);
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return ret;
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}
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static int ksz_spi_write_reg(struct spi_device *spi, u32 reg, u8 *val,
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unsigned int len)
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{
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u32 txbuf;
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u8 data[12];
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int i;
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txbuf = reg & SPI_ADDR_MASK;
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txbuf |= (KS_SPIOP_WR << SPI_ADDR_SHIFT);
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txbuf <<= SPI_TURNAROUND_SHIFT;
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txbuf = cpu_to_be32(txbuf);
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data[0] = txbuf & 0xFF;
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data[1] = (txbuf & 0xFF00) >> 8;
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data[2] = (txbuf & 0xFF0000) >> 16;
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data[3] = (txbuf & 0xFF000000) >> 24;
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for (i = 0; i < len; i++)
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data[i + 4] = val[i];
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return spi_write(spi, &data, 4 + len);
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}
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static int ksz_spi_write8(struct ksz_device *dev, u32 reg, u8 value)
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{
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struct spi_device *spi = dev->priv;
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return ksz_spi_write_reg(spi, reg, &value, 1);
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}
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static int ksz_spi_write16(struct ksz_device *dev, u32 reg, u16 value)
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{
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struct spi_device *spi = dev->priv;
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value = cpu_to_be16(value);
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return ksz_spi_write_reg(spi, reg, (u8 *)&value, 2);
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}
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static int ksz_spi_write24(struct ksz_device *dev, u32 reg, u32 value)
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{
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struct spi_device *spi = dev->priv;
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/* make it to big endian 24bit from MSB */
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value <<= 8;
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value = cpu_to_be32(value);
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return ksz_spi_write_reg(spi, reg, (u8 *)&value, 3);
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return ksz_spi_write(dev, reg, &value, 3);
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}
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static int ksz_spi_write32(struct ksz_device *dev, u32 reg, u32 value)
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{
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struct spi_device *spi = dev->priv;
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value = cpu_to_be32(value);
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return ksz_spi_write_reg(spi, reg, (u8 *)&value, 4);
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}
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static const struct ksz_io_ops ksz_spi_ops = {
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static const struct ksz_io_ops ksz9477_spi_ops = {
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.read8 = ksz_spi_read8,
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.read16 = ksz_spi_read16,
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.read24 = ksz_spi_read24,
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@ -149,21 +105,27 @@ static const struct ksz_io_ops ksz_spi_ops = {
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.write16 = ksz_spi_write16,
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.write24 = ksz_spi_write24,
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.write32 = ksz_spi_write32,
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.get = ksz_spi_get,
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.set = ksz_spi_set,
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};
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static int ksz_spi_probe(struct spi_device *spi)
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static int ksz9477_spi_probe(struct spi_device *spi)
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{
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struct ksz_device *dev;
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int ret;
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dev = ksz_switch_alloc(&spi->dev, &ksz_spi_ops, spi);
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dev = ksz_switch_alloc(&spi->dev, &ksz9477_spi_ops, spi);
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if (!dev)
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return -ENOMEM;
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if (spi->dev.platform_data)
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dev->pdata = spi->dev.platform_data;
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ret = ksz_switch_register(dev);
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dev->txbuf = devm_kzalloc(dev->dev, 4 + SPI_TX_BUF_LEN, GFP_KERNEL);
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ret = ksz9477_switch_register(dev);
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/* Main DSA driver may not be started yet. */
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if (ret)
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return ret;
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@ -172,7 +134,7 @@ static int ksz_spi_probe(struct spi_device *spi)
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return 0;
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}
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static int ksz_spi_remove(struct spi_device *spi)
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static int ksz9477_spi_remove(struct spi_device *spi)
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{
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struct ksz_device *dev = spi_get_drvdata(spi);
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@ -182,25 +144,34 @@ static int ksz_spi_remove(struct spi_device *spi)
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return 0;
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}
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static const struct of_device_id ksz_dt_ids[] = {
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static void ksz9477_spi_shutdown(struct spi_device *spi)
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{
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struct ksz_device *dev = spi_get_drvdata(spi);
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if (dev && dev->dev_ops->shutdown)
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dev->dev_ops->shutdown(dev);
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}
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static const struct of_device_id ksz9477_dt_ids[] = {
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{ .compatible = "microchip,ksz9477" },
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{ .compatible = "microchip,ksz9897" },
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{},
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};
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MODULE_DEVICE_TABLE(of, ksz_dt_ids);
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MODULE_DEVICE_TABLE(of, ksz9477_dt_ids);
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static struct spi_driver ksz_spi_driver = {
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static struct spi_driver ksz9477_spi_driver = {
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.driver = {
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.name = "ksz9477-switch",
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.owner = THIS_MODULE,
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.of_match_table = of_match_ptr(ksz_dt_ids),
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.of_match_table = of_match_ptr(ksz9477_dt_ids),
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},
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.probe = ksz_spi_probe,
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.remove = ksz_spi_remove,
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.probe = ksz9477_spi_probe,
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.remove = ksz9477_spi_remove,
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.shutdown = ksz9477_spi_shutdown,
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};
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module_spi_driver(ksz_spi_driver);
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module_spi_driver(ksz9477_spi_driver);
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MODULE_AUTHOR("Woojung Huh <Woojung.Huh@microchip.com>");
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MODULE_DESCRIPTION("Microchip KSZ Series Switch SPI access Driver");
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MODULE_DESCRIPTION("Microchip KSZ9477 Series Switch SPI access Driver");
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MODULE_LICENSE("GPL");
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@ -0,0 +1,214 @@
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/* SPDX-License-Identifier: GPL-2.0
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* Microchip switch driver common header
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*
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* Copyright (C) 2017-2018 Microchip Technology Inc.
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*/
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#ifndef __KSZ_COMMON_H
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#define __KSZ_COMMON_H
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void ksz_update_port_member(struct ksz_device *dev, int port);
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/* Common DSA access functions */
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int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg);
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int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val);
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int ksz_sset_count(struct dsa_switch *ds, int port, int sset);
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int ksz_port_bridge_join(struct dsa_switch *ds, int port,
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struct net_device *br);
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void ksz_port_bridge_leave(struct dsa_switch *ds, int port,
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struct net_device *br);
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void ksz_port_fast_age(struct dsa_switch *ds, int port);
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int ksz_port_vlan_prepare(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_vlan *vlan);
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int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb,
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void *data);
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int ksz_port_mdb_prepare(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_mdb *mdb);
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void ksz_port_mdb_add(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_mdb *mdb);
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int ksz_port_mdb_del(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_mdb *mdb);
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int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);
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void ksz_disable_port(struct dsa_switch *ds, int port, struct phy_device *phy);
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/* Common register access functions */
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static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
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{
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int ret;
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mutex_lock(&dev->reg_mutex);
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ret = dev->ops->read8(dev, reg, val);
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mutex_unlock(&dev->reg_mutex);
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return ret;
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}
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static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
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{
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int ret;
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mutex_lock(&dev->reg_mutex);
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ret = dev->ops->read16(dev, reg, val);
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mutex_unlock(&dev->reg_mutex);
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return ret;
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}
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static inline int ksz_read24(struct ksz_device *dev, u32 reg, u32 *val)
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{
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int ret;
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mutex_lock(&dev->reg_mutex);
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ret = dev->ops->read24(dev, reg, val);
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mutex_unlock(&dev->reg_mutex);
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return ret;
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}
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static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
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{
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int ret;
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mutex_lock(&dev->reg_mutex);
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ret = dev->ops->read32(dev, reg, val);
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mutex_unlock(&dev->reg_mutex);
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return ret;
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}
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static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
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{
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int ret;
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mutex_lock(&dev->reg_mutex);
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ret = dev->ops->write8(dev, reg, value);
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mutex_unlock(&dev->reg_mutex);
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return ret;
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}
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static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
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{
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int ret;
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mutex_lock(&dev->reg_mutex);
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ret = dev->ops->write16(dev, reg, value);
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mutex_unlock(&dev->reg_mutex);
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return ret;
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}
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static inline int ksz_write24(struct ksz_device *dev, u32 reg, u32 value)
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{
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int ret;
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mutex_lock(&dev->reg_mutex);
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ret = dev->ops->write24(dev, reg, value);
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mutex_unlock(&dev->reg_mutex);
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return ret;
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}
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static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
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{
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int ret;
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mutex_lock(&dev->reg_mutex);
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ret = dev->ops->write32(dev, reg, value);
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mutex_unlock(&dev->reg_mutex);
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return ret;
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}
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static inline int ksz_get(struct ksz_device *dev, u32 reg, void *data,
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size_t len)
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{
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int ret;
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mutex_lock(&dev->reg_mutex);
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ret = dev->ops->get(dev, reg, data, len);
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mutex_unlock(&dev->reg_mutex);
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return ret;
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}
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static inline int ksz_set(struct ksz_device *dev, u32 reg, void *data,
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size_t len)
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{
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int ret;
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mutex_lock(&dev->reg_mutex);
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ret = dev->ops->set(dev, reg, data, len);
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mutex_unlock(&dev->reg_mutex);
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return ret;
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}
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static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
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u8 *data)
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{
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ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
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}
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static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
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u16 *data)
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{
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ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
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}
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static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
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u32 *data)
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{
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ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
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}
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static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
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u8 data)
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{
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ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
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}
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static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
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u16 data)
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{
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ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
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}
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static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
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u32 data)
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{
|
||||
ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
|
||||
}
|
||||
|
||||
static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
|
||||
{
|
||||
u8 data;
|
||||
|
||||
ksz_read8(dev, addr, &data);
|
||||
if (set)
|
||||
data |= bits;
|
||||
else
|
||||
data &= ~bits;
|
||||
ksz_write8(dev, addr, data);
|
||||
}
|
||||
|
||||
static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,
|
||||
bool set)
|
||||
{
|
||||
u32 addr;
|
||||
u8 data;
|
||||
|
||||
addr = dev->dev_ops->get_port_addr(port, offset);
|
||||
ksz_read8(dev, addr, &data);
|
||||
|
||||
if (set)
|
||||
data |= bits;
|
||||
else
|
||||
data &= ~bits;
|
||||
|
||||
ksz_write8(dev, addr, data);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -22,6 +22,27 @@ struct vlan_table {
|
|||
u32 table[3];
|
||||
};
|
||||
|
||||
struct ksz_port_mib {
|
||||
u8 cnt_ptr;
|
||||
u64 *counters;
|
||||
};
|
||||
|
||||
struct ksz_port {
|
||||
u16 member;
|
||||
u16 vid_member;
|
||||
int stp_state;
|
||||
struct phy_device phydev;
|
||||
|
||||
u32 on:1; /* port is not disabled by hardware */
|
||||
u32 phy:1; /* port has a PHY */
|
||||
u32 fiber:1; /* port is fiber */
|
||||
u32 sgmii:1; /* port is SGMII */
|
||||
u32 force:1;
|
||||
u32 link_just_down:1; /* link just goes down */
|
||||
|
||||
struct ksz_port_mib mib;
|
||||
};
|
||||
|
||||
struct ksz_device {
|
||||
struct dsa_switch *ds;
|
||||
struct ksz_platform_data *pdata;
|
||||
|
|
@ -32,6 +53,7 @@ struct ksz_device {
|
|||
struct mutex alu_mutex; /* ALU access */
|
||||
struct mutex vlan_mutex; /* vlan access */
|
||||
const struct ksz_io_ops *ops;
|
||||
const struct ksz_dev_ops *dev_ops;
|
||||
|
||||
struct device *dev;
|
||||
|
||||
|
|
@ -44,11 +66,37 @@ struct ksz_device {
|
|||
int num_statics;
|
||||
int cpu_port; /* port connected to CPU */
|
||||
int cpu_ports; /* port bitmap can be cpu port */
|
||||
int phy_port_cnt;
|
||||
int port_cnt;
|
||||
int reg_mib_cnt;
|
||||
int mib_cnt;
|
||||
int mib_port_cnt;
|
||||
int last_port; /* ports after that not used */
|
||||
phy_interface_t interface;
|
||||
u32 regs_size;
|
||||
|
||||
struct vlan_table *vlan_cache;
|
||||
|
||||
u64 mib_value[TOTAL_SWITCH_COUNTER_NUM];
|
||||
|
||||
u8 *txbuf;
|
||||
|
||||
struct ksz_port *ports;
|
||||
struct timer_list mib_read_timer;
|
||||
struct work_struct mib_read;
|
||||
unsigned long mib_read_interval;
|
||||
u16 br_member;
|
||||
u16 member;
|
||||
u16 live_ports;
|
||||
u16 on_ports; /* ports enabled by DSA */
|
||||
u16 rx_ports;
|
||||
u16 tx_ports;
|
||||
u16 mirror_rx;
|
||||
u16 mirror_tx;
|
||||
u32 features; /* chip specific features */
|
||||
u32 overrides; /* chip functions set by user */
|
||||
u16 host_mask;
|
||||
u16 port_mask;
|
||||
};
|
||||
|
||||
struct ksz_io_ops {
|
||||
|
|
@ -60,140 +108,60 @@ struct ksz_io_ops {
|
|||
int (*write16)(struct ksz_device *dev, u32 reg, u16 value);
|
||||
int (*write24)(struct ksz_device *dev, u32 reg, u32 value);
|
||||
int (*write32)(struct ksz_device *dev, u32 reg, u32 value);
|
||||
int (*phy_read16)(struct ksz_device *dev, int addr, int reg,
|
||||
u16 *value);
|
||||
int (*phy_write16)(struct ksz_device *dev, int addr, int reg,
|
||||
u16 value);
|
||||
int (*get)(struct ksz_device *dev, u32 reg, void *data, size_t len);
|
||||
int (*set)(struct ksz_device *dev, u32 reg, void *data, size_t len);
|
||||
};
|
||||
|
||||
struct alu_struct {
|
||||
/* entry 1 */
|
||||
u8 is_static:1;
|
||||
u8 is_src_filter:1;
|
||||
u8 is_dst_filter:1;
|
||||
u8 prio_age:3;
|
||||
u32 _reserv_0_1:23;
|
||||
u8 mstp:3;
|
||||
/* entry 2 */
|
||||
u8 is_override:1;
|
||||
u8 is_use_fid:1;
|
||||
u32 _reserv_1_1:23;
|
||||
u8 port_forward:7;
|
||||
/* entry 3 & 4*/
|
||||
u32 _reserv_2_1:9;
|
||||
u8 fid:7;
|
||||
u8 mac[ETH_ALEN];
|
||||
};
|
||||
|
||||
struct ksz_dev_ops {
|
||||
u32 (*get_port_addr)(int port, int offset);
|
||||
void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
|
||||
void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
|
||||
void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
|
||||
void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
|
||||
void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
|
||||
int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr,
|
||||
u8 *fid, u8 *src_port, u8 *timestamp,
|
||||
u16 *entries);
|
||||
int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr,
|
||||
struct alu_struct *alu);
|
||||
void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr,
|
||||
struct alu_struct *alu);
|
||||
void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
|
||||
u64 *cnt);
|
||||
void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
|
||||
u64 *dropped, u64 *cnt);
|
||||
void (*port_init_cnt)(struct ksz_device *dev, int port);
|
||||
int (*shutdown)(struct ksz_device *dev);
|
||||
int (*detect)(struct ksz_device *dev);
|
||||
int (*init)(struct ksz_device *dev);
|
||||
void (*exit)(struct ksz_device *dev);
|
||||
};
|
||||
|
||||
struct ksz_device *ksz_switch_alloc(struct device *base,
|
||||
const struct ksz_io_ops *ops, void *priv);
|
||||
int ksz_switch_detect(struct ksz_device *dev);
|
||||
int ksz_switch_register(struct ksz_device *dev);
|
||||
int ksz_switch_register(struct ksz_device *dev,
|
||||
const struct ksz_dev_ops *ops);
|
||||
void ksz_switch_remove(struct ksz_device *dev);
|
||||
|
||||
static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
|
||||
{
|
||||
int ret;
|
||||
|
||||
mutex_lock(&dev->reg_mutex);
|
||||
ret = dev->ops->read8(dev, reg, val);
|
||||
mutex_unlock(&dev->reg_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
|
||||
{
|
||||
int ret;
|
||||
|
||||
mutex_lock(&dev->reg_mutex);
|
||||
ret = dev->ops->read16(dev, reg, val);
|
||||
mutex_unlock(&dev->reg_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline int ksz_read24(struct ksz_device *dev, u32 reg, u32 *val)
|
||||
{
|
||||
int ret;
|
||||
|
||||
mutex_lock(&dev->reg_mutex);
|
||||
ret = dev->ops->read24(dev, reg, val);
|
||||
mutex_unlock(&dev->reg_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
|
||||
{
|
||||
int ret;
|
||||
|
||||
mutex_lock(&dev->reg_mutex);
|
||||
ret = dev->ops->read32(dev, reg, val);
|
||||
mutex_unlock(&dev->reg_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
|
||||
{
|
||||
int ret;
|
||||
|
||||
mutex_lock(&dev->reg_mutex);
|
||||
ret = dev->ops->write8(dev, reg, value);
|
||||
mutex_unlock(&dev->reg_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
|
||||
{
|
||||
int ret;
|
||||
|
||||
mutex_lock(&dev->reg_mutex);
|
||||
ret = dev->ops->write16(dev, reg, value);
|
||||
mutex_unlock(&dev->reg_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline int ksz_write24(struct ksz_device *dev, u32 reg, u32 value)
|
||||
{
|
||||
int ret;
|
||||
|
||||
mutex_lock(&dev->reg_mutex);
|
||||
ret = dev->ops->write24(dev, reg, value);
|
||||
mutex_unlock(&dev->reg_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
|
||||
{
|
||||
int ret;
|
||||
|
||||
mutex_lock(&dev->reg_mutex);
|
||||
ret = dev->ops->write32(dev, reg, value);
|
||||
mutex_unlock(&dev->reg_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
|
||||
u8 *data)
|
||||
{
|
||||
ksz_read8(dev, PORT_CTRL_ADDR(port, offset), data);
|
||||
}
|
||||
|
||||
static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
|
||||
u16 *data)
|
||||
{
|
||||
ksz_read16(dev, PORT_CTRL_ADDR(port, offset), data);
|
||||
}
|
||||
|
||||
static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
|
||||
u32 *data)
|
||||
{
|
||||
ksz_read32(dev, PORT_CTRL_ADDR(port, offset), data);
|
||||
}
|
||||
|
||||
static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
|
||||
u8 data)
|
||||
{
|
||||
ksz_write8(dev, PORT_CTRL_ADDR(port, offset), data);
|
||||
}
|
||||
|
||||
static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
|
||||
u16 data)
|
||||
{
|
||||
ksz_write16(dev, PORT_CTRL_ADDR(port, offset), data);
|
||||
}
|
||||
|
||||
static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
|
||||
u32 data)
|
||||
{
|
||||
ksz_write32(dev, PORT_CTRL_ADDR(port, offset), data);
|
||||
}
|
||||
int ksz9477_switch_register(struct ksz_device *dev);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,69 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0
|
||||
* Microchip KSZ series SPI access common header
|
||||
*
|
||||
* Copyright (C) 2017-2018 Microchip Technology Inc.
|
||||
* Tristram Ha <Tristram.Ha@microchip.com>
|
||||
*/
|
||||
|
||||
#ifndef __KSZ_SPI_H
|
||||
#define __KSZ_SPI_H
|
||||
|
||||
/* Chip dependent SPI access */
|
||||
static int ksz_spi_read(struct ksz_device *dev, u32 reg, u8 *data,
|
||||
unsigned int len);
|
||||
static int ksz_spi_write(struct ksz_device *dev, u32 reg, void *data,
|
||||
unsigned int len);
|
||||
|
||||
static int ksz_spi_read8(struct ksz_device *dev, u32 reg, u8 *val)
|
||||
{
|
||||
return ksz_spi_read(dev, reg, val, 1);
|
||||
}
|
||||
|
||||
static int ksz_spi_read16(struct ksz_device *dev, u32 reg, u16 *val)
|
||||
{
|
||||
int ret = ksz_spi_read(dev, reg, (u8 *)val, 2);
|
||||
|
||||
if (!ret)
|
||||
*val = be16_to_cpu(*val);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ksz_spi_read32(struct ksz_device *dev, u32 reg, u32 *val)
|
||||
{
|
||||
int ret = ksz_spi_read(dev, reg, (u8 *)val, 4);
|
||||
|
||||
if (!ret)
|
||||
*val = be32_to_cpu(*val);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ksz_spi_write8(struct ksz_device *dev, u32 reg, u8 value)
|
||||
{
|
||||
return ksz_spi_write(dev, reg, &value, 1);
|
||||
}
|
||||
|
||||
static int ksz_spi_write16(struct ksz_device *dev, u32 reg, u16 value)
|
||||
{
|
||||
value = cpu_to_be16(value);
|
||||
return ksz_spi_write(dev, reg, &value, 2);
|
||||
}
|
||||
|
||||
static int ksz_spi_write32(struct ksz_device *dev, u32 reg, u32 value)
|
||||
{
|
||||
value = cpu_to_be32(value);
|
||||
return ksz_spi_write(dev, reg, &value, 4);
|
||||
}
|
||||
|
||||
static int ksz_spi_get(struct ksz_device *dev, u32 reg, void *data, size_t len)
|
||||
{
|
||||
return ksz_spi_read(dev, reg, data, len);
|
||||
}
|
||||
|
||||
static int ksz_spi_set(struct ksz_device *dev, u32 reg, void *data, size_t len)
|
||||
{
|
||||
return ksz_spi_write(dev, reg, data, len);
|
||||
}
|
||||
|
||||
#endif
|
||||
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