Staging: et131x: Clean up the half duplex control reg types
Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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308e93e0a3
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c2f6118a30
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@ -1395,38 +1395,19 @@ typedef union _MAC_CFG2_t {
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* 22-16: non B2B ipg 2
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* 15-8: Min ifg enforce
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* 7-0: B2B ipg
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*/
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/*
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*
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* structure for half duplex reg in mac address map.
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* located at address 0x500C
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* 31-24: reserved
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* 23-20: Alt BEB trunc
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* 19: Alt BEB enable
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* 18: BP no backoff
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* 17: no backoff
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* 16: excess defer
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* 15-12: re-xmit max
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* 11-10: reserved
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* 9-0: collision window
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*/
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typedef union _MAC_HFDP_t {
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u32 value;
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struct {
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#ifdef _BIT_FIELDS_HTOL
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u32 reserved2:8; /* bits 24-31 */
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u32 alt_beb_trunc:4; /* bits 23-20 */
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u32 alt_beb_enable:1; /* bit 19 */
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u32 bp_no_backoff:1; /* bit 18 */
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u32 no_backoff:1; /* bit 17 */
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u32 excess_defer:1; /* bit 16 */
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u32 rexmit_max:4; /* bits 12-15 */
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u32 reserved1:2; /* bits 10-11 */
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u32 coll_window:10; /* bits 0-9 */
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#else
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u32 coll_window:10; /* bits 0-9 */
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u32 reserved1:2; /* bits 10-11 */
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u32 rexmit_max:4; /* bits 12-15 */
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u32 excess_defer:1; /* bit 16 */
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u32 no_backoff:1; /* bit 17 */
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u32 bp_no_backoff:1; /* bit 18 */
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u32 alt_beb_enable:1; /* bit 19 */
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u32 alt_beb_trunc:4; /* bits 23-20 */
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u32 reserved2:8; /* bits 24-31 */
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#endif
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} bits;
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} MAC_HFDP_t, *PMAC_HFDP_t;
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/*
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* structure for Maximum Frame Length reg in mac address map.
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@ -1717,7 +1698,7 @@ typedef struct _MAC_t { /* Location: */
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MAC_CFG1_t cfg1; /* 0x5000 */
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MAC_CFG2_t cfg2; /* 0x5004 */
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u32 ipg; /* 0x5008 */
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MAC_HFDP_t hfdp; /* 0x500C */
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u32 hfdp; /* 0x500C */
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MAC_MAX_FM_LEN_t max_fm_len; /* 0x5010 */
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u32 rsv1; /* 0x5014 */
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u32 rsv2; /* 0x5018 */
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@ -102,7 +102,6 @@ void ConfigMACRegs1(struct et131x_adapter *etdev)
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MAC_STATION_ADDR1_t station1;
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MAC_STATION_ADDR2_t station2;
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u32 ipg;
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MAC_HFDP_t hfdp;
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MII_MGMT_CFG_t mii_mgmt_cfg;
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/* First we need to reset everything. Write to MAC configuration
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@ -116,14 +115,8 @@ void ConfigMACRegs1(struct et131x_adapter *etdev)
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writel(ipg, &pMac->ipg);
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/* Next lets configure the MAC Half Duplex register */
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hfdp.bits.alt_beb_trunc = 0xA;
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hfdp.bits.alt_beb_enable = 0x0;
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hfdp.bits.bp_no_backoff = 0x0;
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hfdp.bits.no_backoff = 0x0;
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hfdp.bits.excess_defer = 0x1;
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hfdp.bits.rexmit_max = 0xF;
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hfdp.bits.coll_window = 0x37; /* 55d */
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writel(hfdp.value, &pMac->hfdp.value);
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/* BEB trunc 0xA, Ex Defer, Rexmit 0xF Coll 0x37 */
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writel(0x00A1F037, &pMac->hfdp);
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/* Next lets configure the MAC Interface Control register */
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writel(0, &pMac->if_ctrl.value);
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