mISDN: hfcmulti: use __iomem address space modifier
Impact: make use of the __iomem address space modifier, and change u_char *, u_short * and u_int * to void * Fix more than 30 sparse warnings of this or similar type: drivers/isdn/hardware/mISDN/hfcmulti.c:261:31: warning: incorrect type in argument 2 (different address spaces) drivers/isdn/hardware/mISDN/hfcmulti.c:261:31: got unsigned char [usertype] * drivers/isdn/hardware/mISDN/hfcmulti.c:261:31: expected void volatile [noderef] <asn:2>*addr Signed-off-by: Hannes Eder <hannes@hanneseder.net> Acked-by: Karsten Keil <kkeil@suse.de> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Родитель
c46f0a2d40
Коммит
c31655fcf2
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@ -162,8 +162,8 @@ struct hfc_multi {
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void (*write_fifo)(struct hfc_multi *hc, u_char *data,
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int len);
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u_long pci_origmembase, plx_origmembase, dsp_origmembase;
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u_char *pci_membase; /* PCI memory (MUST BE BYTE POINTER) */
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u_char *plx_membase; /* PLX memory */
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void __iomem *pci_membase; /* PCI memory */
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void __iomem *plx_membase; /* PLX memory */
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u_char *dsp_membase; /* DSP on PLX */
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u_long pci_iobase; /* PCI IO */
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struct hfcm_hw hw; /* remember data of write-only-registers */
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@ -889,7 +889,8 @@ static inline void
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hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
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{
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struct hfc_multi *hc, *next, *pcmmaster = NULL;
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u_int *plx_acc_32, pv;
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void __iomem *plx_acc_32;
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u_int pv;
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u_long flags;
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spin_lock_irqsave(&HFClock, flags);
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@ -917,7 +918,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
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/* Disable sync of all cards */
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list_for_each_entry_safe(hc, next, &HFClist, list) {
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if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
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plx_acc_32 = (u_int *)(hc->plx_membase+PLX_GPIOC);
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plx_acc_32 = hc->plx_membase + PLX_GPIOC;
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pv = readl(plx_acc_32);
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pv &= ~PLX_SYNC_O_EN;
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writel(pv, plx_acc_32);
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@ -939,7 +940,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
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printk(KERN_DEBUG "id=%d (0x%p) = syncronized with "
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"interface.\n", hc->id, hc);
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/* Enable new sync master */
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plx_acc_32 = (u_int *)(hc->plx_membase+PLX_GPIOC);
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plx_acc_32 = hc->plx_membase + PLX_GPIOC;
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pv = readl(plx_acc_32);
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pv |= PLX_SYNC_O_EN;
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writel(pv, plx_acc_32);
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@ -969,7 +970,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
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"QUARTZ is automatically "
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"enabled by HFC-%dS\n", hc->type);
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}
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plx_acc_32 = (u_int *)(hc->plx_membase+PLX_GPIOC);
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plx_acc_32 = hc->plx_membase + PLX_GPIOC;
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pv = readl(plx_acc_32);
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pv |= PLX_SYNC_O_EN;
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writel(pv, plx_acc_32);
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@ -1014,7 +1015,8 @@ plxsd_checksync(struct hfc_multi *hc, int rm)
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static void
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release_io_hfcmulti(struct hfc_multi *hc)
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{
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u_int *plx_acc_32, pv;
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void __iomem *plx_acc_32;
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u_int pv;
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u_long plx_flags;
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if (debug & DEBUG_HFCMULTI_INIT)
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@ -1034,7 +1036,7 @@ release_io_hfcmulti(struct hfc_multi *hc)
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printk(KERN_DEBUG "%s: release PLXSD card %d\n",
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__func__, hc->id + 1);
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spin_lock_irqsave(&plx_lock, plx_flags);
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plx_acc_32 = (u_int *)(hc->plx_membase+PLX_GPIOC);
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plx_acc_32 = hc->plx_membase + PLX_GPIOC;
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writel(PLX_GPIOC_INIT, plx_acc_32);
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pv = readl(plx_acc_32);
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/* Termination off */
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@ -1056,9 +1058,9 @@ release_io_hfcmulti(struct hfc_multi *hc)
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test_and_clear_bit(HFC_CHIP_PLXSD, &hc->chip); /* prevent resync */
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pci_write_config_word(hc->pci_dev, PCI_COMMAND, 0);
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if (hc->pci_membase)
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iounmap((void *)hc->pci_membase);
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iounmap(hc->pci_membase);
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if (hc->plx_membase)
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iounmap((void *)hc->plx_membase);
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iounmap(hc->plx_membase);
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if (hc->pci_iobase)
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release_region(hc->pci_iobase, 8);
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@ -1081,7 +1083,8 @@ init_chip(struct hfc_multi *hc)
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u_long flags, val, val2 = 0, rev;
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int i, err = 0;
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u_char r_conf_en, rval;
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u_int *plx_acc_32, pv;
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void __iomem *plx_acc_32;
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u_int pv;
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u_long plx_flags, hfc_flags;
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int plx_count;
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struct hfc_multi *pos, *next, *plx_last_hc;
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@ -1155,7 +1158,7 @@ init_chip(struct hfc_multi *hc)
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printk(KERN_DEBUG "%s: initializing PLXSD card %d\n",
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__func__, hc->id + 1);
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spin_lock_irqsave(&plx_lock, plx_flags);
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plx_acc_32 = (u_int *)(hc->plx_membase+PLX_GPIOC);
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plx_acc_32 = hc->plx_membase + PLX_GPIOC;
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writel(PLX_GPIOC_INIT, plx_acc_32);
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pv = readl(plx_acc_32);
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/* The first and the last cards are terminating the PCM bus */
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@ -1191,8 +1194,7 @@ init_chip(struct hfc_multi *hc)
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"we disable termination\n",
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__func__, plx_last_hc->id + 1);
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spin_lock_irqsave(&plx_lock, plx_flags);
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plx_acc_32 = (u_int *)(plx_last_hc->plx_membase
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+ PLX_GPIOC);
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plx_acc_32 = plx_last_hc->plx_membase + PLX_GPIOC;
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pv = readl(plx_acc_32);
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pv &= ~PLX_TERM_ON;
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writel(pv, plx_acc_32);
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@ -1241,7 +1243,7 @@ init_chip(struct hfc_multi *hc)
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/* Speech Design PLX bridge pcm and sync mode */
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if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
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spin_lock_irqsave(&plx_lock, plx_flags);
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plx_acc_32 = (u_int *)(hc->plx_membase+PLX_GPIOC);
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plx_acc_32 = hc->plx_membase + PLX_GPIOC;
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pv = readl(plx_acc_32);
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/* Connect PCM */
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if (hc->hw.r_pcm_md0 & V_PCM_MD) {
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@ -1353,8 +1355,7 @@ controller_fail:
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/* retry with master clock */
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if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
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spin_lock_irqsave(&plx_lock, plx_flags);
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plx_acc_32 = (u_int *)(hc->plx_membase +
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PLX_GPIOC);
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plx_acc_32 = hc->plx_membase + PLX_GPIOC;
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pv = readl(plx_acc_32);
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pv |= PLX_MASTER_EN | PLX_SLAVE_EN_N;
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pv |= PLX_SYNC_O_EN;
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@ -1390,7 +1391,7 @@ controller_fail:
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if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip))
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plxsd_master = 1;
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spin_lock_irqsave(&plx_lock, plx_flags);
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plx_acc_32 = (u_int *)(hc->plx_membase+PLX_GPIOC);
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plx_acc_32 = hc->plx_membase + PLX_GPIOC;
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pv = readl(plx_acc_32);
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pv |= PLX_DSP_RES_N;
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writel(pv, plx_acc_32);
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@ -2587,7 +2588,8 @@ hfcmulti_interrupt(int intno, void *dev_id)
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struct dchannel *dch;
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u_char r_irq_statech, status, r_irq_misc, r_irq_oview;
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int i;
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u_short *plx_acc, wval;
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void __iomem *plx_acc;
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u_short wval;
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u_char e1_syncsta, temp;
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u_long flags;
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@ -2607,7 +2609,7 @@ hfcmulti_interrupt(int intno, void *dev_id)
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if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
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spin_lock_irqsave(&plx_lock, flags);
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plx_acc = (u_short *)(hc->plx_membase + PLX_INTCSR);
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plx_acc = hc->plx_membase + PLX_INTCSR;
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wval = readw(plx_acc);
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spin_unlock_irqrestore(&plx_lock, flags);
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if (!(wval & PLX_INTCSR_LINTI1_STATUS))
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@ -4092,7 +4094,7 @@ init_card(struct hfc_multi *hc)
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{
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int err = -EIO;
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u_long flags;
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u_short *plx_acc;
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void __iomem *plx_acc;
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u_long plx_flags;
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if (debug & DEBUG_HFCMULTI_INIT)
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@ -4114,7 +4116,7 @@ init_card(struct hfc_multi *hc)
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if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
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spin_lock_irqsave(&plx_lock, plx_flags);
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plx_acc = (u_short *)(hc->plx_membase+PLX_INTCSR);
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plx_acc = hc->plx_membase + PLX_INTCSR;
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writew((PLX_INTCSR_PCIINT_ENABLE | PLX_INTCSR_LINTI1_ENABLE),
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plx_acc); /* enable PCI & LINT1 irq */
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spin_unlock_irqrestore(&plx_lock, plx_flags);
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@ -4163,7 +4165,7 @@ init_card(struct hfc_multi *hc)
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error:
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if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
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spin_lock_irqsave(&plx_lock, plx_flags);
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plx_acc = (u_short *)(hc->plx_membase+PLX_INTCSR);
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plx_acc = hc->plx_membase + PLX_INTCSR;
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writew(0x00, plx_acc); /*disable IRQs*/
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spin_unlock_irqrestore(&plx_lock, plx_flags);
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}
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