Renesas ARM DT updates for v6.1 (take two)
- Merge Renesas ARM/ARM64 maintainers entries,
- CAN support for the RZ/N1 SoC and the RZN1D-DB development board,
- Watchdog, pin control, I2C (EEPROM), GPIO (LEDS/switches), and
Ethernet support for the R-Car V4H SoC and the White Hawk
development board,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYyhZSgAKCRCKwlD9ZEnx
cOSeAQDY7CNJJ8S5iCGdfpYj0OF4E/SLjuY72FN9W/yriv+uiwD9H8YeF+E7cXCS
/Q0bFjrWpuuminmlWrtwQ8jH30R89QM=
=pwpK
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtwigACgkQmmx57+YA
GNmPPA//f9VL4tO8ms1mjgjAAjlq21JKGIkmpdJ/SzSVAZU39k0XBFORBaG04qRv
aNDfJay1UHl5f+Ygq6j3v2KFHtNBkKv6NT1N+F+gzJ+I3Bf/sNdYBA7FVAmsLSuD
zxoxJhUu0V+/d2EtjbUyMeyQSRLbYtArrq0f40e4CMDdPwcM35gGHOspk8lllEkS
94hdIPhBDpejbbq8H1SYOEAA2OJNGKHO/ArcDf4dbXDupv0ELovFhktBlhUzf5en
+Y2xABZ8aTHT3l+K649EhlgK6OHH81bHbyFoebZQo3UO6OvLS5qWbySYHirIwKy2
oFwRexzjz3hskWFgm2vnr5C94J1xJhsTAFK7HAA0wnc5GNCxy521ECVsR6MgkHUi
WoazCKXqAx+t+iAFQ++Yut6QBwBP5MCTzC9jU0HqSVWwuPYltKiGnkZ7Q4lAp0q1
stBEO67puu/nuVG9Q8Yv+ZoeKKvcCg42dJbZjlL8FjNP9Th2Ygm5DKvSJp7L99bn
pHPSQOVDFBj9kdcrwL1Tbxck6RGKIkHHfzYfpN7X0CczGr2b7/l+Od2aKEAetpUp
iNs1150Dophd//ooJqrE4ksi9UoGcWbLyk0m4okUpUyXMBKAqnRfowgX/liZ1HhA
/JefVEZjPwbJ9N8I7FzmXaP4iC7R0D38sa8mz2OSDNFVNdRLxvo=
=uEBt
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v6.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v6.1 (take two)
- Merge Renesas ARM/ARM64 maintainers entries,
- CAN support for the RZ/N1 SoC and the RZN1D-DB development board,
- Watchdog, pin control, I2C (EEPROM), GPIO (LEDS/switches), and
Ethernet support for the R-Car V4H SoC and the White Hawk
development board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v6.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (26 commits)
arm64: dts: renesas: Adjust whitespace around '{'
arm64: dts: renesas: rzg2ul-smarc: Include SoM DTSI into board DTS
arm64: dts: renesas: rzg2ul-smarc-som: Drop enabling wdt2
ARM: dts: renesas: Fix USB PHY device and child node names
arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
arm64: dts: renesas: white-hawk-cpu: Add missing bootargs
arm64: dts: renesas: spider-cpu: Add missing bootargs
arm64: dts: renesas: spider: Move aliases and chosen
arm64: dts: renesas: white-hawk-cpu: Add Ethernet support
arm64: dts: renesas: white-hawk: Move aliases and chosen
arm64: dts: renesas: r8a779g0: Add RAVB nodes
arm64: dts: renesas: white-hawk-cpu: Add push switches
arm64: dts: renesas: white-hawk-cpu: Add GP LEDs
arm64: dts: renesas: r8a779g0: Add GPIO nodes
arm64: dts: renesas: white-hawk: Add Ethernet sub-board
arm64: dts: renesas: white-hawk: Add CSI/DSI sub-board
arm64: dts: renesas: white-hawk: Add I2C0 and EEPROMs
arm64: dts: renesas: r8a779g0: Add I2C nodes
arm64: dts: renesas: white-hawk-cpu: Add serial port pin control
arm64: dts: renesas: r8a779g0: Add pinctrl device node
...
Link: https://lore.kernel.org/r/cover.1663588776.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
Коммит
c328a66dfd
35
MAINTAINERS
35
MAINTAINERS
|
|
@ -2650,7 +2650,7 @@ F: arch/arm/boot/dts/rtd*
|
|||
F: arch/arm/mach-realtek/
|
||||
F: arch/arm64/boot/dts/realtek/
|
||||
|
||||
ARM/RENESAS ARM64 ARCHITECTURE
|
||||
ARM/RENESAS ARCHITECTURE
|
||||
M: Geert Uytterhoeven <geert+renesas@glider.be>
|
||||
M: Magnus Damm <magnus.damm@gmail.com>
|
||||
L: linux-renesas-soc@vger.kernel.org
|
||||
|
|
@ -2661,6 +2661,16 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git nex
|
|||
F: Documentation/devicetree/bindings/arm/renesas.yaml
|
||||
F: Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml
|
||||
F: Documentation/devicetree/bindings/soc/renesas/
|
||||
F: arch/arm/boot/dts/emev2*
|
||||
F: arch/arm/boot/dts/gr-peach*
|
||||
F: arch/arm/boot/dts/iwg20d-q7*
|
||||
F: arch/arm/boot/dts/r7s*
|
||||
F: arch/arm/boot/dts/r8a*
|
||||
F: arch/arm/boot/dts/r9a*
|
||||
F: arch/arm/boot/dts/sh*
|
||||
F: arch/arm/configs/shmobile_defconfig
|
||||
F: arch/arm/include/debug/renesas-scif.S
|
||||
F: arch/arm/mach-shmobile/
|
||||
F: arch/arm64/boot/dts/renesas/
|
||||
F: drivers/soc/renesas/
|
||||
F: include/linux/soc/renesas/
|
||||
|
|
@ -2772,29 +2782,6 @@ L: linux-media@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/media/platform/samsung/s5p-mfc/
|
||||
|
||||
ARM/SHMOBILE ARM ARCHITECTURE
|
||||
M: Geert Uytterhoeven <geert+renesas@glider.be>
|
||||
M: Magnus Damm <magnus.damm@gmail.com>
|
||||
L: linux-renesas-soc@vger.kernel.org
|
||||
S: Supported
|
||||
Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/
|
||||
C: irc://irc.libera.chat/renesas-soc
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
|
||||
F: Documentation/devicetree/bindings/arm/renesas.yaml
|
||||
F: Documentation/devicetree/bindings/soc/renesas/
|
||||
F: arch/arm/boot/dts/emev2*
|
||||
F: arch/arm/boot/dts/gr-peach*
|
||||
F: arch/arm/boot/dts/iwg20d-q7*
|
||||
F: arch/arm/boot/dts/r7s*
|
||||
F: arch/arm/boot/dts/r8a*
|
||||
F: arch/arm/boot/dts/r9a*
|
||||
F: arch/arm/boot/dts/sh*
|
||||
F: arch/arm/configs/shmobile_defconfig
|
||||
F: arch/arm/include/debug/renesas-scif.S
|
||||
F: arch/arm/mach-shmobile/
|
||||
F: drivers/soc/renesas/
|
||||
F: include/linux/soc/renesas/
|
||||
|
||||
ARM/SOCFPGA ARCHITECTURE
|
||||
M: Dinh Nguyen <dinguyen@kernel.org>
|
||||
S: Maintained
|
||||
|
|
|
|||
|
|
@ -633,7 +633,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: usb-phy@e6590100 {
|
||||
usbphy: usb-phy-controller@e6590100 {
|
||||
compatible = "renesas,usb-phy-r8a7742",
|
||||
"renesas,rcar-gen2-usb-phy";
|
||||
reg = <0 0xe6590100 0 0x100>;
|
||||
|
|
@ -645,11 +645,11 @@
|
|||
resets = <&cpg 704>;
|
||||
status = "disabled";
|
||||
|
||||
usb0: usb-channel@0 {
|
||||
usb0: usb-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
usb2: usb-channel@2 {
|
||||
usb2: usb-phy@2 {
|
||||
reg = <2>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -584,7 +584,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: usb-phy@e6590100 {
|
||||
usbphy: usb-phy-controller@e6590100 {
|
||||
compatible = "renesas,usb-phy-r8a7743",
|
||||
"renesas,rcar-gen2-usb-phy";
|
||||
reg = <0 0xe6590100 0 0x100>;
|
||||
|
|
@ -596,11 +596,11 @@
|
|||
resets = <&cpg 704>;
|
||||
status = "disabled";
|
||||
|
||||
usb0: usb-channel@0 {
|
||||
usb0: usb-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
usb2: usb-channel@2 {
|
||||
usb2: usb-phy@2 {
|
||||
reg = <2>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -584,7 +584,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: usb-phy@e6590100 {
|
||||
usbphy: usb-phy-controller@e6590100 {
|
||||
compatible = "renesas,usb-phy-r8a7744",
|
||||
"renesas,rcar-gen2-usb-phy";
|
||||
reg = <0 0xe6590100 0 0x100>;
|
||||
|
|
@ -596,11 +596,11 @@
|
|||
resets = <&cpg 704>;
|
||||
status = "disabled";
|
||||
|
||||
usb0: usb-channel@0 {
|
||||
usb0: usb-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
usb2: usb-channel@2 {
|
||||
usb2: usb-phy@2 {
|
||||
reg = <2>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -525,7 +525,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: usb-phy@e6590100 {
|
||||
usbphy: usb-phy-controller@e6590100 {
|
||||
compatible = "renesas,usb-phy-r8a7745",
|
||||
"renesas,rcar-gen2-usb-phy";
|
||||
reg = <0 0xe6590100 0 0x100>;
|
||||
|
|
@ -537,11 +537,11 @@
|
|||
resets = <&cpg 704>;
|
||||
status = "disabled";
|
||||
|
||||
usb0: usb-channel@0 {
|
||||
usb0: usb-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
usb2: usb-channel@2 {
|
||||
usb2: usb-phy@2 {
|
||||
reg = <2>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -357,7 +357,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy0: usb-phy@e6590100 {
|
||||
usbphy0: usb-phy-controller@e6590100 {
|
||||
compatible = "renesas,usb-phy-r8a77470",
|
||||
"renesas,rcar-gen2-usb-phy";
|
||||
reg = <0 0xe6590100 0 0x100>;
|
||||
|
|
@ -369,7 +369,7 @@
|
|||
resets = <&cpg 704>;
|
||||
status = "disabled";
|
||||
|
||||
usb0: usb-channel@0 {
|
||||
usb0: usb-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
|
@ -393,7 +393,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy1: usb-phy@e6598100 {
|
||||
usbphy1: usb-phy-controller@e6598100 {
|
||||
compatible = "renesas,usb-phy-r8a77470",
|
||||
"renesas,rcar-gen2-usb-phy";
|
||||
reg = <0 0xe6598100 0 0x100>;
|
||||
|
|
@ -405,7 +405,7 @@
|
|||
resets = <&cpg 706>;
|
||||
status = "disabled";
|
||||
|
||||
usb1: usb-channel@0 {
|
||||
usb1: usb-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -654,7 +654,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: usb-phy@e6590100 {
|
||||
usbphy: usb-phy-controller@e6590100 {
|
||||
compatible = "renesas,usb-phy-r8a7790",
|
||||
"renesas,rcar-gen2-usb-phy";
|
||||
reg = <0 0xe6590100 0 0x100>;
|
||||
|
|
@ -666,11 +666,11 @@
|
|||
resets = <&cpg 704>;
|
||||
status = "disabled";
|
||||
|
||||
usb0: usb-channel@0 {
|
||||
usb0: usb-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
usb2: usb-channel@2 {
|
||||
usb2: usb-phy@2 {
|
||||
reg = <2>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -608,7 +608,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: usb-phy@e6590100 {
|
||||
usbphy: usb-phy-controller@e6590100 {
|
||||
compatible = "renesas,usb-phy-r8a7791",
|
||||
"renesas,rcar-gen2-usb-phy";
|
||||
reg = <0 0xe6590100 0 0x100>;
|
||||
|
|
@ -620,11 +620,11 @@
|
|||
resets = <&cpg 704>;
|
||||
status = "disabled";
|
||||
|
||||
usb0: usb-channel@0 {
|
||||
usb0: usb-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
usb2: usb-channel@2 {
|
||||
usb2: usb-phy@2 {
|
||||
reg = <2>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -506,7 +506,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: usb-phy@e6590100 {
|
||||
usbphy: usb-phy-controller@e6590100 {
|
||||
compatible = "renesas,usb-phy-r8a7794",
|
||||
"renesas,rcar-gen2-usb-phy";
|
||||
reg = <0 0xe6590100 0 0x100>;
|
||||
|
|
@ -518,11 +518,11 @@
|
|||
resets = <&cpg 704>;
|
||||
status = "disabled";
|
||||
|
||||
usb0: usb-channel@0 {
|
||||
usb0: usb-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
usb2: usb-channel@2 {
|
||||
usb2: usb-phy@2 {
|
||||
reg = <2>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -26,6 +26,22 @@
|
|||
};
|
||||
};
|
||||
|
||||
&can0 {
|
||||
pinctrl-0 = <&pins_can0>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* Assuming CN10/CN11 are wired for CAN1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-0 = <&pins_can1>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* Please only enable can0 or can1, depending on CN10/CN11 */
|
||||
/* status = "okay"; */
|
||||
};
|
||||
|
||||
ð_miic {
|
||||
status = "okay";
|
||||
renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
|
||||
|
|
@ -52,6 +68,18 @@
|
|||
};
|
||||
|
||||
&pinctrl{
|
||||
pins_can0: pins_can0 {
|
||||
pinmux = <RZN1_PINMUX(162, RZN1_FUNC_CAN)>, /* CAN0_TXD */
|
||||
<RZN1_PINMUX(163, RZN1_FUNC_CAN)>; /* CAN0_RXD */
|
||||
drive-strength = <6>;
|
||||
};
|
||||
|
||||
pins_can1: pins_can1 {
|
||||
pinmux = <RZN1_PINMUX(109, RZN1_FUNC_CAN)>, /* CAN1_TXD */
|
||||
<RZN1_PINMUX(110, RZN1_FUNC_CAN)>; /* CAN1_RXD */
|
||||
drive-strength = <6>;
|
||||
};
|
||||
|
||||
pins_eth3: pins_eth3 {
|
||||
pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
|
||||
<RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
|
||||
|
|
|
|||
|
|
@ -423,6 +423,26 @@
|
|||
interrupts =
|
||||
<GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
|
||||
};
|
||||
|
||||
can0: can@52104000 {
|
||||
compatible = "renesas,r9a06g032-sja1000","renesas,rzn1-sja1000";
|
||||
reg = <0x52104000 0x800>;
|
||||
reg-io-width = <4>;
|
||||
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sysctrl R9A06G032_HCLK_CAN0>;
|
||||
power-domains = <&sysctrl>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can1: can@52105000 {
|
||||
compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
|
||||
reg = <0x52105000 0x800>;
|
||||
reg-io-width = <4>;
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sysctrl R9A06G032_HCLK_CAN1>;
|
||||
power-domains = <&sysctrl>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
timer {
|
||||
|
|
|
|||
|
|
@ -247,7 +247,7 @@
|
|||
|
||||
cmt0: timer@e60f0000 {
|
||||
compatible = "renesas,r8a779a0-cmt0",
|
||||
"renesas,rcar-gen3-cmt0";
|
||||
"renesas,rcar-gen4-cmt0";
|
||||
reg = <0 0xe60f0000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -260,7 +260,7 @@
|
|||
|
||||
cmt1: timer@e6130000 {
|
||||
compatible = "renesas,r8a779a0-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
"renesas,rcar-gen4-cmt1";
|
||||
reg = <0 0xe6130000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -279,7 +279,7 @@
|
|||
|
||||
cmt2: timer@e6140000 {
|
||||
compatible = "renesas,r8a779a0-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
"renesas,rcar-gen4-cmt1";
|
||||
reg = <0 0xe6140000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -298,7 +298,7 @@
|
|||
|
||||
cmt3: timer@e6148000 {
|
||||
compatible = "renesas,r8a779a0-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
"renesas,rcar-gen4-cmt1";
|
||||
reg = <0 0xe6148000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -2065,7 +2065,7 @@
|
|||
|
||||
mmc0: mmc@ee140000 {
|
||||
compatible = "renesas,sdhi-r8a779a0",
|
||||
"renesas,rcar-gen3-sdhi";
|
||||
"renesas,rcar-gen4-sdhi";
|
||||
reg = <0 0xee140000 0 0x2000>;
|
||||
interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>;
|
||||
|
|
|
|||
|
|
@ -11,6 +11,16 @@
|
|||
model = "Renesas Spider CPU board";
|
||||
compatible = "renesas,spider-cpu", "renesas,r8a779f0";
|
||||
|
||||
aliases {
|
||||
serial0 = &scif3;
|
||||
serial1 = &scif0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@48000000 {
|
||||
device_type = "memory";
|
||||
/* first 128MB is reserved for secure area. */
|
||||
|
|
|
|||
|
|
@ -12,15 +12,6 @@
|
|||
/ {
|
||||
model = "Renesas Spider CPU and Breakout boards based on r8a779f0";
|
||||
compatible = "renesas,spider-breakout", "renesas,spider-cpu", "renesas,r8a779f0";
|
||||
|
||||
aliases {
|
||||
serial0 = &scif3;
|
||||
serial1 = &scif0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
|
|
|
|||
|
|
@ -7,10 +7,80 @@
|
|||
|
||||
#include "r8a779g0.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
model = "Renesas White Hawk CPU board";
|
||||
compatible = "renesas,white-hawk-cpu", "renesas,r8a779g0";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &avb0;
|
||||
serial0 = &hscif0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||
stdout-path = "serial0:921600n8";
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
pinctrl-0 = <&keys_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
key-1 {
|
||||
gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_1>;
|
||||
label = "SW47";
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
|
||||
key-2 {
|
||||
gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_2>;
|
||||
label = "SW48";
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
|
||||
key-3 {
|
||||
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_3>;
|
||||
label = "SW49";
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-1 {
|
||||
gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_INDICATOR;
|
||||
function-enumerator = <1>;
|
||||
};
|
||||
|
||||
led-2 {
|
||||
gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_INDICATOR;
|
||||
function-enumerator = <2>;
|
||||
};
|
||||
|
||||
led-3 {
|
||||
gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_INDICATOR;
|
||||
function-enumerator = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
memory@48000000 {
|
||||
device_type = "memory";
|
||||
/* first 128MB is reserved for secure area. */
|
||||
|
|
@ -28,6 +98,24 @@
|
|||
};
|
||||
};
|
||||
|
||||
&avb0 {
|
||||
pinctrl-0 = <&avb0_pins>;
|
||||
pinctrl-names = "default";
|
||||
phy-handle = <&phy0>;
|
||||
tx-internal-delay-ps = <2000>;
|
||||
status = "okay";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-id0022.1622",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
rxc-skew-ps = <1500>;
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&extal_clk {
|
||||
clock-frequency = <16666666>;
|
||||
};
|
||||
|
|
@ -40,6 +128,69 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "rohm,br24g01", "atmel,24c01";
|
||||
label = "cpu-board";
|
||||
reg = <0x50>;
|
||||
pagesize = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&pfc {
|
||||
pinctrl-0 = <&scif_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
avb0_pins: avb0 {
|
||||
mux {
|
||||
groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
|
||||
"avb0_txcrefclk";
|
||||
function = "avb0";
|
||||
};
|
||||
|
||||
pins_mdio {
|
||||
groups = "avb0_mdio";
|
||||
drive-strength = <21>;
|
||||
};
|
||||
|
||||
pins_mii {
|
||||
groups = "avb0_rgmii";
|
||||
drive-strength = <21>;
|
||||
};
|
||||
|
||||
};
|
||||
hscif0_pins: hscif0 {
|
||||
groups = "hscif0_data";
|
||||
function = "hscif0";
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0 {
|
||||
groups = "i2c0";
|
||||
function = "i2c0";
|
||||
};
|
||||
|
||||
keys_pins: keys {
|
||||
pins = "GP_5_0", "GP_5_1", "GP_5_2";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
scif_clk_pins: scif_clk {
|
||||
groups = "scif_clk";
|
||||
function = "scif_clk";
|
||||
};
|
||||
};
|
||||
|
||||
&scif_clk {
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
&rwdt {
|
||||
timeout-sec = <60>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,15 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
/*
|
||||
* Device Tree Source for the R-Car V4H White Hawk CSI/DSI sub-board
|
||||
*
|
||||
* Copyright (C) 2022 Glider bv
|
||||
*/
|
||||
|
||||
&i2c0 {
|
||||
eeprom@52 {
|
||||
compatible = "rohm,br24g01", "atmel,24c01";
|
||||
label = "csi-dsi-sub-board-id";
|
||||
reg = <0x52>;
|
||||
pagesize = <8>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
/*
|
||||
* Device Tree Source for the R-Car V4H White Hawk RAVB/Ethernet(1000Base-T1)
|
||||
* sub-board
|
||||
*
|
||||
* Copyright (C) 2022 Glider bv
|
||||
*/
|
||||
|
||||
&i2c0 {
|
||||
eeprom@53 {
|
||||
compatible = "rohm,br24g01", "atmel,24c01";
|
||||
label = "ethernet-sub-board-id";
|
||||
reg = <0x53>;
|
||||
pagesize = <8>;
|
||||
};
|
||||
};
|
||||
|
|
@ -7,16 +7,19 @@
|
|||
|
||||
/dts-v1/;
|
||||
#include "r8a779g0-white-hawk-cpu.dtsi"
|
||||
#include "r8a779g0-white-hawk-csi-dsi.dtsi"
|
||||
#include "r8a779g0-white-hawk-ethernet.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Renesas White Hawk CPU and Breakout boards based on r8a779g0";
|
||||
compatible = "renesas,white-hawk-breakout", "renesas,white-hawk-cpu", "renesas,r8a779g0";
|
||||
};
|
||||
|
||||
aliases {
|
||||
serial0 = &hscif0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:921600n8";
|
||||
&i2c0 {
|
||||
eeprom@51 {
|
||||
compatible = "rohm,br24g01", "atmel,24c01";
|
||||
label = "breakout-board";
|
||||
reg = <0x51>;
|
||||
pagesize = <8>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -59,6 +59,161 @@
|
|||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
rwdt: watchdog@e6020000 {
|
||||
compatible = "renesas,r8a779g0-wdt",
|
||||
"renesas,rcar-gen4-wdt";
|
||||
reg = <0 0xe6020000 0 0x0c>;
|
||||
interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 907>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 907>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pfc: pinctrl@e6050000 {
|
||||
compatible = "renesas,pfc-r8a779g0";
|
||||
reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
|
||||
<0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
|
||||
<0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>,
|
||||
<0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>,
|
||||
<0 0xe6068000 0 0x16c>;
|
||||
};
|
||||
|
||||
gpio0: gpio@e6050180 {
|
||||
compatible = "renesas,gpio-r8a779g0",
|
||||
"renesas,rcar-gen4-gpio";
|
||||
reg = <0 0xe6050180 0 0x54>;
|
||||
interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 915>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 915>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pfc 0 0 19>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio1: gpio@e6050980 {
|
||||
compatible = "renesas,gpio-r8a779g0",
|
||||
"renesas,rcar-gen4-gpio";
|
||||
reg = <0 0xe6050980 0 0x54>;
|
||||
interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 915>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 915>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pfc 0 32 29>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio2: gpio@e6058180 {
|
||||
compatible = "renesas,gpio-r8a779g0",
|
||||
"renesas,rcar-gen4-gpio";
|
||||
reg = <0 0xe6058180 0 0x54>;
|
||||
interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 916>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 916>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pfc 0 64 20>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio3: gpio@e6058980 {
|
||||
compatible = "renesas,gpio-r8a779g0",
|
||||
"renesas,rcar-gen4-gpio";
|
||||
reg = <0 0xe6058980 0 0x54>;
|
||||
interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 916>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 916>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pfc 0 96 30>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio4: gpio@e6060180 {
|
||||
compatible = "renesas,gpio-r8a779g0",
|
||||
"renesas,rcar-gen4-gpio";
|
||||
reg = <0 0xe6060180 0 0x54>;
|
||||
interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 917>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 917>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pfc 0 128 25>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio5: gpio@e6060980 {
|
||||
compatible = "renesas,gpio-r8a779g0",
|
||||
"renesas,rcar-gen4-gpio";
|
||||
reg = <0 0xe6060980 0 0x54>;
|
||||
interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 917>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 917>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pfc 0 160 21>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio6: gpio@e6061180 {
|
||||
compatible = "renesas,gpio-r8a779g0",
|
||||
"renesas,rcar-gen4-gpio";
|
||||
reg = <0 0xe6061180 0 0x54>;
|
||||
interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 917>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 917>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pfc 0 192 21>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio7: gpio@e6061980 {
|
||||
compatible = "renesas,gpio-r8a779g0",
|
||||
"renesas,rcar-gen4-gpio";
|
||||
reg = <0 0xe6061980 0 0x54>;
|
||||
interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 917>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 917>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pfc 0 224 21>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio8: gpio@e6068180 {
|
||||
compatible = "renesas,gpio-r8a779g0",
|
||||
"renesas,rcar-gen4-gpio";
|
||||
reg = <0 0xe6068180 0 0x54>;
|
||||
interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 918>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 918>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pfc 0 256 14>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
cpg: clock-controller@e6150000 {
|
||||
compatible = "renesas,r8a779g0-cpg-mssr";
|
||||
reg = <0 0xe6150000 0 0x4000>;
|
||||
|
|
@ -80,12 +235,96 @@
|
|||
#power-domain-cells = <1>;
|
||||
};
|
||||
|
||||
i2c0: i2c@e6500000 {
|
||||
compatible = "renesas,i2c-r8a779g0",
|
||||
"renesas,rcar-gen4-i2c";
|
||||
reg = <0 0xe6500000 0 0x40>;
|
||||
interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 518>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 518>;
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@e6508000 {
|
||||
compatible = "renesas,i2c-r8a779g0",
|
||||
"renesas,rcar-gen4-i2c";
|
||||
reg = <0 0xe6508000 0 0x40>;
|
||||
interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 519>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 519>;
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@e6510000 {
|
||||
compatible = "renesas,i2c-r8a779g0",
|
||||
"renesas,rcar-gen4-i2c";
|
||||
reg = <0 0xe6510000 0 0x40>;
|
||||
interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 520>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 520>;
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c3: i2c@e66d0000 {
|
||||
compatible = "renesas,i2c-r8a779g0",
|
||||
"renesas,rcar-gen4-i2c";
|
||||
reg = <0 0xe66d0000 0 0x40>;
|
||||
interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 521>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 521>;
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c4: i2c@e66d8000 {
|
||||
compatible = "renesas,i2c-r8a779g0",
|
||||
"renesas,rcar-gen4-i2c";
|
||||
reg = <0 0xe66d8000 0 0x40>;
|
||||
interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 522>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 522>;
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c5: i2c@e66e0000 {
|
||||
compatible = "renesas,i2c-r8a779g0",
|
||||
"renesas,rcar-gen4-i2c";
|
||||
reg = <0 0xe66e0000 0 0x40>;
|
||||
interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hscif0: serial@e6540000 {
|
||||
compatible = "renesas,hscif-r8a779g0",
|
||||
"renesas,rcar-gen4-hscif",
|
||||
"renesas,hscif";
|
||||
reg = <0 0xe6540000 0 96>;
|
||||
interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 514>,
|
||||
<&cpg CPG_CORE R8A779G0_CLK_S0D3_PER>,
|
||||
<&scif_clk>;
|
||||
|
|
@ -95,6 +334,147 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
avb0: ethernet@e6800000 {
|
||||
compatible = "renesas,etheravb-r8a779g0",
|
||||
"renesas,etheravb-rcar-gen4";
|
||||
reg = <0 0xe6800000 0 0x800>;
|
||||
interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
|
||||
"ch5", "ch6", "ch7", "ch8", "ch9",
|
||||
"ch10", "ch11", "ch12", "ch13",
|
||||
"ch14", "ch15", "ch16", "ch17",
|
||||
"ch18", "ch19", "ch20", "ch21",
|
||||
"ch22", "ch23", "ch24";
|
||||
clocks = <&cpg CPG_MOD 211>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 211>;
|
||||
phy-mode = "rgmii";
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
avb1: ethernet@e6810000 {
|
||||
compatible = "renesas,etheravb-r8a779g0",
|
||||
"renesas,etheravb-rcar-gen4";
|
||||
reg = <0 0xe6810000 0 0x800>;
|
||||
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
|
||||
"ch5", "ch6", "ch7", "ch8", "ch9",
|
||||
"ch10", "ch11", "ch12", "ch13",
|
||||
"ch14", "ch15", "ch16", "ch17",
|
||||
"ch18", "ch19", "ch20", "ch21",
|
||||
"ch22", "ch23", "ch24";
|
||||
clocks = <&cpg CPG_MOD 212>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 212>;
|
||||
phy-mode = "rgmii";
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
avb2: ethernet@e6820000 {
|
||||
compatible = "renesas,etheravb-r8a779g0",
|
||||
"renesas,etheravb-rcar-gen4";
|
||||
reg = <0 0xe6820000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
|
||||
"ch5", "ch6", "ch7", "ch8", "ch9",
|
||||
"ch10", "ch11", "ch12", "ch13",
|
||||
"ch14", "ch15", "ch16", "ch17",
|
||||
"ch18", "ch19", "ch20", "ch21",
|
||||
"ch22", "ch23", "ch24";
|
||||
clocks = <&cpg CPG_MOD 213>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 213>;
|
||||
phy-mode = "rgmii";
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gic: interrupt-controller@f1000000 {
|
||||
compatible = "arm,gic-v3";
|
||||
#interrupt-cells = <3>;
|
||||
|
|
|
|||
|
|
@ -619,7 +619,7 @@
|
|||
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
||||
sdhi0: mmc@11c00000 {
|
||||
sdhi0: mmc@11c00000 {
|
||||
compatible = "renesas,sdhi-r9a07g043",
|
||||
"renesas,rcar-gen3-sdhi";
|
||||
reg = <0x0 0x11c00000 0 0x10000>;
|
||||
|
|
|
|||
|
|
@ -6,7 +6,19 @@
|
|||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/*
|
||||
* DIP-Switch SW1 setting
|
||||
* 1 : High; 0: Low
|
||||
* SW1-2 : SW_SD0_DEV_SEL (0: uSD; 1: eMMC)
|
||||
* SW1-3 : SW_ET0_EN_N (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
|
||||
* Please change below macros according to SW1 setting on the SoM
|
||||
*/
|
||||
#define SW_SW0_DEV_SEL 1
|
||||
#define SW_ET0_EN_N 1
|
||||
|
||||
#include "r9a07g043.dtsi"
|
||||
#include "rzg2ul-smarc-som.dtsi"
|
||||
#include "rzg2ul-smarc.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
|
|||
|
|
@ -778,7 +778,7 @@
|
|||
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
||||
sdhi0: mmc@11c00000 {
|
||||
sdhi0: mmc@11c00000 {
|
||||
compatible = "renesas,sdhi-r9a07g044",
|
||||
"renesas,rcar-gen3-sdhi";
|
||||
reg = <0x0 0x11c00000 0 0x10000>;
|
||||
|
|
|
|||
|
|
@ -784,7 +784,7 @@
|
|||
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
||||
sdhi0: mmc@11c00000 {
|
||||
sdhi0: mmc@11c00000 {
|
||||
compatible = "renesas,sdhi-r9a07g054",
|
||||
"renesas,rcar-gen3-sdhi";
|
||||
reg = <0x0 0x11c00000 0 0x10000>;
|
||||
|
|
|
|||
|
|
@ -263,8 +263,3 @@
|
|||
status = "okay";
|
||||
timeout-sec = <60>;
|
||||
};
|
||||
|
||||
&wdt2 {
|
||||
status = "okay";
|
||||
timeout-sec = <60>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -5,17 +5,6 @@
|
|||
* Copyright (C) 2022 Renesas Electronics Corp.
|
||||
*/
|
||||
|
||||
/*
|
||||
* DIP-Switch SW1 setting
|
||||
* 1 : High; 0: Low
|
||||
* SW1-2 : SW_SD0_DEV_SEL (0: uSD; 1: eMMC)
|
||||
* SW1-3 : SW_ET0_EN_N (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
|
||||
* Please change below macros according to SW1 setting
|
||||
*/
|
||||
#define SW_SW0_DEV_SEL 1
|
||||
#define SW_ET0_EN_N 1
|
||||
|
||||
#include "rzg2ul-smarc-som.dtsi"
|
||||
#include "rzg2ul-smarc-pinfunction.dtsi"
|
||||
#include "rz-smarc-common.dtsi"
|
||||
|
||||
|
|
|
|||
Загрузка…
Ссылка в новой задаче