Second Round of Renesas ARM Based SoC DT Updates for v3.17
* Extend hardware coverage - Add DVC support for sound nodes on r8a7791 and r8a7790 - Enable internal PCI on r8a7790/lager -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJTsf/yAAoJENfPZGlqN0++Rr4P/iG5eJncnXdpV/Q0MjL7RJK1 g1/cGiKUdZK4sdmFElX5CoXsQvncr4eH97cHbvcpzyH1WV4Z5OlyN9JxZAYJ8dY4 OGq6a4xrZsTQYypTSpxj2TODxf4h0sRiVX8Bj304jZMyASaKR6Ie7ZyBQRlrN8CC 6tbGVIZE47pRpyZhAUL3GJzXrWKgSi7iCtRpHoz5y85vWZQZNGKbZT9WBBEDeb4e R3NUPt976Ng0+v72B8x7lxllwwNeRqILSsk546xBoYwnCwIJzWF5PHPkMEbPPtN+ no42tIBy+8iqBJgcRZK7urV0pkQ0buVBmYviCjFtfoQG55ta7zTQnLbe+zln6EhH m0V098IBitFGtpvInE573kPY+7Bt8/olWGq+rOzTIiIcDHo493L/VhoO5n0+gYl5 NZOjrrwopyg2zgCgXLN7EgnX4LR+G2m7OBZX/zMaSg0XY6KnhaY5olR97qmfDQua ZAhXHOqWF8Tk6GRUWpgRZesAef+6jXM3NPUYsvDjLTDpDPwMJwHxisFR0YtHdz56 dQS+PyPGB7YyuV7L3gl68iMqBKYJspxSW4aTG28oZruueNFMLnzRU3MX0PmhuiBq wqChQgJI6XGKppYjpqlbupfkMcpC5QTubLrIG+MI6eE5lIRBCiXflPCoynvkn/Nv NrATzYA85/Mt4fdZdDBz =6laJ -----END PGP SIGNATURE----- Merge tag 'renesas-dt2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Second Round of Renesas ARM Based SoC DT Updates for v3.17" from Simon Horman: - Extend hardware coverage * Add DVC support for sound nodes on r8a7791 and r8a7790 * Enable internal PCI on r8a7790/lager * tag 'renesas-dt2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791: add DVC support for sound node on DTSI ARM: shmobile: r8a7790: add DVC support for sound node on DTSI ARM: shmobile: lager: enable internal PCI ARM: shmobile: r8a7790: add internal PCI bridge nodes Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
Коммит
c38114f393
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@ -219,6 +219,21 @@
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renesas,groups = "i2c3";
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renesas,function = "i2c3";
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};
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usb0_pins: usb0 {
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renesas,groups = "usb0";
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renesas,function = "usb0";
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};
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usb1_pins: usb1 {
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renesas,groups = "usb1";
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renesas,function = "usb1";
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};
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usb2_pins: usb2 {
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renesas,groups = "usb2";
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renesas,function = "usb2";
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};
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};
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ðer {
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@ -368,3 +383,21 @@
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regulator-always-on;
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};
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};
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&pci0 {
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status = "okay";
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pinctrl-0 = <&usb0_pins>;
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pinctrl-names = "default";
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};
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&pci1 {
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status = "okay";
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pinctrl-0 = <&usb1_pins>;
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pinctrl-names = "default";
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};
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&pci2 {
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status = "okay";
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pinctrl-0 = <&usb2_pins>;
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pinctrl-names = "default";
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};
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@ -930,6 +930,66 @@
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status = "disabled";
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};
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pci0: pci@ee090000 {
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compatible = "renesas,pci-r8a7790";
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device_type = "pci";
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clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
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reg = <0 0xee090000 0 0xc00>,
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<0 0xee080000 0 0x1100>;
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interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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bus-range = <0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
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interrupt-map-mask = <0xff00 0 0 0x7>;
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interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
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0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
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0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci1: pci@ee0b0000 {
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compatible = "renesas,pci-r8a7790";
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device_type = "pci";
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clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
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reg = <0 0xee0b0000 0 0xc00>,
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<0 0xee0a0000 0 0x1100>;
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interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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bus-range = <1 1>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
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interrupt-map-mask = <0xff00 0 0 0x7>;
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interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
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0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
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0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>;
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};
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pci2: pci@ee0d0000 {
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compatible = "renesas,pci-r8a7790";
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device_type = "pci";
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clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
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reg = <0 0xee0d0000 0 0xc00>,
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<0 0xee0c0000 0 0x1100>;
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interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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bus-range = <2 2>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
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interrupt-map-mask = <0xff00 0 0 0x7>;
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interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
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0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
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0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
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};
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pciec: pcie@fe000000 {
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compatible = "renesas,pcie-r8a7790";
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reg = <0 0xfe000000 0 0x80000>;
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@ -974,16 +1034,23 @@
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<&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
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<&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
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<&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
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<&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
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<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
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clock-names = "ssi-all",
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"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
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"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
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"src.9", "src.8", "src.7", "src.6", "src.5",
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"src.4", "src.3", "src.2", "src.1", "src.0",
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"dvc.0", "dvc.1",
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"clk_a", "clk_b", "clk_c", "clk_i";
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status = "disabled";
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rcar_sound,dvc {
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dvc0: dvc@0 { };
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dvc1: dvc@1 { };
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};
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rcar_sound,src {
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src0: src@0 { };
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src1: src@1 { };
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@ -1005,16 +1005,23 @@
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<&mstp10_clks R8A7791_CLK_SCU_SRC5>, <&mstp10_clks R8A7791_CLK_SCU_SRC4>,
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<&mstp10_clks R8A7791_CLK_SCU_SRC3>, <&mstp10_clks R8A7791_CLK_SCU_SRC2>,
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<&mstp10_clks R8A7791_CLK_SCU_SRC1>, <&mstp10_clks R8A7791_CLK_SCU_SRC0>,
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<&mstp10_clks R8A7791_CLK_SCU_DVC0>, <&mstp10_clks R8A7791_CLK_SCU_DVC1>,
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<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
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clock-names = "ssi-all",
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"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
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"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
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"src.9", "src.8", "src.7", "src.6", "src.5",
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"src.4", "src.3", "src.2", "src.1", "src.0",
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"dvc.0", "dvc.1",
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"clk_a", "clk_b", "clk_c", "clk_i";
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status = "disabled";
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rcar_sound,dvc {
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dvc0: dvc@0 { };
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dvc1: dvc@1 { };
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};
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rcar_sound,src {
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src0: src@0 { };
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src1: src@1 { };
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