arm64: dts: marvell: armada-3720-espressobin: declare PCIe PHY
The PCIe node is wired to the second PHY of the COMPHY IP. Suggested-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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@ -46,6 +46,7 @@
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/* J9 */
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/* J9 */
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&pcie0 {
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&pcie0 {
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status = "okay";
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status = "okay";
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phys = <&comphy1 0>;
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
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pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
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};
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};
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