sh: sh7712 clock support
This patch provides specific clock support for the SH7712. Signed-off-by: Andrew Murray <amurray@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -22,5 +22,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7720) := clock-sh7710.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7712) := clock-sh7712.o
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obj-y += $(clock-y)
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@ -0,0 +1,71 @@
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/*
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* arch/sh/kernel/cpu/sh3/clock-sh7712.c
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*
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* SH7712 support for the clock framework
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*
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* Copyright (C) 2007 Andrew Murray <amurray@mpc-data.co.uk>
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*
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* Based on arch/sh/kernel/cpu/sh3/clock-sh3.c
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* Copyright (C) 2005 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <asm/clock.h>
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#include <asm/freq.h>
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#include <asm/io.h>
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static int multipliers[] = { 1, 2, 3 };
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static int divisors[] = { 1, 2, 3, 4, 6 };
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static void master_clk_init(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = (frqcr & 0x0300) >> 8;
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clk->rate *= multipliers[idx];
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}
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static struct clk_ops sh7712_master_clk_ops = {
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.init = master_clk_init,
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};
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static void module_clk_recalc(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = frqcr & 0x0007;
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clk->rate = clk->parent->rate / divisors[idx];
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}
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static struct clk_ops sh7712_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static void cpu_clk_recalc(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = (frqcr & 0x0030) >> 4;
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clk->rate = clk->parent->rate / divisors[idx];
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}
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static struct clk_ops sh7712_cpu_clk_ops = {
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.recalc = cpu_clk_recalc,
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};
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static struct clk_ops *sh7712_clk_ops[] = {
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&sh7712_master_clk_ops,
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&sh7712_module_clk_ops,
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&sh7712_cpu_clk_ops,
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};
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void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
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{
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if (idx < ARRAY_SIZE(sh7712_clk_ops))
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*ops = sh7712_clk_ops[idx];
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}
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@ -10,7 +10,12 @@
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#ifndef __ASM_CPU_SH3_FREQ_H
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#define __ASM_CPU_SH3_FREQ_H
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#ifdef CONFIG_CPU_SUBTYPE_SH7712
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#define FRQCR 0xA415FF80
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#else
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#define FRQCR 0xffffff80
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#endif
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#define MIN_DIVISOR_NR 0
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#define MAX_DIVISOR_NR 4
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