arm64: dts: qcom: sc7280: Add nodes to boot WPSS
Add miscellaneous nodes to boot the Wireless Processor Subsystem (WPSS) on SC7280 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/1619508824-14413-6-git-send-email-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Sibi Sankar
Bjorn Andersson
Родитель
a1dff44b35
Коммит
c3bbe55c94
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@ -11,6 +11,8 @@
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#include <dt-bindings/mailbox/qcom-ipcc.h>
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#include <dt-bindings/power/qcom-aoss-qmp.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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#include <dt-bindings/reset/qcom,sdm845-aoss.h>
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#include <dt-bindings/reset/qcom,sdm845-pdc.h>
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#include <dt-bindings/soc/qcom,rpmh-rsc.h>
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#include <dt-bindings/thermal/thermal.h>
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@ -52,6 +54,11 @@
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no-map;
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};
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smem_mem: memory@80900000 {
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reg = <0x0 0x80900000 0x0 0x200000>;
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no-map;
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};
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cpucp_mem: memory@80b00000 {
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no-map;
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reg = <0x0 0x80b00000 0x0 0x100000>;
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@ -268,6 +275,119 @@
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};
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};
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smem {
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compatible = "qcom,smem";
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memory-region = <&smem_mem>;
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hwlocks = <&tcsr_mutex 3>;
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};
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smp2p-adsp {
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compatible = "qcom,smp2p";
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qcom,smem = <443>, <429>;
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interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
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IPCC_MPROC_SIGNAL_SMP2P
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_CLIENT_LPASS
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IPCC_MPROC_SIGNAL_SMP2P>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <2>;
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adsp_smp2p_out: master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <1>;
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};
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adsp_smp2p_in: slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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smp2p-cdsp {
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compatible = "qcom,smp2p";
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qcom,smem = <94>, <432>;
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interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
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IPCC_MPROC_SIGNAL_SMP2P
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_CLIENT_CDSP
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IPCC_MPROC_SIGNAL_SMP2P>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <5>;
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cdsp_smp2p_out: master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <1>;
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};
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cdsp_smp2p_in: slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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smp2p-mpss {
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compatible = "qcom,smp2p";
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qcom,smem = <435>, <428>;
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interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
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IPCC_MPROC_SIGNAL_SMP2P
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_CLIENT_MPSS
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IPCC_MPROC_SIGNAL_SMP2P>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <1>;
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modem_smp2p_out: master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <1>;
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};
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modem_smp2p_in: slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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ipa_smp2p_out: ipa-ap-to-modem {
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qcom,entry-name = "ipa";
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#qcom,smem-state-cells = <1>;
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};
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ipa_smp2p_in: ipa-modem-to-ap {
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qcom,entry-name = "ipa";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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smp2p-wpss {
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compatible = "qcom,smp2p";
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qcom,smem = <617>, <616>;
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interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
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IPCC_MPROC_SIGNAL_SMP2P
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_CLIENT_WPSS
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IPCC_MPROC_SIGNAL_SMP2P>;
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qcom,local-pid = <0>;
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qcom,remote-pid = <13>;
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wpss_smp2p_out: master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <1>;
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};
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wpss_smp2p_in: slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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pmu {
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compatible = "arm,armv8-pmuv3";
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interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
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@ -333,6 +453,12 @@
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};
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};
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tcsr_mutex: hwlock@1f40000 {
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compatible = "qcom,tcsr-mutex", "syscon";
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reg = <0 0x01f40000 0 0x40000>;
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#hwlock-cells = <1>;
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};
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lpasscc: lpasscc@3000000 {
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compatible = "qcom,sc7280-lpasscc";
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reg = <0 0x03000000 0 0x40>,
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@ -896,6 +1022,12 @@
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interrupt-controller;
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};
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pdc_reset: reset-controller@b5e0000 {
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compatible = "qcom,sc7280-pdc-global";
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reg = <0 0x0b5e0000 0 0x20000>;
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#reset-cells = <1>;
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};
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tsens0: thermal-sensor@c263000 {
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compatible = "qcom,sc7280-tsens","qcom,tsens-v2";
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reg = <0 0x0c263000 0 0x1ff>, /* TM */
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@ -918,6 +1050,12 @@
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#thermal-sensor-cells = <1>;
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};
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aoss_reset: reset-controller@c2a0000 {
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compatible = "qcom,sc7280-aoss-cc", "qcom,sdm845-aoss-cc";
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reg = <0 0x0c2a0000 0 0x31000>;
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#reset-cells = <1>;
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};
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aoss_qmp: power-controller@c300000 {
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compatible = "qcom,sc7280-aoss-qmp";
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reg = <0 0x0c300000 0 0x100000>;
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