edac: fix module initialization on several modules 2nd time
I implemented opstate_init() as a inline function in linux/edac.h. added calling opstate_init() to: i82443bxgx_edac.c i82860_edac.c i82875p_edac.c i82975x_edac.c I wrote a fixed patch of edac-fix-module-initialization-on-several-modules.patch, and tested building 2.6.25-rc7 with applying this. It was succeed. I think the patch is now correct. Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Hitoshi Mitake <h.mitake@gmail.com> Signed-off-by: Doug Thompson <dougthompson@xmission.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
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1a45027d1a
Коммит
c3c52bce69
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@ -17,6 +17,7 @@
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/slab.h>
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#include <linux/edac.h>
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#include "edac_core.h"
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#define AMD76X_REVISION " Ver: 2.0.2 " __DATE__
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@ -344,6 +345,9 @@ static struct pci_driver amd76x_driver = {
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static int __init amd76x_init(void)
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{
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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return pci_register_driver(&amd76x_driver);
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}
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@ -358,3 +362,6 @@ module_exit(amd76x_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh");
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MODULE_DESCRIPTION("MC support for AMD 76x memory controllers");
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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@ -1117,16 +1117,6 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
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debugf0("%s(): mci\n", __func__);
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debugf0("Starting Probe1\n");
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/* make sure error reporting method is sane */
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switch (edac_op_state) {
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case EDAC_OPSTATE_POLL:
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case EDAC_OPSTATE_NMI:
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break;
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default:
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edac_op_state = EDAC_OPSTATE_POLL;
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break;
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}
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/* check to see if device 0 function 1 is enabled; if it isn't, we
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* assume the BIOS has reserved it for a reason and is expecting
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* exclusive access, we take care not to violate that assumption and
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@ -1303,6 +1293,10 @@ static int __init e752x_init(void)
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int pci_rc;
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debugf3("%s()\n", __func__);
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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pci_rc = pci_register_driver(&e752x_driver);
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return (pci_rc < 0) ? pci_rc : 0;
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}
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@ -1323,6 +1317,7 @@ MODULE_DESCRIPTION("MC support for Intel e752x/3100 memory controllers");
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module_param(force_function_unhide, int, 0444);
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MODULE_PARM_DESC(force_function_unhide, "if BIOS sets Dev0:Fun1 up as hidden:"
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" 1=force unhide and hope BIOS doesn't fight driver for Dev0:Fun1 access");
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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@ -414,16 +414,6 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
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debugf0("%s(): mci\n", __func__);
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/* make sure error reporting method is sane */
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switch (edac_op_state) {
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case EDAC_OPSTATE_POLL:
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case EDAC_OPSTATE_NMI:
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break;
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default:
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edac_op_state = EDAC_OPSTATE_POLL;
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break;
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}
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pci_read_config_dword(pdev, E7XXX_DRC, &drc);
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drc_chan = dual_channel_active(drc, dev_idx);
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@ -565,6 +555,9 @@ static struct pci_driver e7xxx_driver = {
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static int __init e7xxx_init(void)
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{
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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return pci_register_driver(&e7xxx_driver);
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}
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@ -326,15 +326,6 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)
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return -ENODEV;
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}
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switch (edac_op_state) {
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case EDAC_OPSTATE_POLL:
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case EDAC_OPSTATE_NMI:
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break;
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default:
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edac_op_state = EDAC_OPSTATE_POLL;
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break;
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}
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c0dra[0] = readb(window + I3000_C0DRA + 0); /* ranks 0,1 */
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c0dra[1] = readb(window + I3000_C0DRA + 1); /* ranks 2,3 */
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c1dra[0] = readb(window + I3000_C1DRA + 0); /* ranks 0,1 */
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@ -503,6 +494,10 @@ static int __init i3000_init(void)
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int pci_rc;
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debugf3("MC: %s()\n", __func__);
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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pci_rc = pci_register_driver(&i3000_driver);
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if (pci_rc < 0)
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goto fail0;
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@ -1286,16 +1286,6 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx)
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if (PCI_FUNC(pdev->devfn) != 0)
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return -ENODEV;
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/* make sure error reporting method is sane */
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switch (edac_op_state) {
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case EDAC_OPSTATE_POLL:
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case EDAC_OPSTATE_NMI:
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break;
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default:
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edac_op_state = EDAC_OPSTATE_POLL;
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break;
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}
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/* Ask the devices for the number of CSROWS and CHANNELS so
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* that we can calculate the memory resources, etc
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*
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@ -1478,6 +1468,9 @@ static int __init i5000_init(void)
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debugf2("MC: " __FILE__ ": %s()\n", __func__);
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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pci_rc = pci_register_driver(&i5000_driver);
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return (pci_rc < 0) ? pci_rc : 0;
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@ -1501,5 +1494,6 @@ MODULE_AUTHOR
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("Linux Networx (http://lnxi.com) Doug Thompson <norsk5@xmission.com>");
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MODULE_DESCRIPTION("MC Driver for Intel I5000 memory controllers - "
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I5000_REVISION);
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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@ -29,6 +29,7 @@
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#include <linux/slab.h>
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#include <linux/edac.h>
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#include "edac_core.h"
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#define I82443_REVISION "0.1"
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@ -386,6 +387,9 @@ static struct pci_driver i82443bxgx_edacmc_driver = {
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static int __init i82443bxgx_edacmc_init(void)
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{
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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return pci_register_driver(&i82443bxgx_edacmc_driver);
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}
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@ -400,3 +404,6 @@ module_exit(i82443bxgx_edacmc_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Tim Small <tim@buttersideup.com> - WPAD");
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MODULE_DESCRIPTION("EDAC MC support for Intel 82443BX/GX memory controllers");
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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@ -14,6 +14,7 @@
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/slab.h>
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#include <linux/edac.h>
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#include "edac_core.h"
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#define I82860_REVISION " Ver: 2.0.2 " __DATE__
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@ -294,6 +295,9 @@ static int __init i82860_init(void)
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debugf3("%s()\n", __func__);
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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if ((pci_rc = pci_register_driver(&i82860_driver)) < 0)
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goto fail0;
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@ -345,3 +349,6 @@ MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com) "
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"Ben Woodard <woodard@redhat.com>");
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MODULE_DESCRIPTION("ECC support for Intel 82860 memory hub controllers");
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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@ -18,6 +18,7 @@
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/slab.h>
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#include <linux/edac.h>
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#include "edac_core.h"
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#define I82875P_REVISION " Ver: 2.0.2 " __DATE__
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@ -393,6 +394,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
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struct i82875p_error_info discard;
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debugf0("%s()\n", __func__);
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ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
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if (i82875p_setup_overfl_dev(pdev, &ovrfl_pdev, &ovrfl_window))
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int pci_rc;
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debugf3("%s()\n", __func__);
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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pci_rc = pci_register_driver(&i82875p_driver);
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if (pci_rc < 0)
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@ -586,3 +592,6 @@ module_exit(i82875p_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh");
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MODULE_DESCRIPTION("MC support for Intel 82875 memory hub controllers");
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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@ -14,7 +14,7 @@
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/slab.h>
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#include <linux/edac.h>
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#include "edac_core.h"
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#define I82975X_REVISION " Ver: 1.0.0 " __DATE__
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@ -611,6 +611,9 @@ static int __init i82975x_init(void)
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debugf3("%s()\n", __func__);
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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pci_rc = pci_register_driver(&i82975x_driver);
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if (pci_rc < 0)
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goto fail0;
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@ -664,3 +667,6 @@ module_exit(i82975x_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Arvind R. <arvind@acarlab.com>");
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MODULE_DESCRIPTION("MC support for Intel 82975 memory hub controllers");
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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@ -284,6 +284,9 @@ static struct pci_driver pasemi_edac_driver = {
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static int __init pasemi_edac_init(void)
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{
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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return pci_register_driver(&pasemi_edac_driver);
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}
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@ -298,3 +301,6 @@ module_exit(pasemi_edac_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
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MODULE_DESCRIPTION("MC support for PA Semi PWRficient memory controller");
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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@ -20,6 +20,7 @@
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/slab.h>
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#include <linux/edac.h>
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#include "edac_core.h"
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#define R82600_REVISION " Ver: 2.0.2 " __DATE__
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@ -393,6 +394,9 @@ static struct pci_driver r82600_driver = {
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static int __init r82600_init(void)
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{
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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return pci_register_driver(&r82600_driver);
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}
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@ -412,3 +416,6 @@ MODULE_DESCRIPTION("MC support for Radisys 82600 memory controllers");
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module_param(disable_hardware_scrub, bool, 0644);
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MODULE_PARM_DESC(disable_hardware_scrub,
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"If set, disable the chipset's automatic scrub for CEs");
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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@ -3,7 +3,7 @@
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*
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* Author: Dave Jiang <djiang@mvista.com>
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*
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* 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
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* 2006-2008 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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@ -26,4 +26,16 @@ extern atomic_t edac_handlers;
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extern int edac_handler_set(void);
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extern void edac_atomic_assert_error(void);
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static inline void opstate_init(void)
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{
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switch (edac_op_state) {
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case EDAC_OPSTATE_POLL:
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case EDAC_OPSTATE_NMI:
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break;
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default:
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edac_op_state = EDAC_OPSTATE_POLL;
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}
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return;
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}
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#endif
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