iio: mma8452: refactor for seperating chip specific data
This adds a struct mma_chip_info to hold data that will remain specific to the chip in use. It is provided during probe() and linked in struct of_device_id. Also this suggests that the driver is called "mma8452" and now handles the MMA8452Q device, but is not limited to it. Signed-off-by: Martin Kepplinger <martin.kepplinger@theobroma-systems.com> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Martin Kepplinger
Jonathan Cameron
Родитель
afc7da6e48
Коммит
c3cdd6e48e
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@ -22,6 +22,7 @@
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/events.h>
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#include <linux/delay.h>
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#include <linux/of_device.h>
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#define MMA8452_STATUS 0x00
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#define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
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@ -74,6 +75,52 @@ struct mma8452_data {
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struct mutex lock;
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u8 ctrl_reg1;
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u8 data_cfg;
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const struct mma_chip_info *chip_info;
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};
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/**
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* struct mma_chip_info - chip specific data for Freescale's accelerometers
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* @chip_id: WHO_AM_I register's value
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* @channels: struct iio_chan_spec matching the device's
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* capabilities
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* @num_channels: number of channels
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* @mma_scales: scale factors for converting register values
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* to m/s^2; 3 modes: 2g, 4g, 8g; 2 integers
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* per mode: m/s^2 and micro m/s^2
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* @ev_cfg: event config register address
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* @ev_cfg_ele: latch bit in event config register
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* @ev_cfg_chan_shift: number of the bit to enable events in X
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* direction; in event config register
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* @ev_src: event source register address
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* @ev_src_xe: bit in event source register that indicates
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* an event in X direction
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* @ev_src_ye: bit in event source register that indicates
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* an event in Y direction
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* @ev_src_ze: bit in event source register that indicates
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* an event in Z direction
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* @ev_ths: event threshold register address
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* @ev_ths_mask: mask for the threshold value
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* @ev_count: event count (period) register address
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*
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* Since not all chips supported by the driver support comparing high pass
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* filtered data for events (interrupts), different interrupt sources are
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* used for different chips and the relevant registers are included here.
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*/
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struct mma_chip_info {
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u8 chip_id;
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const struct iio_chan_spec *channels;
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int num_channels;
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const int mma_scales[3][2];
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u8 ev_cfg;
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u8 ev_cfg_ele;
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u8 ev_cfg_chan_shift;
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u8 ev_src;
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u8 ev_src_xe;
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u8 ev_src_ye;
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u8 ev_src_ze;
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u8 ev_ths;
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u8 ev_ths_mask;
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u8 ev_count;
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};
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static int mma8452_drdy(struct mma8452_data *data)
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@ -143,16 +190,6 @@ static const int mma8452_samp_freq[8][2] = {
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{6, 250000}, {1, 560000}
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};
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/*
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* Hardware has fullscale of -2G, -4G, -8G corresponding to raw value -2048
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* The userspace interface uses m/s^2 and we declare micro units
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* So scale factor is given by:
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* g * N * 1000000 / 2048 for N = 2, 4, 8 and g = 9.80665
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*/
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static const int mma8452_scales[3][2] = {
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{0, 9577}, {0, 19154}, {0, 38307}
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};
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/* Datasheet table 35 (step time vs sample frequency) */
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static const int mma8452_transient_time_step_us[8] = {
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1250,
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@ -189,8 +226,11 @@ static ssize_t mma8452_show_scale_avail(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return mma8452_show_int_plus_micros(buf, mma8452_scales,
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ARRAY_SIZE(mma8452_scales));
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struct mma8452_data *data = iio_priv(i2c_get_clientdata(
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to_i2c_client(dev)));
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return mma8452_show_int_plus_micros(buf, data->chip_info->mma_scales,
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ARRAY_SIZE(data->chip_info->mma_scales));
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}
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static ssize_t mma8452_show_hp_cutoff_avail(struct device *dev,
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@ -221,9 +261,8 @@ static int mma8452_get_samp_freq_index(struct mma8452_data *data,
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static int mma8452_get_scale_index(struct mma8452_data *data, int val, int val2)
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{
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return mma8452_get_int_plus_micros_index(mma8452_scales,
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ARRAY_SIZE(mma8452_scales),
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val, val2);
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return mma8452_get_int_plus_micros_index(data->chip_info->mma_scales,
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ARRAY_SIZE(data->chip_info->mma_scales), val, val2);
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}
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static int mma8452_get_hp_filter_index(struct mma8452_data *data,
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@ -270,14 +309,15 @@ static int mma8452_read_raw(struct iio_dev *indio_dev,
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if (ret < 0)
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return ret;
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*val = sign_extend32(be16_to_cpu(buffer[chan->scan_index]) >> 4,
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11);
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*val = sign_extend32(be16_to_cpu(
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buffer[chan->scan_index]) >> chan->scan_type.shift,
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chan->scan_type.realbits - 1);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK;
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*val = mma8452_scales[i][0];
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*val2 = mma8452_scales[i][1];
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*val = data->chip_info->mma_scales[i][0];
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*val2 = data->chip_info->mma_scales[i][1];
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return IIO_VAL_INT_PLUS_MICRO;
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case IIO_CHAN_INFO_SAMP_FREQ:
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@ -439,17 +479,17 @@ static int mma8452_read_thresh(struct iio_dev *indio_dev,
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switch (info) {
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case IIO_EV_INFO_VALUE:
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ret = i2c_smbus_read_byte_data(data->client,
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MMA8452_TRANSIENT_THS);
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data->chip_info->ev_ths);
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if (ret < 0)
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return ret;
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*val = ret & MMA8452_TRANSIENT_THS_MASK;
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*val = ret & data->chip_info->ev_ths_mask;
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return IIO_VAL_INT;
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case IIO_EV_INFO_PERIOD:
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ret = i2c_smbus_read_byte_data(data->client,
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MMA8452_TRANSIENT_COUNT);
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data->chip_info->ev_count);
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if (ret < 0)
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return ret;
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@ -497,7 +537,8 @@ static int mma8452_write_thresh(struct iio_dev *indio_dev,
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if (val < 0 || val > MMA8452_TRANSIENT_THS_MASK)
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return -EINVAL;
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return mma8452_change_config(data, MMA8452_TRANSIENT_THS, val);
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return mma8452_change_config(data, data->chip_info->ev_ths,
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val);
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case IIO_EV_INFO_PERIOD:
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steps = (val * USEC_PER_SEC + val2) /
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@ -507,7 +548,7 @@ static int mma8452_write_thresh(struct iio_dev *indio_dev,
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if (steps < 0 || steps > 0xff)
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return -EINVAL;
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return mma8452_change_config(data, MMA8452_TRANSIENT_COUNT,
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return mma8452_change_config(data, data->chip_info->ev_count,
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steps);
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case IIO_EV_INFO_HIGH_PASS_FILTER_3DB:
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@ -538,13 +579,15 @@ static int mma8452_read_event_config(struct iio_dev *indio_dev,
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enum iio_event_direction dir)
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{
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struct mma8452_data *data = iio_priv(indio_dev);
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const struct mma_chip_info *chip = data->chip_info;
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int ret;
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ret = i2c_smbus_read_byte_data(data->client, MMA8452_TRANSIENT_CFG);
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ret = i2c_smbus_read_byte_data(data->client,
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data->chip_info->ev_cfg);
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if (ret < 0)
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return ret;
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return ret & MMA8452_TRANSIENT_CFG_CHAN(chan->scan_index) ? 1 : 0;
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return !!(ret & BIT(chan->scan_index + chip->ev_cfg_chan_shift));
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}
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static int mma8452_write_event_config(struct iio_dev *indio_dev,
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@ -554,20 +597,21 @@ static int mma8452_write_event_config(struct iio_dev *indio_dev,
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int state)
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{
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struct mma8452_data *data = iio_priv(indio_dev);
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const struct mma_chip_info *chip = data->chip_info;
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int val;
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val = i2c_smbus_read_byte_data(data->client, MMA8452_TRANSIENT_CFG);
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val = i2c_smbus_read_byte_data(data->client, chip->ev_cfg);
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if (val < 0)
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return val;
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if (state)
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val |= MMA8452_TRANSIENT_CFG_CHAN(chan->scan_index);
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val |= BIT(chan->scan_index + chip->ev_cfg_chan_shift);
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else
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val &= ~MMA8452_TRANSIENT_CFG_CHAN(chan->scan_index);
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val &= ~BIT(chan->scan_index + chip->ev_cfg_chan_shift);
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val |= MMA8452_TRANSIENT_CFG_ELE;
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return mma8452_change_config(data, MMA8452_TRANSIENT_CFG, val);
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return mma8452_change_config(data, chip->ev_cfg, val);
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}
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static void mma8452_transient_interrupt(struct iio_dev *indio_dev)
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@ -576,25 +620,25 @@ static void mma8452_transient_interrupt(struct iio_dev *indio_dev)
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s64 ts = iio_get_time_ns();
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int src;
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src = i2c_smbus_read_byte_data(data->client, MMA8452_TRANSIENT_SRC);
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src = i2c_smbus_read_byte_data(data->client, data->chip_info->ev_src);
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if (src < 0)
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return;
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if (src & MMA8452_TRANSIENT_SRC_XTRANSE)
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if (src & data->chip_info->ev_src_xe)
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iio_push_event(indio_dev,
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IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
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IIO_EV_TYPE_MAG,
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IIO_EV_DIR_RISING),
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ts);
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if (src & MMA8452_TRANSIENT_SRC_YTRANSE)
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if (src & data->chip_info->ev_src_ye)
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iio_push_event(indio_dev,
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IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Y,
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IIO_EV_TYPE_MAG,
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IIO_EV_DIR_RISING),
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ts);
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if (src & MMA8452_TRANSIENT_SRC_ZTRANSE)
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if (src & data->chip_info->ev_src_ze)
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iio_push_event(indio_dev,
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IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Z,
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IIO_EV_TYPE_MAG,
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@ -696,7 +740,7 @@ static struct attribute_group mma8452_event_attribute_group = {
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.name = "events",
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};
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#define MMA8452_CHANNEL(axis, idx) { \
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#define MMA8452_CHANNEL(axis, idx, bits) { \
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.type = IIO_ACCEL, \
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.modified = 1, \
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.channel2 = IIO_MOD_##axis, \
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@ -708,9 +752,9 @@ static struct attribute_group mma8452_event_attribute_group = {
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.scan_index = idx, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 12, \
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.realbits = (bits), \
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.storagebits = 16, \
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.shift = 4, \
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.shift = 16 - (bits), \
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.endianness = IIO_BE, \
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}, \
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.event_spec = mma8452_transient_event, \
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@ -718,12 +762,42 @@ static struct attribute_group mma8452_event_attribute_group = {
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}
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static const struct iio_chan_spec mma8452_channels[] = {
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MMA8452_CHANNEL(X, 0),
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MMA8452_CHANNEL(Y, 1),
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MMA8452_CHANNEL(Z, 2),
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MMA8452_CHANNEL(X, 0, 12),
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MMA8452_CHANNEL(Y, 1, 12),
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MMA8452_CHANNEL(Z, 2, 12),
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IIO_CHAN_SOFT_TIMESTAMP(3),
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};
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enum {
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mma8452,
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};
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static const struct mma_chip_info mma_chip_info_table[] = {
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[mma8452] = {
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.chip_id = MMA8452_DEVICE_ID,
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.channels = mma8452_channels,
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.num_channels = ARRAY_SIZE(mma8452_channels),
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/*
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* Hardware has fullscale of -2G, -4G, -8G corresponding to
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* raw value -2048 for 12 bit or -512 for 10 bit.
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* The userspace interface uses m/s^2 and we declare micro units
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* So scale factor for 12 bit here is given by:
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* g * N * 1000000 / 2048 for N = 2, 4, 8 and g=9.80665
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*/
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.mma_scales = { {0, 9577}, {0, 19154}, {0, 38307} },
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.ev_cfg = MMA8452_TRANSIENT_CFG,
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.ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
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.ev_cfg_chan_shift = 1,
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.ev_src = MMA8452_TRANSIENT_SRC,
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.ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE,
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.ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE,
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.ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE,
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.ev_ths = MMA8452_TRANSIENT_THS,
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.ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
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.ev_count = MMA8452_TRANSIENT_COUNT,
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},
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};
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static struct attribute *mma8452_attributes[] = {
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&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
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&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
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@ -841,12 +915,19 @@ static int mma8452_reset(struct i2c_client *client)
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return -ETIMEDOUT;
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}
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static const struct of_device_id mma8452_dt_ids[] = {
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{ .compatible = "fsl,mma8452", .data = &mma_chip_info_table[mma8452] },
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{ }
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};
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MODULE_DEVICE_TABLE(of, mma8452_dt_ids);
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static int mma8452_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct mma8452_data *data;
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struct iio_dev *indio_dev;
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int ret;
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const struct of_device_id *match;
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ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
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if (ret < 0)
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@ -854,6 +935,12 @@ static int mma8452_probe(struct i2c_client *client,
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if (ret != MMA8452_DEVICE_ID)
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return -ENODEV;
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match = of_match_device(mma8452_dt_ids, &client->dev);
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if (!match) {
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dev_err(&client->dev, "unknown device model\n");
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return -ENODEV;
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}
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indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
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if (!indio_dev)
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return -ENOMEM;
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@ -861,14 +948,18 @@ static int mma8452_probe(struct i2c_client *client,
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data = iio_priv(indio_dev);
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data->client = client;
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mutex_init(&data->lock);
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data->chip_info = match->data;
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dev_info(&client->dev, "registering %s accelerometer; ID 0x%x\n",
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match->compatible, data->chip_info->chip_id);
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i2c_set_clientdata(client, indio_dev);
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indio_dev->info = &mma8452_info;
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indio_dev->name = id->name;
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indio_dev->dev.parent = &client->dev;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = mma8452_channels;
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indio_dev->num_channels = ARRAY_SIZE(mma8452_channels);
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indio_dev->channels = data->chip_info->channels;
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indio_dev->num_channels = data->chip_info->num_channels;
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indio_dev->available_scan_masks = mma8452_scan_masks;
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ret = mma8452_reset(client);
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@ -987,17 +1078,11 @@ static SIMPLE_DEV_PM_OPS(mma8452_pm_ops, mma8452_suspend, mma8452_resume);
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#endif
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static const struct i2c_device_id mma8452_id[] = {
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{ "mma8452", 0 },
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{ "mma8452", mma8452 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, mma8452_id);
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static const struct of_device_id mma8452_dt_ids[] = {
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{ .compatible = "fsl,mma8452" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, mma8452_dt_ids);
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static struct i2c_driver mma8452_driver = {
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.driver = {
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.name = "mma8452",
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