TI K3 device tree updates for v6.4
New features: * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm * Add support for AM625 based BeaglePlay, AM62-LP-SK * Audio, RTC, watchdog support for AM625 * McSPI for J7200,j721e, j721s2, J784s4 * ADC for j721s2 * Crypto acceleration, CPSW2G for J784s4 Non critical fixes: AM62, AM62a: * Fix schematics error to increase DDR to 4GB on AM62a-SK * L2Cache size fix (AM62a/AM625) * ti,vbus-divider property to USB1 on AM625-SK * Gpio count fix for AM625 J7200,j721e, j721s2, J784s4, AM68, AM69: * ti,sci-dev-id for J784s4 NAVSS nodes * j721e-sk: Drop application specific firmware name * am68-sk: Fix the gpio expander lines for production version Cleanups: * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header). * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmQ0EJgACgkQ3bWEnRc2 JJ0SYRAApVR/RAGWBrYYAQ8oN+kIDaep3mHPtRMPtVwKyK0SU5FQZM7PWok2wdpH h0gw+1S4kZKcZsrz7153TzZHUNHtJ+TEG1g+EIhJh2OSV0SnqUOWucTS9nkt7MPs DvzbrF8RL9xCEi0dUtpBT+YEx0HF5AijkvjHWKBYI/XcbxmqrrQZ34wJxUR7qsFC nO8gADcQZjp14ZwP3b4Ag6jLMez2ERqZ3tM/if9WOlvpkQ3eI9e6Gjq5inMPjzNm gjqvN1gyWDi3pbG7Y+jrs/O26atnOTRAHUKww460x15nNi6a3qU1jN4awlBtANla UTu7CSuG1I6HWQaR2bGlWgkKxNOJAcfqtiCtMHsInYy7yDlwczC1KwWSFWdGxNoF 6yelo+X4oJhiQOqhVQdHpyCiT4HoyEWaS1tsXcke16N8X0fjdTWIq1deqXp5vLdE ne5FYQK1y+HyGJJGeDddbV9zuUQby9KoziB+N/VHWgDjUGWbrdmSEA6C3BNcF5+4 X6wd0NQPMc9sFVR5s3zGXrtozVMlkMuozCYlPVtaHDtNkGftGIq0KrsjQVIKiYwb GinjS8eM63p0PGiZRBf+49EkH/yC82svSM/XepEFUyvUPwYdm43zVUVz6tNqv3RT ms9wnzJpgRd+TcPn1xr5QojFxsnZjGr/Hb6mvbcU5S1OQfgkqZo= =zvF1 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5dgAACgkQYKtH/8kJ UieM1g//bYhlrB3jwoecovyxOocd85EnfP1ykwXvGVjF+UvHujfcH7ExZaCg3Km3 RQbMVLwynhGRBvys1YwPRh09FjOSKoZwpyly0ROFCP9Sc6QJLjtzb7zVAo7U3A5K rVZ/ZeG3/OLqB3l5ZaJS6zVJppnvm3R0CtVlRO9oD/XUdKhRDQPCaXZyD3oaMCjY bXNs1y/giESPCzwnR8qVvVHGQ6JoMtnznff1zgodYvuo9+e3xSIpTZvbRY1Aguc1 QbcaRISNqOpGsZHrUlw+PrPlIYQYb1osOq81R4g6NX3/J+UN9kz+uTb7f1xtrt+W tGbvVRQHNiRXHOC5fUGwxfcV3+M6YUKpCiap/l1brcchfeHb0La1+BN0dRMgybQf EG27jfHbAAEA8L7b1gutAY3yNfhJPvahWT/wQ0L4xhu33KpRSNwHBSkg6qXAFi1u aPWfRwm3bGpVoHltTVKdULqZb+bYKY/w8GfipbvCpI2LvX8MJrsFSxqFcSw1vgB7 iNYebbVUI+e/UUTEeKYE4ct98vezbGNBTxFcsPgVQL5UHAkYrzXHet3WuDP73hEz w+01eIaDA8R1TnpgTX4doqgEj6illiv6WY2EUwoJzBGc76UVOQf2eraimWGp1Vtr mh8tlfjnErTv+iMPcBO8bjvBXDhQcb4iBN+5q8KkVvqtOtcSsjA= =3wzd -----END PGP SIGNATURE----- Merge tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.4 New features: * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm * Add support for AM625 based BeaglePlay, AM62-LP-SK * Audio, RTC, watchdog support for AM625 * McSPI for J7200,j721e, j721s2, J784s4 * ADC for j721s2 * Crypto acceleration, CPSW2G for J784s4 Non critical fixes: AM62, AM62a: * Fix schematics error to increase DDR to 4GB on AM62a-SK * L2Cache size fix (AM62a/AM625) * ti,vbus-divider property to USB1 on AM625-SK * Gpio count fix for AM625 J7200,j721e, j721s2, J784s4, AM68, AM69: * ti,sci-dev-id for J784s4 NAVSS nodes * j721e-sk: Drop application specific firmware name * am68-sk: Fix the gpio expander lines for production version Cleanups: * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header). * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation * tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (34 commits) arm64: dts: ti: k3-j784s4-evm: Add eMMC mmc0 support arm64: dts: ti: Enable audio on SK-AM62(-LP) arm64: dts: ti: k3-am62-main: Add McASP nodes arm64: dts: ti: k3-j784s4: Add MCSPI nodes arm64: dts: ti: k3-j721s2: Add MCSPI nodes arm64: dts: ti: k3-j7200: Add MCSPI nodes arm64: dts: ti: k3-j721e: Add MCSPI nodes arm64: ti: dts: Add support for AM62x LP SK arm64: dts: ti: Refractor AM625 SK dts dt-bindings: arm: ti: k3: Add compatible for AM62x LP SK arm64: dts: ti: k3-am625-sk: Add ti,vbus-divider property to usbss1 arm64: dts: ti: k3-am68-sk-base-board: Update IO EXP GPIO lines for Rev E2 arm64: dts: ti: Add k3-am625-beagleplay dt-bindings: arm: ti: Add BeaglePlay arm64: dts: ti: k3-j7200: Add overlay to enable CPSW5G ports in QSGMII mode arm64: dts: ti: j7200-main: Add CPSW5G nodes arm64: dts: ti: k3-j721e: Add overlay to enable CPSW9G ports in QSGMII mode arm64: dts: ti: k3-j721e: Add CPSW9G nodes arm64: dts: ti: k3-j784s4-evm: Enable MCU CPSW2G arm64: dts: ti: k3-j721s2-common-proc-board: Add pinmux information for ADC ... Link: https://lore.kernel.org/r/20230410140521.3u3fftgnejakqnzj@shakable Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
Коммит
c47b89b418
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@ -28,7 +28,9 @@ properties:
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- description: K3 AM625 SoC
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items:
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- enum:
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- beagle,am625-beagleplay
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- ti,am625-sk
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- ti,am62-lp-sk
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- const: ti,am625
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- description: K3 AM642 SoC
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@ -222,7 +222,6 @@ additionalProperties: false
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examples:
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- |
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#include <dt-bindings/pinctrl/k3.h>
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#include <dt-bindings/soc/ti,sci_pm_domain.h>
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#include <dt-bindings/net/ti-dp83867.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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@ -9,7 +9,9 @@
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# alphabetically.
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# Boards with AM62x SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb
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# Boards with AM62Ax SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
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@ -28,11 +30,13 @@ dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-pg2.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board.dtb
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# Boards with J7200 SoC
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dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb
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k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-j7200-evm.dtb
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# Boards with J721e SoC
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k3-j721e-evm-dtbs := k3-j721e-common-proc-board.dtb k3-j721e-evm-quad-port-eth-exp.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-j721e-beagleboneai64.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-j721e-common-proc-board.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb
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# Boards with J721s2 SoC
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@ -0,0 +1,231 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* AM62x LP SK: https://www.ti.com/tool/SK-AM62-LP
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*
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* Copyright (C) 2021-2023 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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#include "k3-am62x-sk-common.dtsi"
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/ {
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compatible = "ti,am62-lp-sk", "ti,am625";
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model = "Texas Instruments AM62x LP SK";
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vmain_pd: regulator-0 {
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/* TPS65988 PD CONTROLLER OUTPUT */
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compatible = "regulator-fixed";
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regulator-name = "vmain_pd";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_5v0: regulator-1 {
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/* Output of TPS630702RNMR */
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compatible = "regulator-fixed";
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regulator-name = "vcc_5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_3v3_sys: regulator-2 {
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/* output of LM61460-Q1 */
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_sys";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_mmc1: regulator-3 {
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/* TPS22918DBVR */
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compatible = "regulator-fixed";
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regulator-name = "vdd_mmc1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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enable-active-high;
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vin-supply = <&vcc_3v3_sys>;
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gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
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};
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vddshv_sdio: regulator-4 {
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compatible = "regulator-gpio";
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regulator-name = "vddshv_sdio";
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pinctrl-names = "default";
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pinctrl-0 = <&vddshv_sdio_pins_default>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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vin-supply = <&ldo1_reg>;
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gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x0>,
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<3300000 0x1>;
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};
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};
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&main_pmx0 {
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vddshv_sdio_pins_default: vddshv-sdio-pins-default {
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pinctrl-single,pins = <
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AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */
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>;
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};
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main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default {
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pinctrl-single,pins = <
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AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (C13) UART0_RTSn.GPIO1_23 */
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>;
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};
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pmic_irq_pins_default: pmic-irq-pins-default {
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pinctrl-single,pins = <
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AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (B16) EXTINTn */
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>;
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};
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};
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&main_i2c1 {
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exp1: gpio@22 {
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compatible = "ti,tca6424";
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reg = <0x22>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
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"PRU_DETECT", "MMC1_SD_EN",
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"VPP_LDO_EN", "EXP_PS_3V3_En",
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"EXP_PS_5V0_En", "EXP_HAT_DETECT",
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"GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
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"UART1_FET_BUF_EN", "BT_UART_WAKE_SOC",
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"GPIO_HDMI_RSTn", "CSI_GPIO0",
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"CSI_GPIO1", "GPIO_OLDI_INT",
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"HDMI_INTn", "TEST_GPIO2",
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"MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
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"MCASP1_FET_SEL", "UART1_FET_SEL",
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"", "IO_EXP_TEST_LED";
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interrupt-parent = <&main_gpio1>;
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interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
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};
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exp2: gpio@23 {
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compatible = "ti,tca6424";
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reg = <0x23>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names = "", "",
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"", "",
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"", "",
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"", "",
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"WL_LT_EN", "CSI_RSTz",
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"", "",
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"", "",
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"", "",
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"SPI0_FET_SEL", "SPI0_FET_OE",
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"GPIO_OLDI_RSTn", "PRU_3V3_EN",
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"", "",
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"CSI_VLDO_SEL", "SOC_WLAN_SDIO_RST";
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};
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};
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&sdhci1 {
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vmmc-supply = <&vdd_mmc1>;
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vqmmc-supply = <&vddshv_sdio>;
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};
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&cpsw_port2 {
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status = "disabled";
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};
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&main_i2c0 {
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tps65219: pmic@30 {
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compatible = "ti,tps65219";
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reg = <0x30>;
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buck1-supply = <&vcc_3v3_sys>;
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buck2-supply = <&vcc_3v3_sys>;
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buck3-supply = <&vcc_3v3_sys>;
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ldo1-supply = <&vcc_3v3_sys>;
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ldo2-supply = <&buck2_reg>;
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ldo3-supply = <&vcc_3v3_sys>;
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ldo4-supply = <&vcc_3v3_sys>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_irq_pins_default>;
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interrupt-parent = <&gic500>;
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interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
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ti,power-button;
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regulators {
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buck1_reg: buck1 {
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regulator-name = "VDD_CORE";
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <750000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck2_reg: buck2 {
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regulator-name = "VCC1V8_SYS";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck3_reg: buck3 {
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regulator-name = "VDD_LPDDR4";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: ldo1 {
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regulator-name = "VDDSHV_SDIO";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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ldo2_reg: ldo2 {
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regulator-name = "VDDAR_CORE";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo3_reg: ldo3 {
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regulator-name = "VDDA_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo4_reg: ldo4 {
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regulator-name = "VDD_1V2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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};
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&tlv320aic3106 {
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DVDD-supply = <&buck2_reg>;
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};
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@ -461,7 +461,7 @@
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<193>, <194>, <195>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,ngpio = <87>;
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ti,ngpio = <92>;
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ti,davinci-gpio-unbanked = <0>;
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power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 77 0>;
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@ -478,7 +478,7 @@
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<183>, <184>, <185>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,ngpio = <88>;
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ti,ngpio = <52>;
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ti,davinci-gpio-unbanked = <0>;
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power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 78 0>;
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@ -758,6 +758,51 @@
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status = "disabled";
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};
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main_rti0: watchdog@e000000 {
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compatible = "ti,j7-rti-wdt";
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reg = <0x00 0x0e000000 0x00 0x100>;
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clocks = <&k3_clks 125 0>;
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power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
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assigned-clocks = <&k3_clks 125 0>;
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assigned-clock-parents = <&k3_clks 125 2>;
|
||||
};
|
||||
|
||||
main_rti1: watchdog@e010000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x0e010000 0x00 0x100>;
|
||||
clocks = <&k3_clks 126 0>;
|
||||
power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 126 0>;
|
||||
assigned-clock-parents = <&k3_clks 126 2>;
|
||||
};
|
||||
|
||||
main_rti2: watchdog@e020000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x0e020000 0x00 0x100>;
|
||||
clocks = <&k3_clks 127 0>;
|
||||
power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 127 0>;
|
||||
assigned-clock-parents = <&k3_clks 127 2>;
|
||||
};
|
||||
|
||||
main_rti3: watchdog@e030000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x0e030000 0x00 0x100>;
|
||||
clocks = <&k3_clks 128 0>;
|
||||
power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 128 0>;
|
||||
assigned-clock-parents = <&k3_clks 128 2>;
|
||||
};
|
||||
|
||||
main_rti15: watchdog@e0f0000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x0e0f0000 0x00 0x100>;
|
||||
clocks = <&k3_clks 130 0>;
|
||||
power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 130 0>;
|
||||
assigned-clock-parents = <&k3_clks 130 2>;
|
||||
};
|
||||
|
||||
epwm0: pwm@23000000 {
|
||||
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
|
|
@ -787,4 +832,64 @@
|
|||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcasp0: audio-controller@2b00000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
reg = <0x00 0x02b00000 0x00 0x2000>,
|
||||
<0x00 0x02b08000 0x00 0x400>;
|
||||
reg-names = "mpu", "dat";
|
||||
interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tx", "rx";
|
||||
|
||||
dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>;
|
||||
dma-names = "tx", "rx";
|
||||
|
||||
clocks = <&k3_clks 190 0>;
|
||||
clock-names = "fck";
|
||||
assigned-clocks = <&k3_clks 190 0>;
|
||||
assigned-clock-parents = <&k3_clks 190 2>;
|
||||
power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcasp1: audio-controller@2b10000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
reg = <0x00 0x02b10000 0x00 0x2000>,
|
||||
<0x00 0x02b18000 0x00 0x400>;
|
||||
reg-names = "mpu", "dat";
|
||||
interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tx", "rx";
|
||||
|
||||
dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>;
|
||||
dma-names = "tx", "rx";
|
||||
|
||||
clocks = <&k3_clks 191 0>;
|
||||
clock-names = "fck";
|
||||
assigned-clocks = <&k3_clks 191 0>;
|
||||
assigned-clock-parents = <&k3_clks 191 2>;
|
||||
power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcasp2: audio-controller@2b20000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
reg = <0x00 0x02b20000 0x00 0x2000>,
|
||||
<0x00 0x02b28000 0x00 0x400>;
|
||||
reg-names = "mpu", "dat";
|
||||
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tx", "rx";
|
||||
|
||||
dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
|
||||
dma-names = "tx", "rx";
|
||||
|
||||
clocks = <&k3_clks 192 0>;
|
||||
clock-names = "fck";
|
||||
assigned-clocks = <&k3_clks 192 0>;
|
||||
assigned-clock-parents = <&k3_clks 192 2>;
|
||||
power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -130,4 +130,15 @@
|
|||
clocks = <&k3_clks 79 0>;
|
||||
clock-names = "gpio";
|
||||
};
|
||||
|
||||
mcu_rti0: watchdog@4880000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x04880000 0x00 0x100>;
|
||||
clocks = <&k3_clks 131 0>;
|
||||
power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 131 0>;
|
||||
assigned-clock-parents = <&k3_clks 131 2>;
|
||||
/* Tightly coupled to M4F */
|
||||
status = "reserved";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -40,4 +40,25 @@
|
|||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
wkup_rtc0: rtc@2b1f0000 {
|
||||
compatible = "ti,am62-rtc";
|
||||
reg = <0x00 0x2b1f0000 0x00 0x100>;
|
||||
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&k3_clks 117 6> , <&k3_clks 117 0>;
|
||||
clock-names = "vbus", "osc32k";
|
||||
power-domains = <&k3_pds 117 TI_SCI_PD_EXCLUSIVE>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
wkup_rti0: watchdog@2b000000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x2b000000 0x00 0x100>;
|
||||
clocks = <&k3_clks 132 0>;
|
||||
power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 132 0>;
|
||||
assigned-clock-parents = <&k3_clks 132 2>;
|
||||
/* Used by DM firmware */
|
||||
status = "reserved";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -8,9 +8,10 @@
|
|||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/k3.h>
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
/ {
|
||||
model = "Texas Instruments K3 AM625 SoC";
|
||||
compatible = "ti,am625";
|
||||
|
|
|
|||
|
|
@ -0,0 +1,758 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* https://beagleplay.org/
|
||||
*
|
||||
* Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
|
||||
* Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "k3-am625.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "beagle,am625-beagleplay", "ti,am625";
|
||||
model = "BeagleBoard.org BeaglePlay";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &cpsw_port1;
|
||||
ethernet1 = &cpsw_port2;
|
||||
gpio0 = &main_gpio0;
|
||||
gpio1 = &main_gpio1;
|
||||
gpio2 = &mcu_gpio0;
|
||||
i2c0 = &main_i2c0;
|
||||
i2c1 = &main_i2c1;
|
||||
i2c2 = &main_i2c2;
|
||||
i2c3 = &main_i2c3;
|
||||
i2c4 = &wkup_i2c0;
|
||||
i2c5 = &mcu_i2c0;
|
||||
mdio-gpio0 = &mdio0;
|
||||
mmc0 = &sdhci0;
|
||||
mmc1 = &sdhci1;
|
||||
mmc2 = &sdhci2;
|
||||
rtc0 = &rtc;
|
||||
serial0 = &main_uart5;
|
||||
serial1 = &main_uart6;
|
||||
serial2 = &main_uart0;
|
||||
usb0 = &usb0;
|
||||
usb1 = &usb1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial2:115200n8";
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
/* 2G RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
ramoops: ramoops@9ca00000 {
|
||||
compatible = "ramoops";
|
||||
reg = <0x00 0x9c700000 0x00 0x00100000>;
|
||||
record-size = <0x8000>;
|
||||
console-size = <0x8000>;
|
||||
ftrace-size = <0x00>;
|
||||
pmsg-size = <0x8000>;
|
||||
};
|
||||
|
||||
secure_tfa_ddr: tfa@9e780000 {
|
||||
reg = <0x00 0x9e780000 0x00 0x80000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_ddr: optee@9e800000 {
|
||||
reg = <0x00 0x9e800000 0x00 0x01800000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9db00000 0x00 0xc00000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
vsys_5v0: regulator-1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vsys_5v0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_3v3: regulator-2 {
|
||||
/* output of TLV62595DMQR-U12 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vsys_5v0>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
wlan_en: regulator-3 {
|
||||
/* OUTPUT of SN74AVC2T244DQMR */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "wlan_en";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
vin-supply = <&vdd_3v3>;
|
||||
gpio = <&main_gpio0 38 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_en_pins_default>;
|
||||
};
|
||||
|
||||
vdd_3v3_sd: regulator-4 {
|
||||
/* output of TPS22918DBVR-U21 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vdd_3v3_sd_pins_default>;
|
||||
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_3v3_sd";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
vin-supply = <&vdd_3v3>;
|
||||
gpio = <&main_gpio1 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
vdd_sd_dv: regulator-5 {
|
||||
compatible = "regulator-gpio";
|
||||
regulator-name = "sd_hs200_switch";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vdd_sd_dv_pins_default>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&ldo1_reg>;
|
||||
gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
|
||||
states = <1800000 0x0>,
|
||||
<3300000 0x1>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-0 {
|
||||
gpios = <&main_gpio0 3 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
function = LED_FUNCTION_HEARTBEAT;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
gpios = <&main_gpio0 4 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "disk-activity";
|
||||
function = LED_FUNCTION_DISK_ACTIVITY;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
led-2 {
|
||||
gpios = <&main_gpio0 5 GPIO_ACTIVE_HIGH>;
|
||||
function = LED_FUNCTION_CPU;
|
||||
};
|
||||
|
||||
led-3 {
|
||||
gpios = <&main_gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
};
|
||||
|
||||
led-4 {
|
||||
gpios = <&main_gpio0 9 GPIO_ACTIVE_HIGH>;
|
||||
function = LED_FUNCTION_WLAN;
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys: gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
autorepeat;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usr_button_pins_default>;
|
||||
|
||||
usr: button-usr {
|
||||
label = "User Key";
|
||||
linux,code = <BTN_0>;
|
||||
gpios = <&main_gpio0 18 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/* Workaround for errata i2329 - just use mdio bitbang */
|
||||
mdio0: mdio {
|
||||
compatible = "virtual,mdio-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mdio0_pins_default>;
|
||||
gpios = <&main_gpio0 86 GPIO_ACTIVE_HIGH>, /* MDC */
|
||||
<&main_gpio0 85 GPIO_ACTIVE_HIGH>; /* MDIO */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpsw3g_phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
cpsw3g_phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
reset-gpios = <&main_gpio1 5 GPIO_ACTIVE_LOW>;
|
||||
reset-assert-us = <25>;
|
||||
reset-deassert-us = <60000>; /* T2 */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
gpio0_pins_default: gpio0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0004, PIN_INPUT, 7) /* (G25) OSPI0_LBCLKO.GPIO0_1 */
|
||||
AM62X_IOPAD(0x0008, PIN_INPUT, 7) /* (J24) OSPI0_DQS.GPIO0_2 */
|
||||
AM62X_IOPAD(0x000c, PIN_INPUT, 7) /* (E25) OSPI0_D0.GPIO0_3 */
|
||||
AM62X_IOPAD(0x0010, PIN_INPUT, 7) /* (G24) OSPI0_D1.GPIO0_4 */
|
||||
AM62X_IOPAD(0x0014, PIN_INPUT, 7) /* (F25) OSPI0_D2.GPIO0_5 */
|
||||
AM62X_IOPAD(0x0018, PIN_INPUT, 7) /* (F24) OSPI0_D3.GPIO0_6 */
|
||||
AM62X_IOPAD(0x0024, PIN_INPUT, 7) /* (H25) OSPI0_D6.GPIO0_9 */
|
||||
AM62X_IOPAD(0x0028, PIN_INPUT, 7) /* (J22) OSPI0_D7.GPIO0_10 */
|
||||
AM62X_IOPAD(0x002c, PIN_INPUT, 7) /* (F23) OSPI0_CSn0.GPIO0_11 */
|
||||
AM62X_IOPAD(0x0030, PIN_INPUT, 7) /* (G21) OSPI0_CSn1.GPIO0_12 */
|
||||
AM62X_IOPAD(0x0034, PIN_INPUT, 7) /* (H21) OSPI0_CSn2.GPIO0_13 */
|
||||
AM62X_IOPAD(0x0038, PIN_INPUT, 7) /* (E24) OSPI0_CSn3.GPIO0_14 */
|
||||
AM62X_IOPAD(0x00a4, PIN_INPUT, 7) /* (M22) GPMC0_DIR.GPIO0_40 */
|
||||
AM62X_IOPAD(0x00ac, PIN_INPUT, 7) /* (L21) GPMC0_CSn1.GPIO0_42 */
|
||||
>;
|
||||
};
|
||||
|
||||
vdd_sd_dv_pins_default: vdd-sd-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
|
||||
>;
|
||||
};
|
||||
|
||||
usr_button_pins_default: usr-button-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0048, PIN_INPUT, 7) /* (N25) GPMC0_AD3.GPIO0_18 */
|
||||
>;
|
||||
};
|
||||
|
||||
grove_pins_default: grove-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
|
||||
AM62X_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
local_i2c_pins_default: local-i2c-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
|
||||
AM62X_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_1v8_pins_default: i2c2-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
|
||||
AM62X_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
mdio0_pins_default: mdio0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0160, PIN_OUTPUT, 7) /* (AD24) MDIO0_MDC.GPIO0_86 */
|
||||
AM62X_IOPAD(0x015c, PIN_INPUT, 7) /* (AB22) MDIO0_MDIO.GPIO0_85 */
|
||||
>;
|
||||
};
|
||||
|
||||
rgmii1_pins_default: rgmii1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x014c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
|
||||
AM62X_IOPAD(0x0150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
|
||||
AM62X_IOPAD(0x0154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
|
||||
AM62X_IOPAD(0x0158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
|
||||
AM62X_IOPAD(0x0148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
|
||||
AM62X_IOPAD(0x0144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
|
||||
AM62X_IOPAD(0x0134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
|
||||
AM62X_IOPAD(0x0138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
|
||||
AM62X_IOPAD(0x013c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
|
||||
AM62X_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
|
||||
AM62X_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
|
||||
AM62X_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
|
||||
>;
|
||||
};
|
||||
|
||||
emmc_pins_default: emmc-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
|
||||
AM62X_IOPAD(0x0218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
|
||||
AM62X_IOPAD(0x0214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
|
||||
AM62X_IOPAD(0x0210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
|
||||
AM62X_IOPAD(0x020c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
|
||||
AM62X_IOPAD(0x0208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
|
||||
AM62X_IOPAD(0x0204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
|
||||
AM62X_IOPAD(0x0200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
|
||||
AM62X_IOPAD(0x01fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
|
||||
AM62X_IOPAD(0x01f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
|
||||
>;
|
||||
};
|
||||
|
||||
vdd_3v3_sd_pins_default: vdd-3v3-sd-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01c4, PIN_INPUT, 7) /* (B14) SPI0_D1_GPIO1_19 */
|
||||
>;
|
||||
};
|
||||
|
||||
sd_pins_default: sd-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x023c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
|
||||
AM62X_IOPAD(0x0234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
|
||||
AM62X_IOPAD(0x0230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
|
||||
AM62X_IOPAD(0x022c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
|
||||
AM62X_IOPAD(0x0228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
|
||||
AM62X_IOPAD(0x0224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
|
||||
AM62X_IOPAD(0x0240, PIN_INPUT, 7) /* (D17) MMC1_SDCD.GPIO1_48 */
|
||||
>;
|
||||
};
|
||||
|
||||
wifi_pins_default: wifi-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0120, PIN_INPUT, 0) /* (C24) MMC2_CMD */
|
||||
AM62X_IOPAD(0x0118, PIN_INPUT, 0) /* (D25) MMC2_CLK */
|
||||
AM62X_IOPAD(0x0114, PIN_INPUT, 0) /* (B24) MMC2_DAT0 */
|
||||
AM62X_IOPAD(0x0110, PIN_INPUT, 0) /* (C25) MMC2_DAT1 */
|
||||
AM62X_IOPAD(0x010c, PIN_INPUT, 0) /* (E23) MMC2_DAT2 */
|
||||
AM62X_IOPAD(0x0108, PIN_INPUT, 0) /* (D24) MMC2_DAT3 */
|
||||
AM62X_IOPAD(0x0124, PIN_INPUT, 0) /* (A23) MMC2_SDCD */
|
||||
AM62X_IOPAD(0x11c, PIN_INPUT, 0) /* (#N/A) MMC2_CLKB */
|
||||
>;
|
||||
};
|
||||
|
||||
wifi_en_pins_default: wifi-en-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x009c, PIN_OUTPUT, 7) /* (V25) GPMC0_WAIT1.GPIO0_38 */
|
||||
>;
|
||||
};
|
||||
|
||||
wifi_wlirq_pins_default: wifi-wlirq-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x00a8, PIN_INPUT, 7) /* (M21) GPMC0_CSn0.GPIO0_41 */
|
||||
>;
|
||||
};
|
||||
|
||||
spe_pins_default: spe-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0168, PIN_INPUT, 1) /* (AE21) RGMII2_TXC.RMII2_CRS_DV */
|
||||
AM62X_IOPAD(0x0180, PIN_INPUT, 1) /* (AD23) RGMII2_RXC.RMII2_REF_CLK */
|
||||
AM62X_IOPAD(0x0184, PIN_INPUT, 1) /* (AE23) RGMII2_RD0.RMII2_RXD0 */
|
||||
AM62X_IOPAD(0x0188, PIN_INPUT, 1) /* (AB20) RGMII2_RD1.RMII2_RXD1 */
|
||||
AM62X_IOPAD(0x017c, PIN_INPUT, 1) /* (AD22) RGMII2_RX_CTL.RMII2_RX_ER */
|
||||
AM62X_IOPAD(0x016c, PIN_INPUT, 1) /* (Y18) RGMII2_TD0.RMII2_TXD0 */
|
||||
AM62X_IOPAD(0x0170, PIN_INPUT, 1) /* (AA18) RGMII2_TD1.RMII2_TXD1 */
|
||||
AM62X_IOPAD(0x0164, PIN_INPUT, 1) /* (AA19) RGMII2_TX_CTL.RMII2_TX_EN */
|
||||
AM62X_IOPAD(0x018c, PIN_OUTPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */
|
||||
AM62X_IOPAD(0x0190, PIN_INPUT, 7) /* (AE22) RGMII2_RD3.GPIO1_6 */
|
||||
AM62X_IOPAD(0x01f0, PIN_OUTPUT, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mikrobus_i2c_pins_default: mikrobus-i2c-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01d0, PIN_INPUT_PULLUP, 2) /* (A15) UART0_CTSn.I2C3_SCL */
|
||||
AM62X_IOPAD(0x01d4, PIN_INPUT_PULLUP, 2) /* (B15) UART0_RTSn.I2C3_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
mikrobus_uart_pins_default: mikrobus-uart-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01d8, PIN_INPUT, 1) /* (C15) MCAN0_TX.UART5_RXD */
|
||||
AM62X_IOPAD(0x01dc, PIN_OUTPUT, 1) /* (E15) MCAN0_RX.UART5_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
mikrobus_spi_pins_default: mikrobus-spi-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01b0, PIN_INPUT, 1) /* (A20) MCASP0_ACLKR.SPI2_CLK */
|
||||
AM62X_IOPAD(0x01ac, PIN_INPUT, 1) /* (E19) MCASP0_AFSR.SPI2_CS0 */
|
||||
AM62X_IOPAD(0x0194, PIN_INPUT, 1) /* (B19) MCASP0_AXR3.SPI2_D0 */
|
||||
AM62X_IOPAD(0x0198, PIN_INPUT, 1) /* (A19) MCASP0_AXR2.SPI2_D1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mikrobus_gpio_pins_default: mikrobus-gpio-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x019c, PIN_INPUT, 7) /* (B18) MCASP0_AXR1.GPIO1_9 */
|
||||
AM62X_IOPAD(0x01a0, PIN_INPUT, 7) /* (E18) MCASP0_AXR0.GPIO1_10 */
|
||||
AM62X_IOPAD(0x01a8, PIN_INPUT, 7) /* (D20) MCASP0_AFSX.GPIO1_12 */
|
||||
>;
|
||||
};
|
||||
|
||||
console_pins_default: console-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
|
||||
AM62X_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
wifi_debug_uart_pins_default: wifi-debug-uart-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x001c, PIN_INPUT, 3) /* (J23) OSPI0_D4.UART6_RXD */
|
||||
AM62X_IOPAD(0x0020, PIN_OUTPUT, 3) /* (J25) OSPI0_D5.UART6_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins_default: usb1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0258, PIN_INPUT, 0) /* (F18) USB1_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
|
||||
pmic_irq_pins_default: pmic-irq-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0) /* (D16) EXTINTn */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_pmx0 {
|
||||
i2c_qwiic_pins_default: i2c-qwiic-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_MCU_IOPAD(0x0044, PIN_INPUT, 0) /* (A8) MCU_I2C0_SCL */
|
||||
AM62X_MCU_IOPAD(0x0048, PIN_INPUT, 0) /* (D10) MCU_I2C0_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
gbe_pmx_obsclk: gbe-pmx-clk-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_MCU_IOPAD(0x0004, PIN_OUTPUT, 1) /* (B8) MCU_SPI0_CS1.MCU_OBSCLK0 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c_csi_pins_default: i2c-csi-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_MCU_IOPAD(0x004c, PIN_INPUT_PULLUP, 0) /* (B9) WKUP_I2C0_SCL */
|
||||
AM62X_MCU_IOPAD(0x0050, PIN_INPUT_PULLUP, 0) /* (A9) WKUP_I2C0_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
wifi_32k_clk: mcu-clk-out-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_MCU_IOPAD(0x0084, PIN_OUTPUT, 0) /* (A12) WKUP_CLKOUT0 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&a53_opp_table {
|
||||
/* Requires VDD_CORE to be at 0.85V */
|
||||
opp-1400000000 {
|
||||
opp-hz = /bits/ 64 <1400000000>;
|
||||
opp-supported-hw = <0x01 0x0004>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c_csi_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
/* Enable with overlay for camera sensor */
|
||||
};
|
||||
|
||||
&mcu_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c_qwiic_pins_default>;
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
ti,vbus-divider;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
&usbss1 {
|
||||
ti,vbus-divider;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb1_pins_default>;
|
||||
};
|
||||
|
||||
&cpsw3g {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmii1_pins_default>, <&spe_pins_default>,
|
||||
<&gbe_pmx_obsclk>;
|
||||
assigned-clocks = <&k3_clks 157 70>, <&k3_clks 157 20>;
|
||||
assigned-clock-parents = <&k3_clks 157 72>, <&k3_clks 157 22>;
|
||||
};
|
||||
|
||||
&cpsw_port1 {
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&cpsw3g_phy0>;
|
||||
};
|
||||
|
||||
&cpsw_port2 {
|
||||
phy-mode = "rmii";
|
||||
phy-handle = <&cpsw3g_phy1>;
|
||||
};
|
||||
|
||||
&cpsw3g_mdio {
|
||||
/* Workaround for errata i2329 - Use mdio bitbang */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio0_pins_default>;
|
||||
gpio-line-names = "BL_EN_3V3", "SPE_PO_EN", "RTC_INT", /* 0-2 */
|
||||
"USR0", "USR1", "USR2", "USR3", "", "", "USR4", /* 3-9 */
|
||||
"EEPROM_WP", /* 10 */
|
||||
"CSI2_CAMERA_GPIO1", "CSI2_CAMERA_GPIO2", /* 11-12 */
|
||||
"CC1352P7_BOOT", "CC1352P7_RSTN", "", "", "", /* 13-17 */
|
||||
"USR_BUTTON", "", "", "", "", "", "", "", "", /* 18-26 */
|
||||
"", "", "", "", "", "", "", "", "", "HDMI_INT", /* 27-36 */
|
||||
"", "VDD_WLAN_EN", "", "", "WL_IRQ", "GBE_INTN",/* 37-42 */
|
||||
"", "", "", "", "", "", "", "", "", "", "", "", /* 43-54 */
|
||||
"", "", "", "", "", "", "", "", "", "", "", "", /* 55-66 */
|
||||
"", "", "", "", "", "", "", "", "", "", "", "", /* 67-78 */
|
||||
"", "", "", "", "", "", /* 79-84 */
|
||||
"BITBANG_MDIO_DATA", "BITBANG_MDIO_CLK", /* 85-86 */
|
||||
"", "", "", "", ""; /* 87-91 */
|
||||
};
|
||||
|
||||
&main_gpio1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mikrobus_gpio_pins_default>;
|
||||
gpio-line-names = "", "", "", "", "", /* 0-4 */
|
||||
"SPE_RSTN", "SPE_INTN", "MIKROBUS_GPIO1_7", /* 5-7 */
|
||||
"MIKROBUS_GPIO1_8", "MIKROBUS_GPIO1_9", /* 8-9 */
|
||||
"MIKROBUS_GPIO1_10", "MIKROBUS_GPIO1_11", /* 10-11 */
|
||||
"MIKROBUS_GPIO1_12", "MIKROBUS_W1_GPIO0", /* 12-13 */
|
||||
"MIKROBUS_GPIO1_14", /* 14 */
|
||||
"", "", "", "", "VDD_3V3_SD", "", "", /* 15-21 */
|
||||
"MIKROBUS_GPIO1_22", "MIKROBUS_GPIO1_23", /* 22-23 */
|
||||
"MIKROBUS_GPIO1_24", "MIKROBUS_GPIO1_25", /* 24-25 */
|
||||
"", "", "", "", "", "", "", "", "", "", "", "", /* 26-37 */
|
||||
"", "", "", "", "", "", "", "", "", "", /* 38-47 */
|
||||
"SD_CD", "SD_VOLT_SEL", "", ""; /* 48-51 */
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&local_i2c_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
rtc: rtc@68 {
|
||||
compatible = "ti,bq32000";
|
||||
reg = <0x68>;
|
||||
interrupt-parent = <&main_gpio0>;
|
||||
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
|
||||
tps65219: pmic@30 {
|
||||
compatible = "ti,tps65219";
|
||||
reg = <0x30>;
|
||||
buck1-supply = <&vsys_5v0>;
|
||||
buck2-supply = <&vsys_5v0>;
|
||||
buck3-supply = <&vsys_5v0>;
|
||||
ldo1-supply = <&vdd_3v3>;
|
||||
ldo2-supply = <&buck2_reg>;
|
||||
ldo3-supply = <&vdd_3v3>;
|
||||
ldo4-supply = <&vdd_3v3>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_irq_pins_default>;
|
||||
interrupt-parent = <&gic500>;
|
||||
interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
system-power-controller;
|
||||
ti,power-button;
|
||||
|
||||
regulators {
|
||||
buck1_reg: buck1 {
|
||||
regulator-name = "VDD_CORE";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck2_reg: buck2 {
|
||||
regulator-name = "VDD_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck3_reg: buck3 {
|
||||
regulator-name = "VDD_1V2";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
/*
|
||||
* Regulator is left as is unused, vdd_sd
|
||||
* is controlled via GPIO with bypass config
|
||||
* as per the NVM configuration
|
||||
*/
|
||||
regulator-name = "VDD_SD_3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-allow-bypass;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: ldo2 {
|
||||
regulator-name = "VDDA_0V85";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: ldo3 {
|
||||
regulator-name = "VDDA_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: ldo4 {
|
||||
regulator-name = "VDD_2V5";
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&main_i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&grove_pins_default>;
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_1v8_pins_default>;
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_i2c3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mikrobus_i2c_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_spi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mikrobus_spi_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_pins_default>;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
/* SD/MMC */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sd_pins_default>;
|
||||
|
||||
vmmc-supply = <&vdd_3v3_sd>;
|
||||
vqmmc-supply = <&vdd_sd_dv>;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>;
|
||||
cd-debounce-delay-ms = <100>;
|
||||
ti,fails-without-test-cd;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci2 {
|
||||
vmmc-supply = <&wlan_en>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_pins_default>, <&wifi_32k_clk>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
ti,fails-without-test-cd;
|
||||
cap-power-off-card;
|
||||
keep-power-in-suspend;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
assigned-clocks = <&k3_clks 157 158>;
|
||||
assigned-clock-parents = <&k3_clks 157 160>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
wlcore: wlcore@2 {
|
||||
compatible = "ti,wl1807";
|
||||
reg = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_wlirq_pins_default>;
|
||||
interrupt-parent = <&main_gpio0>;
|
||||
interrupts = <41 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&console_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_uart1 {
|
||||
/* Main UART1 is used by TIFS firmware */
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mikrobus_uart_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_uart6 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_debug_uart_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -7,32 +7,12 @@
|
|||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
#include "k3-am625.dtsi"
|
||||
#include "k3-am62x-sk-common.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "ti,am625-sk", "ti,am625";
|
||||
model = "Texas Instruments AM625 SK";
|
||||
|
||||
aliases {
|
||||
serial2 = &main_uart0;
|
||||
mmc0 = &sdhci0;
|
||||
mmc1 = &sdhci1;
|
||||
mmc2 = &sdhci2;
|
||||
spi0 = &ospi0;
|
||||
ethernet0 = &cpsw_port1;
|
||||
ethernet1 = &cpsw_port2;
|
||||
usb0 = &usb0;
|
||||
usb1 = &usb1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial2:115200n8";
|
||||
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
|
||||
};
|
||||
|
||||
opp-table {
|
||||
/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
|
||||
opp-1400000000 {
|
||||
|
|
@ -49,39 +29,6 @@
|
|||
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
ramoops@9ca00000 {
|
||||
compatible = "ramoops";
|
||||
reg = <0x00 0x9ca00000 0x00 0x00100000>;
|
||||
record-size = <0x8000>;
|
||||
console-size = <0x8000>;
|
||||
ftrace-size = <0x00>;
|
||||
pmsg-size = <0x8000>;
|
||||
};
|
||||
|
||||
secure_tfa_ddr: tfa@9e780000 {
|
||||
reg = <0x00 0x9e780000 0x00 0x80000>;
|
||||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_ddr: optee@9e800000 {
|
||||
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
|
||||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9db00000 0x00 0xc00000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
vmain_pd: regulator-0 {
|
||||
/* TPS65988 PD CONTROLLER OUTPUT */
|
||||
compatible = "regulator-fixed";
|
||||
|
|
@ -141,107 +88,19 @@
|
|||
<3300000 0x1>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usr_led_pins_default>;
|
||||
|
||||
led-0 {
|
||||
label = "am62-sk:green:heartbeat";
|
||||
gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
function = LED_FUNCTION_HEARTBEAT;
|
||||
default-state = "off";
|
||||
};
|
||||
vcc_1v8: regulator-5 {
|
||||
/* output of TPS6282518DMQ */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc_3v3_sys>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
main_uart0_pins_default: main-uart0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
|
||||
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c0_pins_default: main-i2c0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
|
||||
AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c1_pins_default: main-i2c1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
|
||||
AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c2_pins_default: main-i2c2-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
|
||||
AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mmc0_pins_default: main-mmc0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
|
||||
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
|
||||
AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
|
||||
AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
|
||||
AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
|
||||
AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
|
||||
AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
|
||||
AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
|
||||
AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
|
||||
AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main-mmc1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
|
||||
AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
|
||||
AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
|
||||
AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
|
||||
AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
|
||||
AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
|
||||
AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
|
||||
>;
|
||||
};
|
||||
|
||||
usr_led_pins_default: usr-led-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mdio1_pins_default: main-mdio1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
|
||||
AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
|
||||
>;
|
||||
};
|
||||
|
||||
main_rgmii1_pins_default: main-rgmii1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
|
||||
AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
|
||||
AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
|
||||
AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
|
||||
AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
|
||||
AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
|
||||
AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
|
||||
AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
|
||||
AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
|
||||
AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
|
||||
AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
|
||||
AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
|
||||
>;
|
||||
};
|
||||
|
||||
main_rgmii2_pins_default: main-rgmii2-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
|
||||
|
|
@ -286,43 +145,9 @@
|
|||
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_usb1_pins_default: main-usb1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_uart0 {
|
||||
/* WKUP UART0 is used by DM firmware */
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_uart0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart0_pins_default>;
|
||||
};
|
||||
|
||||
&main_uart1 {
|
||||
/* Main UART1 is used by TIFS firmware */
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c0_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&main_i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c1_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
exp1: gpio@22 {
|
||||
compatible = "ti,tca6424";
|
||||
reg = <0x22>;
|
||||
|
|
@ -351,23 +176,9 @@
|
|||
};
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
/* SD/MMC */
|
||||
status = "okay";
|
||||
vmmc-supply = <&vdd_mmc1>;
|
||||
vqmmc-supply = <&vdd_sd_dv>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
};
|
||||
|
||||
&cpsw3g {
|
||||
|
|
@ -376,28 +187,12 @@
|
|||
&main_rgmii2_pins_default>;
|
||||
};
|
||||
|
||||
&cpsw_port1 {
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&cpsw3g_phy0>;
|
||||
};
|
||||
|
||||
&cpsw_port2 {
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&cpsw3g_phy1>;
|
||||
};
|
||||
|
||||
&cpsw3g_mdio {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mdio1_pins_default>;
|
||||
|
||||
cpsw3g_phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
};
|
||||
|
||||
cpsw3g_phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
|
|
@ -473,21 +268,6 @@
|
|||
};
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
status = "okay";
|
||||
ti,vbus-divider;
|
||||
};
|
||||
|
||||
&usbss1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_usb1_pins_default>;
|
||||
&tlv320aic3106 {
|
||||
DVDD-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -148,7 +148,7 @@
|
|||
compatible = "cache";
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
cache-size = <0x40000>;
|
||||
cache-size = <0x80000>;
|
||||
cache-line-size = <64>;
|
||||
cache-sets = <512>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -8,9 +8,10 @@
|
|||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/k3.h>
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
/ {
|
||||
model = "Texas Instruments K3 AM62A SoC";
|
||||
compatible = "ti,am62a7";
|
||||
|
|
|
|||
|
|
@ -27,8 +27,9 @@
|
|||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
/* 2G RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
|
||||
/* 4G RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
|
||||
<0x00000008 0x80000000 0x00000000 0x80000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
|
|
|
|||
|
|
@ -97,7 +97,7 @@
|
|||
compatible = "cache";
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
cache-size = <0x40000>;
|
||||
cache-size = <0x80000>;
|
||||
cache-line-size = <64>;
|
||||
cache-sets = <512>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,351 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Common dtsi for AM62x SK and derivatives
|
||||
*
|
||||
* Copyright (C) 2021-2023 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
#include "k3-am625.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
serial2 = &main_uart0;
|
||||
mmc0 = &sdhci0;
|
||||
mmc1 = &sdhci1;
|
||||
mmc2 = &sdhci2;
|
||||
spi0 = &ospi0;
|
||||
ethernet0 = &cpsw_port1;
|
||||
ethernet1 = &cpsw_port2;
|
||||
usb0 = &usb0;
|
||||
usb1 = &usb1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial2:115200n8";
|
||||
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
/* 2G RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
|
||||
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
ramoops@9ca00000 {
|
||||
compatible = "ramoops";
|
||||
reg = <0x00 0x9ca00000 0x00 0x00100000>;
|
||||
record-size = <0x8000>;
|
||||
console-size = <0x8000>;
|
||||
ftrace-size = <0x00>;
|
||||
pmsg-size = <0x8000>;
|
||||
};
|
||||
|
||||
secure_tfa_ddr: tfa@9e780000 {
|
||||
reg = <0x00 0x9e780000 0x00 0x80000>;
|
||||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_ddr: optee@9e800000 {
|
||||
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
|
||||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9db00000 0x00 0xc00000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usr_led_pins_default>;
|
||||
|
||||
led-0 {
|
||||
label = "am62-sk:green:heartbeat";
|
||||
gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
function = LED_FUNCTION_HEARTBEAT;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
tlv320_mclk: clk-0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <12288000>;
|
||||
};
|
||||
|
||||
codec_audio: sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "AM62x-SKEVM";
|
||||
simple-audio-card,widgets =
|
||||
"Headphone", "Headphone Jack",
|
||||
"Line", "Line In",
|
||||
"Microphone", "Microphone Jack";
|
||||
simple-audio-card,routing =
|
||||
"Headphone Jack", "HPLOUT",
|
||||
"Headphone Jack", "HPROUT",
|
||||
"LINE1L", "Line In",
|
||||
"LINE1R", "Line In",
|
||||
"MIC3R", "Microphone Jack",
|
||||
"Microphone Jack", "Mic Bias";
|
||||
simple-audio-card,format = "dsp_b";
|
||||
simple-audio-card,bitclock-master = <&sound_master>;
|
||||
simple-audio-card,frame-master = <&sound_master>;
|
||||
simple-audio-card,bitclock-inversion;
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&mcasp1>;
|
||||
};
|
||||
|
||||
sound_master: simple-audio-card,codec {
|
||||
sound-dai = <&tlv320aic3106>;
|
||||
clocks = <&tlv320_mclk>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
/* First pad number is ALW package and second is AMC package */
|
||||
main_uart0_pins_default: main-uart0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */
|
||||
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c0_pins_default: main-i2c0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16/E12) I2C0_SCL */
|
||||
AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16/D14) I2C0_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c1_pins_default: main-i2c1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17/A17) I2C1_SCL */
|
||||
AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17/A16) I2C1_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c2_pins_default: main-i2c2-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22/H18) GPMC0_CSn2.I2C2_SCL */
|
||||
AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24/H19) GPMC0_CSn3.I2C2_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mmc0_pins_default: main-mmc0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */
|
||||
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */
|
||||
AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2/V2) MMC0_DAT0 */
|
||||
AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1/V1) MMC0_DAT1 */
|
||||
AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3/W2) MMC0_DAT2 */
|
||||
AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4/W1) MMC0_DAT3 */
|
||||
AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2/Y2) MMC0_DAT4 */
|
||||
AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1/W3) MMC0_DAT5 */
|
||||
AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2/W4) MMC0_DAT6 */
|
||||
AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2/V4) MMC0_DAT7 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main-mmc1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */
|
||||
AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */
|
||||
AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22/A19) MMC1_DAT0 */
|
||||
AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21/B19) MMC1_DAT1 */
|
||||
AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21/B20) MMC1_DAT2 */
|
||||
AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22/C19) MMC1_DAT3 */
|
||||
AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17/C15) MMC1_SDCD */
|
||||
>;
|
||||
};
|
||||
|
||||
usr_led_pins_default: usr-led-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17/B15) MMC1_SDWP.GPIO1_49 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mdio1_pins_default: main-mdio1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24/V17) MDIO0_MDC */
|
||||
AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22/U16) MDIO0_MDIO */
|
||||
>;
|
||||
};
|
||||
|
||||
main_rgmii1_pins_default: main-rgmii1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17/W15) RGMII1_RD0 */
|
||||
AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17/Y16) RGMII1_RD1 */
|
||||
AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16/AA17) RGMII1_RD2 */
|
||||
AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15/Y15) RGMII1_RD3 */
|
||||
AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17/AA16) RGMII1_RXC */
|
||||
AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17/W14) RGMII1_RX_CTL */
|
||||
AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20/U14) RGMII1_TD0 */
|
||||
AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20/AA19) RGMII1_TD1 */
|
||||
AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18/Y17) RGMII1_TD2 */
|
||||
AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18/AA18) RGMII1_TD3 */
|
||||
AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19/W16) RGMII1_TXC */
|
||||
AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19/V15) RGMII1_TX_CTL */
|
||||
>;
|
||||
};
|
||||
|
||||
main_usb1_pins_default: main-usb1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18/E16) USB1_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mcasp1_pins_default: main-mcasp1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x090, PIN_INPUT, 2) /* (M24) GPMC0_BE0N_CLE.MCASP1_ACLKX */
|
||||
AM62X_IOPAD(0x098, PIN_INPUT, 2) /* (U23) GPMC0_WAIT0.MCASP1_AFSX */
|
||||
AM62X_IOPAD(0x08c, PIN_OUTPUT, 2) /* (L25) GPMC0_WEN.MCASP1_AXR0 */
|
||||
AM62X_IOPAD(0x084, PIN_INPUT, 2) /* (L23) GPMC0_ADVN_ALE.MCASP1_AXR2 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_uart0 {
|
||||
/* WKUP UART0 is used by DM firmware */
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_uart0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart0_pins_default>;
|
||||
};
|
||||
|
||||
&main_uart1 {
|
||||
/* Main UART1 is used by TIFS firmware */
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c0_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&main_i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c1_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tlv320aic3106: audio-codec@1b {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "ti,tlv320aic3106";
|
||||
reg = <0x1b>;
|
||||
ai3x-micbias-vg = <1>; /* 2.0V */
|
||||
|
||||
/* Regulators */
|
||||
AVDD-supply = <&vcc_3v3_sys>;
|
||||
IOVDD-supply = <&vcc_3v3_sys>;
|
||||
DRVDD-supply = <&vcc_3v3_sys>;
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
/* SD/MMC */
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
};
|
||||
|
||||
&cpsw3g {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_rgmii1_pins_default>;
|
||||
};
|
||||
|
||||
&cpsw_port1 {
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&cpsw3g_phy0>;
|
||||
};
|
||||
|
||||
&cpsw3g_mdio {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mdio1_pins_default>;
|
||||
|
||||
cpsw3g_phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox0_cluster0 {
|
||||
mbox_m4_0: mbox-m4-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
status = "okay";
|
||||
ti,vbus-divider;
|
||||
};
|
||||
|
||||
&usbss1 {
|
||||
status = "okay";
|
||||
ti,vbus-divider;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_usb1_pins_default>;
|
||||
};
|
||||
|
||||
&mcasp1 {
|
||||
status = "okay";
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mcasp1_pins_default>;
|
||||
|
||||
op-mode = <0>; /* MCASP_IIS_MODE */
|
||||
tdm-slots = <2>;
|
||||
|
||||
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
||||
1 0 2 0
|
||||
0 0 0 0
|
||||
0 0 0 0
|
||||
0 0 0 0
|
||||
>;
|
||||
tx-num-evt = <32>;
|
||||
rx-num-evt = <32>;
|
||||
};
|
||||
|
|
@ -8,9 +8,10 @@
|
|||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/k3.h>
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
/ {
|
||||
model = "Texas Instruments K3 AM642 SoC";
|
||||
compatible = "ti,am642";
|
||||
|
|
|
|||
|
|
@ -8,9 +8,10 @@
|
|||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/k3.h>
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
/ {
|
||||
model = "Texas Instruments K3 AM654 SoC";
|
||||
compatible = "ti,am654";
|
||||
|
|
|
|||
|
|
@ -60,7 +60,7 @@
|
|||
regulator-boot-on;
|
||||
enable-active-high;
|
||||
vin-supply = <&vsys_3v3>;
|
||||
gpio = <&exp1 10 GPIO_ACTIVE_HIGH>;
|
||||
gpio = <&exp1 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
vdd_sd_dv: regulator-tlv71033 {
|
||||
|
|
@ -264,12 +264,10 @@
|
|||
reg = <0x21>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-line-names = "CSI_VIO_SEL", "CSI_SEL_FPC_EXPn", "HDMI_PDn",
|
||||
"HDMI_LS_OE", "DP0_3V3 _EN", "BOARDID_EEPROM_WP",
|
||||
"CAN_STB", " ", "GPIO_uSD_PWR_EN", "eDP_ENABLE",
|
||||
"IO_EXP_PCIe1_M.2_RTSz", "IO_EXP_MCU_RGMII_RSTz",
|
||||
"IO_EXP_CSI2_EXP_RSTz", " ", "CSI0_B_GPIO1",
|
||||
"CSI1_B_GPIO1";
|
||||
gpio-line-names = " ", " ", " ", " ", " ",
|
||||
"BOARDID_EEPROM_WP", "CAN_STB", " ",
|
||||
"GPIO_uSD_PWR_EN", " ", "IO_EXP_PCIe1_M.2_RTSz",
|
||||
"IO_EXP_MCU_RGMII_RST#", " ", " ", " ", " ";
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,101 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/**
|
||||
* DT Overlay for CPSW5G in QSGMII mode using J7 Quad Port ETH EXP Add-On Ethernet Card with
|
||||
* J7200 board.
|
||||
*
|
||||
* Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/mux/ti-serdes.h>
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
&{/} {
|
||||
aliases {
|
||||
ethernet1 = "/bus@100000/ethernet@c000000/ethernet-ports/port@1";
|
||||
ethernet2 = "/bus@100000/ethernet@c000000/ethernet-ports/port@2";
|
||||
ethernet3 = "/bus@100000/ethernet@c000000/ethernet-ports/port@3";
|
||||
ethernet4 = "/bus@100000/ethernet@c000000/ethernet-ports/port@4";
|
||||
};
|
||||
};
|
||||
|
||||
&cpsw0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw0_port1 {
|
||||
status = "okay";
|
||||
phy-handle = <&cpsw5g_phy0>;
|
||||
phy-mode = "qsgmii";
|
||||
mac-address = [00 00 00 00 00 00];
|
||||
phys = <&cpsw0_phy_gmii_sel 1>;
|
||||
};
|
||||
|
||||
&cpsw0_port2 {
|
||||
status = "okay";
|
||||
phy-handle = <&cpsw5g_phy1>;
|
||||
phy-mode = "qsgmii";
|
||||
mac-address = [00 00 00 00 00 00];
|
||||
phys = <&cpsw0_phy_gmii_sel 2>;
|
||||
};
|
||||
|
||||
&cpsw0_port3 {
|
||||
status = "okay";
|
||||
phy-handle = <&cpsw5g_phy2>;
|
||||
phy-mode = "qsgmii";
|
||||
mac-address = [00 00 00 00 00 00];
|
||||
phys = <&cpsw0_phy_gmii_sel 3>;
|
||||
};
|
||||
|
||||
&cpsw0_port4 {
|
||||
status = "okay";
|
||||
phy-handle = <&cpsw5g_phy3>;
|
||||
phy-mode = "qsgmii";
|
||||
mac-address = [00 00 00 00 00 00];
|
||||
phys = <&cpsw0_phy_gmii_sel 4>;
|
||||
};
|
||||
|
||||
&cpsw5g_mdio {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mdio0_pins_default>;
|
||||
reset-gpios = <&exp2 17 GPIO_ACTIVE_LOW>;
|
||||
reset-post-delay-us = <120000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpsw5g_phy0: ethernet-phy@16 {
|
||||
reg = <16>;
|
||||
};
|
||||
cpsw5g_phy1: ethernet-phy@17 {
|
||||
reg = <17>;
|
||||
};
|
||||
cpsw5g_phy2: ethernet-phy@18 {
|
||||
reg = <18>;
|
||||
};
|
||||
cpsw5g_phy3: ethernet-phy@19 {
|
||||
reg = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
&exp2 {
|
||||
qsgmii-line-hog {
|
||||
gpio-hog;
|
||||
gpios = <16 GPIO_ACTIVE_HIGH>;
|
||||
output-low;
|
||||
line-name = "qsgmii-pwrdn-line";
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
mdio0_pins_default: mdio0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
J721E_IOPAD(0x00a8, PIN_OUTPUT, 5) /* (W19) UART8_TXD.MDIO0_MDC */
|
||||
J721E_IOPAD(0x00a4, PIN_INPUT, 5) /* (W14) UART8_RXD.MDIO0_MDIO */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -39,6 +39,13 @@
|
|||
<0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */
|
||||
};
|
||||
|
||||
cpsw0_phy_gmii_sel: phy@4044 {
|
||||
compatible = "ti,j7200-cpsw5g-phy-gmii-sel";
|
||||
ti,qsgmii-main-ports = <1>;
|
||||
reg = <0x4044 0x10>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
usb_serdes_mux: mux-controller@4000 {
|
||||
compatible = "mmio-mux";
|
||||
#mux-control-cells = <1>;
|
||||
|
|
@ -304,6 +311,87 @@
|
|||
};
|
||||
};
|
||||
|
||||
cpsw0: ethernet@c000000 {
|
||||
compatible = "ti,j7200-cpswxg-nuss";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
reg = <0x00 0xc000000 0x00 0x200000>;
|
||||
reg-names = "cpsw_nuss";
|
||||
ranges = <0x00 0x00 0x00 0xc000000 0x00 0x200000>;
|
||||
clocks = <&k3_clks 19 33>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&k3_pds 19 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
||||
dmas = <&main_udmap 0xca00>,
|
||||
<&main_udmap 0xca01>,
|
||||
<&main_udmap 0xca02>,
|
||||
<&main_udmap 0xca03>,
|
||||
<&main_udmap 0xca04>,
|
||||
<&main_udmap 0xca05>,
|
||||
<&main_udmap 0xca06>,
|
||||
<&main_udmap 0xca07>,
|
||||
<&main_udmap 0x4a00>;
|
||||
dma-names = "tx0", "tx1", "tx2", "tx3",
|
||||
"tx4", "tx5", "tx6", "tx7",
|
||||
"rx";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cpsw0_port1: port@1 {
|
||||
reg = <1>;
|
||||
ti,mac-only;
|
||||
label = "port1";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpsw0_port2: port@2 {
|
||||
reg = <2>;
|
||||
ti,mac-only;
|
||||
label = "port2";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpsw0_port3: port@3 {
|
||||
reg = <3>;
|
||||
ti,mac-only;
|
||||
label = "port3";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpsw0_port4: port@4 {
|
||||
reg = <4>;
|
||||
ti,mac-only;
|
||||
label = "port4";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
cpsw5g_mdio: mdio@f00 {
|
||||
compatible = "ti,cpsw-mdio","ti,davinci_mdio";
|
||||
reg = <0x00 0xf00 0x00 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&k3_clks 19 33>;
|
||||
clock-names = "fck";
|
||||
bus_freq = <1000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpts@3d000 {
|
||||
compatible = "ti,j721e-cpts";
|
||||
reg = <0x00 0x3d000 0x00 0x400>;
|
||||
clocks = <&k3_clks 19 16>;
|
||||
clock-names = "cpts";
|
||||
interrupts-extended = <&gic500 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "cpts";
|
||||
ti,cpts-ext-ts-inputs = <4>;
|
||||
ti,cpts-periodic-outputs = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
main_pmx0: pinctrl@11c000 {
|
||||
compatible = "pinctrl-single";
|
||||
/* Proxy 0 addressing */
|
||||
|
|
@ -777,6 +865,94 @@
|
|||
clock-names = "gpio";
|
||||
};
|
||||
|
||||
main_spi0: spi@2100000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02100000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 266 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi1: spi@2110000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02110000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 267 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi2: spi@2120000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02120000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 268 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi3: spi@2130000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02130000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 269 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi4: spi@2140000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02140000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 270 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi5: spi@2150000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02150000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 271 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi6: spi@2160000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02160000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 272 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi7: spi@2170000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02170000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 273 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
watchdog0: watchdog@2200000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x0 0x2200000 0x0 0x100>;
|
||||
|
|
|
|||
|
|
@ -305,6 +305,39 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi0: spi@40300000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040300000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 274 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi1: spi@40310000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040310000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 849 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 275 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi2: spi@40320000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040320000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 850 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 276 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
fss: syscon@47000000 {
|
||||
compatible = "syscon", "simple-mfd";
|
||||
reg = <0x00 0x47000000 0x00 0x100>;
|
||||
|
|
|
|||
|
|
@ -7,9 +7,10 @@
|
|||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/k3.h>
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
/ {
|
||||
model = "Texas Instruments K3 J7200 SoC";
|
||||
compatible = "ti,j7200";
|
||||
|
|
|
|||
|
|
@ -0,0 +1,133 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/**
|
||||
* DT Overlay for CPSW9G in QSGMII mode using J7 Quad Port ETH EXP Add-On Ethernet Card with
|
||||
* J721E board.
|
||||
*
|
||||
* Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/mux/ti-serdes.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
#include <dt-bindings/phy/phy-cadence.h>
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
&{/} {
|
||||
aliases {
|
||||
ethernet1 = "/bus@100000/ethernet@c000000/ethernet-ports/port@1";
|
||||
ethernet2 = "/bus@100000/ethernet@c000000/ethernet-ports/port@2";
|
||||
ethernet3 = "/bus@100000/ethernet@c000000/ethernet-ports/port@3";
|
||||
ethernet4 = "/bus@100000/ethernet@c000000/ethernet-ports/port@4";
|
||||
};
|
||||
};
|
||||
|
||||
&cpsw0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw0_port1 {
|
||||
status = "okay";
|
||||
phy-handle = <&cpsw9g_phy0>;
|
||||
phy-mode = "qsgmii";
|
||||
mac-address = [00 00 00 00 00 00];
|
||||
phys = <&cpsw0_phy_gmii_sel 1>;
|
||||
};
|
||||
|
||||
&cpsw0_port2 {
|
||||
status = "okay";
|
||||
phy-handle = <&cpsw9g_phy1>;
|
||||
phy-mode = "qsgmii";
|
||||
mac-address = [00 00 00 00 00 00];
|
||||
phys = <&cpsw0_phy_gmii_sel 2>;
|
||||
};
|
||||
|
||||
&cpsw0_port3 {
|
||||
status = "okay";
|
||||
phy-handle = <&cpsw9g_phy2>;
|
||||
phy-mode = "qsgmii";
|
||||
mac-address = [00 00 00 00 00 00];
|
||||
phys = <&cpsw0_phy_gmii_sel 3>;
|
||||
};
|
||||
|
||||
&cpsw0_port4 {
|
||||
status = "okay";
|
||||
phy-handle = <&cpsw9g_phy3>;
|
||||
phy-mode = "qsgmii";
|
||||
mac-address = [00 00 00 00 00 00];
|
||||
phys = <&cpsw0_phy_gmii_sel 4>;
|
||||
};
|
||||
|
||||
&cpsw9g_mdio {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mdio0_pins_default>;
|
||||
reset-gpios = <&exp2 17 GPIO_ACTIVE_LOW>;
|
||||
reset-post-delay-us = <120000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpsw9g_phy0: ethernet-phy@17 {
|
||||
reg = <17>;
|
||||
};
|
||||
cpsw9g_phy1: ethernet-phy@16 {
|
||||
reg = <16>;
|
||||
};
|
||||
cpsw9g_phy2: ethernet-phy@18 {
|
||||
reg = <18>;
|
||||
};
|
||||
cpsw9g_phy3: ethernet-phy@19 {
|
||||
reg = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
&exp2 {
|
||||
qsgmii-line-hog {
|
||||
gpio-hog;
|
||||
gpios = <16 GPIO_ACTIVE_HIGH>;
|
||||
output-low;
|
||||
line-name = "qsgmii-pwrdn-line";
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
mdio0_pins_default: mdio0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
J721E_IOPAD(0x1bc, PIN_OUTPUT, 0) /* (V24) MDIO0_MDC */
|
||||
J721E_IOPAD(0x1b8, PIN_INPUT, 0) /* (V26) MDIO0_MDIO */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&serdes_ln_ctrl {
|
||||
idle-states = <J721E_SERDES0_LANE0_PCIE0_LANE0>, <J721E_SERDES0_LANE1_QSGMII_LANE2>,
|
||||
<J721E_SERDES1_LANE0_PCIE1_LANE0>, <J721E_SERDES1_LANE1_PCIE1_LANE1>,
|
||||
<J721E_SERDES2_LANE0_PCIE2_LANE0>, <J721E_SERDES2_LANE1_PCIE2_LANE1>,
|
||||
<J721E_SERDES3_LANE0_USB3_0_SWAP>, <J721E_SERDES3_LANE1_USB3_0>,
|
||||
<J721E_SERDES4_LANE0_EDP_LANE0>, <J721E_SERDES4_LANE1_EDP_LANE1>,
|
||||
<J721E_SERDES4_LANE2_EDP_LANE2>, <J721E_SERDES4_LANE3_EDP_LANE3>;
|
||||
};
|
||||
|
||||
&serdes_wiz0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&serdes0 {
|
||||
status = "okay";
|
||||
|
||||
assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC>, <&serdes0 CDNS_SIERRA_PLL_CMNLC1>;
|
||||
assigned-clock-parents = <&wiz0_pll1_refclk>, <&wiz0_pll1_refclk>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
serdes0_qsgmii_link: phy@1 {
|
||||
reg = <1>;
|
||||
cdns,num-lanes = <1>;
|
||||
#phy-cells = <0>;
|
||||
cdns,phy-type = <PHY_TYPE_QSGMII>;
|
||||
resets = <&serdes_wiz0 2>;
|
||||
};
|
||||
};
|
||||
|
|
@ -61,6 +61,13 @@
|
|||
<J721E_SERDES4_LANE2_EDP_LANE2>, <J721E_SERDES4_LANE3_EDP_LANE3>;
|
||||
};
|
||||
|
||||
cpsw0_phy_gmii_sel: phy@4044 {
|
||||
compatible = "ti,j721e-cpsw9g-phy-gmii-sel";
|
||||
ti,qsgmii-main-ports = <2>, <2>;
|
||||
reg = <0x4044 0x20>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
usb_serdes_mux: mux-controller@4000 {
|
||||
compatible = "mmio-mux";
|
||||
#mux-control-cells = <1>;
|
||||
|
|
@ -404,6 +411,115 @@
|
|||
};
|
||||
};
|
||||
|
||||
cpsw0: ethernet@c000000 {
|
||||
compatible = "ti,j721e-cpswxg-nuss";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
reg = <0x0 0xc000000 0x0 0x200000>;
|
||||
reg-names = "cpsw_nuss";
|
||||
ranges = <0x0 0x0 0x0 0x0c000000 0x0 0x200000>;
|
||||
clocks = <&k3_clks 19 89>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&k3_pds 19 TI_SCI_PD_EXCLUSIVE>;
|
||||
|
||||
dmas = <&main_udmap 0xca00>,
|
||||
<&main_udmap 0xca01>,
|
||||
<&main_udmap 0xca02>,
|
||||
<&main_udmap 0xca03>,
|
||||
<&main_udmap 0xca04>,
|
||||
<&main_udmap 0xca05>,
|
||||
<&main_udmap 0xca06>,
|
||||
<&main_udmap 0xca07>,
|
||||
<&main_udmap 0x4a00>;
|
||||
dma-names = "tx0", "tx1", "tx2", "tx3",
|
||||
"tx4", "tx5", "tx6", "tx7",
|
||||
"rx";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cpsw0_port1: port@1 {
|
||||
reg = <1>;
|
||||
ti,mac-only;
|
||||
label = "port1";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpsw0_port2: port@2 {
|
||||
reg = <2>;
|
||||
ti,mac-only;
|
||||
label = "port2";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpsw0_port3: port@3 {
|
||||
reg = <3>;
|
||||
ti,mac-only;
|
||||
label = "port3";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpsw0_port4: port@4 {
|
||||
reg = <4>;
|
||||
ti,mac-only;
|
||||
label = "port4";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpsw0_port5: port@5 {
|
||||
reg = <5>;
|
||||
ti,mac-only;
|
||||
label = "port5";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpsw0_port6: port@6 {
|
||||
reg = <6>;
|
||||
ti,mac-only;
|
||||
label = "port6";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpsw0_port7: port@7 {
|
||||
reg = <7>;
|
||||
ti,mac-only;
|
||||
label = "port7";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpsw0_port8: port@8 {
|
||||
reg = <8>;
|
||||
ti,mac-only;
|
||||
label = "port8";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
cpsw9g_mdio: mdio@f00 {
|
||||
compatible = "ti,cpsw-mdio","ti,davinci_mdio";
|
||||
reg = <0x0 0xf00 0x0 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&k3_clks 19 89>;
|
||||
clock-names = "fck";
|
||||
bus_freq = <1000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpts@3d000 {
|
||||
compatible = "ti,j721e-cpts";
|
||||
reg = <0x0 0x3d000 0x0 0x400>;
|
||||
clocks = <&k3_clks 19 16>;
|
||||
clock-names = "cpts";
|
||||
interrupts-extended = <&gic500 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "cpts";
|
||||
ti,cpts-ext-ts-inputs = <4>;
|
||||
ti,cpts-periodic-outputs = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
main_crypto: crypto@4e00000 {
|
||||
compatible = "ti,j721e-sa2ul";
|
||||
reg = <0x0 0x4e00000 0x0 0x1200>;
|
||||
|
|
@ -1180,7 +1296,6 @@
|
|||
ti,itap-del-sel-mmc-hs = <0xa>;
|
||||
ti,itap-del-sel-ddr52 = <0x3>;
|
||||
ti,trm-icp = <0x8>;
|
||||
ti,strobe-sel = <0x77>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
|
|
@ -2329,4 +2444,92 @@
|
|||
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi0: spi@2100000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02100000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 266 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi1: spi@2110000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02110000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 267 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi2: spi@2120000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02120000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 268 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi3: spi@2130000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02130000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 269 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi4: spi@2140000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02140000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 270 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi5: spi@2150000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02150000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 271 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi6: spi@2160000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02160000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 272 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi7: spi@2170000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02170000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 273 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -425,4 +425,37 @@
|
|||
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi0: spi@40300000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040300000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 274 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi1: spi@40310000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040310000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 849 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 275 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi2: spi@40320000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040320000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 850 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 276 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -687,10 +687,6 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
&main_r5fss0_core0{
|
||||
firmware-name = "pdk-ipc/ipc_echo_test_mcu2_0_release_strip.xer5f";
|
||||
};
|
||||
|
||||
&usb_serdes_mux {
|
||||
idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -7,9 +7,10 @@
|
|||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/k3.h>
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
/ {
|
||||
model = "Texas Instruments K3 J721E SoC";
|
||||
compatible = "ti,j721e";
|
||||
|
|
@ -135,6 +136,7 @@
|
|||
<0x00 0x06000000 0x00 0x06000000 0x00 0x00400000>, /* USBSS0 */
|
||||
<0x00 0x06400000 0x00 0x06400000 0x00 0x00400000>, /* USBSS1 */
|
||||
<0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
|
||||
<0x00 0x0c000000 0x00 0x0c000000 0x00 0x0d000000>, /* CPSW9G */
|
||||
<0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>, /* MAIN NAVSS */
|
||||
<0x00 0x0d000000 0x00 0x0d000000 0x00 0x01800000>, /* PCIe Core*/
|
||||
<0x00 0x0e000000 0x00 0x0e000000 0x00 0x01800000>, /* PCIe Core*/
|
||||
|
|
|
|||
|
|
@ -197,6 +197,32 @@
|
|||
J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 7) /* (C28) WKUP_GPIO0_2 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcu_adc0_pins_default: mcu-adc0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x134, PIN_INPUT, 0) /* (L25) MCU_ADC0_AIN0 */
|
||||
J721S2_WKUP_IOPAD(0x138, PIN_INPUT, 0) /* (K25) MCU_ADC0_AIN1 */
|
||||
J721S2_WKUP_IOPAD(0x13c, PIN_INPUT, 0) /* (M24) MCU_ADC0_AIN2 */
|
||||
J721S2_WKUP_IOPAD(0x140, PIN_INPUT, 0) /* (L24) MCU_ADC0_AIN3 */
|
||||
J721S2_WKUP_IOPAD(0x144, PIN_INPUT, 0) /* (L27) MCU_ADC0_AIN4 */
|
||||
J721S2_WKUP_IOPAD(0x148, PIN_INPUT, 0) /* (K24) MCU_ADC0_AIN5 */
|
||||
J721S2_WKUP_IOPAD(0x14c, PIN_INPUT, 0) /* (M27) MCU_ADC0_AIN6 */
|
||||
J721S2_WKUP_IOPAD(0x150, PIN_INPUT, 0) /* (M26) MCU_ADC0_AIN7 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcu_adc1_pins_default: mcu-adc1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
J721S2_WKUP_IOPAD(0x154, PIN_INPUT, 0) /* (P25) MCU_ADC1_AIN0 */
|
||||
J721S2_WKUP_IOPAD(0x158, PIN_INPUT, 0) /* (R25) MCU_ADC1_AIN1 */
|
||||
J721S2_WKUP_IOPAD(0x15c, PIN_INPUT, 0) /* (P28) MCU_ADC1_AIN2 */
|
||||
J721S2_WKUP_IOPAD(0x160, PIN_INPUT, 0) /* (P27) MCU_ADC1_AIN3 */
|
||||
J721S2_WKUP_IOPAD(0x164, PIN_INPUT, 0) /* (N25) MCU_ADC1_AIN4 */
|
||||
J721S2_WKUP_IOPAD(0x168, PIN_INPUT, 0) /* (P26) MCU_ADC1_AIN5 */
|
||||
J721S2_WKUP_IOPAD(0x16c, PIN_INPUT, 0) /* (N26) MCU_ADC1_AIN6 */
|
||||
J721S2_WKUP_IOPAD(0x170, PIN_INPUT, 0) /* (N27) MCU_ADC1_AIN7 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_gpio2 {
|
||||
|
|
@ -309,3 +335,21 @@
|
|||
pinctrl-0 = <&mcu_mcan1_pins_default>;
|
||||
phys = <&transceiver2>;
|
||||
};
|
||||
|
||||
&tscadc0 {
|
||||
pinctrl-0 = <&mcu_adc0_pins_default>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
adc {
|
||||
ti,adc-channels = <0 1 2 3 4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
||||
&tscadc1 {
|
||||
pinctrl-0 = <&mcu_adc1_pins_default>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
adc {
|
||||
ti,adc-channels = <0 1 2 3 4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1014,4 +1014,92 @@
|
|||
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi0: spi@2100000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02100000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 339 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 339 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi1: spi@2110000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02110000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 340 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 340 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi2: spi@2120000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02120000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 341 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 341 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi3: spi@2130000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02130000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 342 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 342 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi4: spi@2140000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02140000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 343 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 343 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi5: spi@2150000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02150000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 344 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 344 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi6: spi@2160000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02160000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 345 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 345 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi7: spi@2170000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02170000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 346 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 346 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -203,6 +203,39 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi0: spi@40300000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040300000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 347 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 347 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi1: spi@40310000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040310000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 849 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 348 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi2: spi@40320000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040320000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 850 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 349 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_navss: bus@28380000{
|
||||
compatible = "simple-mfd";
|
||||
#address-cells = <2>;
|
||||
|
|
@ -306,4 +339,44 @@
|
|||
ti,cpts-periodic-outputs = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
tscadc0: tscadc@40200000 {
|
||||
compatible = "ti,am3359-tscadc";
|
||||
reg = <0x00 0x40200000 0x00 0x1000>;
|
||||
interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 0 0>;
|
||||
assigned-clocks = <&k3_clks 0 2>;
|
||||
assigned-clock-rates = <60000000>;
|
||||
clock-names = "fck";
|
||||
dmas = <&main_udmap 0x7400>,
|
||||
<&main_udmap 0x7401>;
|
||||
dma-names = "fifo0", "fifo1";
|
||||
status = "disabled";
|
||||
|
||||
adc {
|
||||
#io-channel-cells = <1>;
|
||||
compatible = "ti,am3359-adc";
|
||||
};
|
||||
};
|
||||
|
||||
tscadc1: tscadc@40210000 {
|
||||
compatible = "ti,am3359-tscadc";
|
||||
reg = <0x00 0x40210000 0x00 0x1000>;
|
||||
interrupts = <GIC_SPI 861 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 1 0>;
|
||||
assigned-clocks = <&k3_clks 1 2>;
|
||||
assigned-clock-rates = <60000000>;
|
||||
clock-names = "fck";
|
||||
dmas = <&main_udmap 0x7402>,
|
||||
<&main_udmap 0x7403>;
|
||||
dma-names = "fifo0", "fifo1";
|
||||
status = "disabled";
|
||||
|
||||
adc {
|
||||
#io-channel-cells = <1>;
|
||||
compatible = "ti,am3359-adc";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -10,9 +10,10 @@
|
|||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/k3.h>
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
/ {
|
||||
|
||||
model = "Texas Instruments K3 J721S2 SoC";
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
|
||||
aliases {
|
||||
serial2 = &main_uart8;
|
||||
mmc0 = &main_sdhci0;
|
||||
mmc1 = &main_sdhci1;
|
||||
i2c0 = &main_i2c0;
|
||||
};
|
||||
|
|
@ -140,6 +141,32 @@
|
|||
};
|
||||
};
|
||||
|
||||
&wkup_pmx0 {
|
||||
mcu_cpsw_pins_default: mcu-cpsw-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
J784S4_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */
|
||||
J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */
|
||||
J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */
|
||||
J784S4_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */
|
||||
J784S4_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */
|
||||
J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */
|
||||
J784S4_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */
|
||||
J784S4_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */
|
||||
J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */
|
||||
J784S4_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
|
||||
J784S4_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
|
||||
J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
|
||||
>;
|
||||
};
|
||||
|
||||
mcu_mdio_pins_default: mcu-mdio-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
J784S4_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
|
||||
J784S4_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_uart8 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -181,6 +208,14 @@
|
|||
};
|
||||
};
|
||||
|
||||
&main_sdhci0 {
|
||||
/* eMMC */
|
||||
status = "okay";
|
||||
non-removable;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
};
|
||||
|
||||
&main_sdhci1 {
|
||||
/* SD card */
|
||||
status = "okay";
|
||||
|
|
@ -194,3 +229,27 @@
|
|||
&main_gpio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_cpsw {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_cpsw_pins_default>;
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_mdio_pins_default>;
|
||||
|
||||
mcu_phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_cpsw_port1 {
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&mcu_phy0>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -72,6 +72,25 @@
|
|||
pinctrl-single,function-mask = <0xffffffff>;
|
||||
};
|
||||
|
||||
main_crypto: crypto@4e00000 {
|
||||
compatible = "ti,j721e-sa2ul";
|
||||
reg = <0x00 0x4e00000 0x00 0x1200>;
|
||||
power-domains = <&k3_pds 369 TI_SCI_PD_EXCLUSIVE>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x00 0x04e00000 0x00 0x04e00000 0x00 0x30000>;
|
||||
|
||||
dmas = <&main_udmap 0xca40>, <&main_udmap 0x4a40>,
|
||||
<&main_udmap 0x4a41>;
|
||||
dma-names = "tx", "rx1", "rx2";
|
||||
|
||||
rng: rng@4e10000 {
|
||||
compatible = "inside-secure,safexcel-eip76";
|
||||
reg = <0x00 0x4e10000 0x00 0x7d>;
|
||||
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
main_uart0: serial@2800000 {
|
||||
compatible = "ti,j721e-uart", "ti,am654-uart";
|
||||
reg = <0x00 0x02800000 0x00 0x200>;
|
||||
|
|
@ -398,6 +417,7 @@
|
|||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
|
||||
ti,sci-dev-id = <280>;
|
||||
dma-coherent;
|
||||
dma-ranges;
|
||||
|
||||
|
|
@ -1004,4 +1024,92 @@
|
|||
bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi0: spi@2100000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02100000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 376 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 376 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi1: spi@2110000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02110000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 377 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 377 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi2: spi@2120000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02120000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 378 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 378 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi3: spi@2130000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02130000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 379 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 379 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi4: spi@2140000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02140000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 380 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 380 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi5: spi@2150000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02150000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 381 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 381 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi6: spi@2160000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02160000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 382 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 382 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_spi7: spi@2170000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x02170000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 383 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 383 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -204,11 +204,45 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi0: spi@40300000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040300000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 384 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 384 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi1: spi@40310000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040310000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 849 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 385 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 385 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi2: spi@40320000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x040320000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 850 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 386 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 386 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_navss: bus@28380000{
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>;
|
||||
ti,sci-dev-id = <323>;
|
||||
dma-coherent;
|
||||
dma-ranges;
|
||||
|
||||
|
|
|
|||
|
|
@ -10,9 +10,10 @@
|
|||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/k3.h>
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
/ {
|
||||
model = "Texas Instruments K3 J784S4 SoC";
|
||||
compatible = "ti,j784s4";
|
||||
|
|
|
|||
|
|
@ -0,0 +1,53 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* This header provides constants for pinctrl bindings for TI's K3 SoC
|
||||
* family.
|
||||
*
|
||||
* Copyright (C) 2018-2023 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
#ifndef DTS_ARM64_TI_K3_PINCTRL_H
|
||||
#define DTS_ARM64_TI_K3_PINCTRL_H
|
||||
|
||||
#define PULLUDEN_SHIFT (16)
|
||||
#define PULLTYPESEL_SHIFT (17)
|
||||
#define RXACTIVE_SHIFT (18)
|
||||
|
||||
#define PULL_DISABLE (1 << PULLUDEN_SHIFT)
|
||||
#define PULL_ENABLE (0 << PULLUDEN_SHIFT)
|
||||
|
||||
#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE)
|
||||
#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE)
|
||||
|
||||
#define INPUT_EN (1 << RXACTIVE_SHIFT)
|
||||
#define INPUT_DISABLE (0 << RXACTIVE_SHIFT)
|
||||
|
||||
/* Only these macros are expected be used directly in device tree files */
|
||||
#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE)
|
||||
#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP)
|
||||
#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN)
|
||||
#define PIN_INPUT (INPUT_EN | PULL_DISABLE)
|
||||
#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
|
||||
#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN)
|
||||
|
||||
#define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
#define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
|
||||
#define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
#define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
|
||||
#define AM64X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
#define AM64X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
|
||||
#define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
#define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
|
||||
#define J721E_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
#define J721E_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
|
||||
#define J721S2_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
#define J721S2_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
|
||||
#define J784S4_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
#define J784S4_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
|
||||
#endif
|
||||
|
|
@ -8,6 +8,13 @@
|
|||
#ifndef _DT_BINDINGS_PINCTRL_TI_K3_H
|
||||
#define _DT_BINDINGS_PINCTRL_TI_K3_H
|
||||
|
||||
/*
|
||||
* These bindings are deprecated, because they do not match the actual
|
||||
* concept of bindings but rather contain pure register values.
|
||||
* Instead include the header in the DTS source directory.
|
||||
*/
|
||||
#warning "These bindings are deprecated. Instead, use the header in the DTS source directory."
|
||||
|
||||
#define PULLUDEN_SHIFT (16)
|
||||
#define PULLTYPESEL_SHIFT (17)
|
||||
#define RXACTIVE_SHIFT (18)
|
||||
|
|
|
|||
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