rtw89: update scheduler setting
Update IC specific settings accordingly. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220325060055.58482-14-pkshih@realtek.com
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Коммит
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@ -1731,6 +1731,17 @@ static int scheduler_init(struct rtw89_dev *rtwdev, u8 mac_idx)
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if (ret)
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return ret;
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reg = rtw89_mac_reg_by_idx(R_AX_PREBKF_CFG_1, mac_idx);
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rtw89_write32_mask(rtwdev, reg, B_AX_SIFS_MACTXEN_T1_MASK, SIFS_MACTXEN_T1);
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if (rtwdev->chip->chip_id == RTL8852B) {
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reg = rtw89_mac_reg_by_idx(R_AX_SCH_EXT_CTRL, mac_idx);
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rtw89_write32_set(rtwdev, reg, B_AX_PORT_RST_TSF_ADV);
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}
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reg = rtw89_mac_reg_by_idx(R_AX_CCA_CFG_0, mac_idx);
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rtw89_write32_clr(rtwdev, reg, B_AX_BTCCA_EN);
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reg = rtw89_mac_reg_by_idx(R_AX_PREBKF_CFG_0, mac_idx);
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rtw89_write32_mask(rtwdev, reg, B_AX_PREBKF_TIME_MASK, SCH_PREBKF_24US);
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@ -977,6 +977,14 @@
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#define R_AX_PREBKF_CFG_0_C1 0xE338
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#define B_AX_PREBKF_TIME_MASK GENMASK(4, 0)
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#define R_AX_PREBKF_CFG_1 0xC33C
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#define R_AX_PREBKF_CFG_1_C1 0xE33C
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#define B_AX_SIFS_TIMEOUT_TB_AGGR_MASK GENMASK(30, 24)
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#define B_AX_SIFS_PREBKF_MASK GENMASK(23, 16)
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#define B_AX_SIFS_TIMEOUT_T2_MASK GENMASK(14, 8)
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#define B_AX_SIFS_MACTXEN_T1_MASK GENMASK(6, 0)
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#define SIFS_MACTXEN_T1 0x47
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#define R_AX_CCA_CFG_0 0xC340
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#define R_AX_CCA_CFG_0_C1 0xE340
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#define B_AX_BTCCA_BRK_TXOP_EN BIT(9)
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@ -1076,6 +1084,10 @@
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#define R_AX_SCH_DBG_C1 0xE3F8
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#define B_AX_SCHEDULER_DBG_MASK GENMASK(31, 0)
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#define R_AX_SCH_EXT_CTRL 0xC3FC
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#define R_AX_SCH_EXT_CTRL_C1 0xE3FC
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#define B_AX_PORT_RST_TSF_ADV BIT(1)
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#define R_AX_PORT_CFG_P0 0xC400
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#define R_AX_PORT_CFG_P1 0xC440
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#define R_AX_PORT_CFG_P2 0xC480
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