ARM: sa1100: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
This commit is contained in:
Lennert Buytenhek
Родитель
9a364da73d
Коммит
c4e8964e4e
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@ -37,14 +37,14 @@ static int GPIO_IRQ_mask = (1 << 11) - 1;
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#define GPIO_11_27_IRQ(i) ((i) - 21)
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#define GPIO11_27_MASK(irq) (1 << GPIO_11_27_IRQ(irq))
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static int sa1100_gpio_type(unsigned int irq, unsigned int type)
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static int sa1100_gpio_type(struct irq_data *d, unsigned int type)
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{
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unsigned int mask;
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if (irq <= 10)
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mask = 1 << irq;
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if (d->irq <= 10)
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mask = 1 << d->irq;
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else
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mask = GPIO11_27_MASK(irq);
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mask = GPIO11_27_MASK(d->irq);
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if (type == IRQ_TYPE_PROBE) {
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if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
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@ -70,37 +70,37 @@ static int sa1100_gpio_type(unsigned int irq, unsigned int type)
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/*
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* GPIO IRQs must be acknowledged. This is for IRQs from 0 to 10.
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*/
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static void sa1100_low_gpio_ack(unsigned int irq)
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static void sa1100_low_gpio_ack(struct irq_data *d)
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{
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GEDR = (1 << irq);
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GEDR = (1 << d->irq);
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}
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static void sa1100_low_gpio_mask(unsigned int irq)
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static void sa1100_low_gpio_mask(struct irq_data *d)
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{
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ICMR &= ~(1 << irq);
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ICMR &= ~(1 << d->irq);
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}
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static void sa1100_low_gpio_unmask(unsigned int irq)
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static void sa1100_low_gpio_unmask(struct irq_data *d)
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{
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ICMR |= 1 << irq;
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ICMR |= 1 << d->irq;
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}
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static int sa1100_low_gpio_wake(unsigned int irq, unsigned int on)
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static int sa1100_low_gpio_wake(struct irq_data *d, unsigned int on)
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{
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if (on)
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PWER |= 1 << irq;
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PWER |= 1 << d->irq;
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else
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PWER &= ~(1 << irq);
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PWER &= ~(1 << d->irq);
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return 0;
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}
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static struct irq_chip sa1100_low_gpio_chip = {
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.name = "GPIO-l",
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.ack = sa1100_low_gpio_ack,
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.mask = sa1100_low_gpio_mask,
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.unmask = sa1100_low_gpio_unmask,
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.set_type = sa1100_gpio_type,
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.set_wake = sa1100_low_gpio_wake,
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.irq_ack = sa1100_low_gpio_ack,
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.irq_mask = sa1100_low_gpio_mask,
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.irq_unmask = sa1100_low_gpio_unmask,
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.irq_set_type = sa1100_gpio_type,
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.irq_set_wake = sa1100_low_gpio_wake,
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};
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/*
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@ -139,16 +139,16 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc)
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* In addition, the IRQs are all collected up into one bit in the
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* interrupt controller registers.
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*/
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static void sa1100_high_gpio_ack(unsigned int irq)
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static void sa1100_high_gpio_ack(struct irq_data *d)
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{
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unsigned int mask = GPIO11_27_MASK(irq);
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unsigned int mask = GPIO11_27_MASK(d->irq);
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GEDR = mask;
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}
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static void sa1100_high_gpio_mask(unsigned int irq)
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static void sa1100_high_gpio_mask(struct irq_data *d)
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{
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unsigned int mask = GPIO11_27_MASK(irq);
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unsigned int mask = GPIO11_27_MASK(d->irq);
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GPIO_IRQ_mask &= ~mask;
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@ -156,9 +156,9 @@ static void sa1100_high_gpio_mask(unsigned int irq)
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GFER &= ~mask;
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}
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static void sa1100_high_gpio_unmask(unsigned int irq)
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static void sa1100_high_gpio_unmask(struct irq_data *d)
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{
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unsigned int mask = GPIO11_27_MASK(irq);
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unsigned int mask = GPIO11_27_MASK(d->irq);
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GPIO_IRQ_mask |= mask;
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@ -166,44 +166,44 @@ static void sa1100_high_gpio_unmask(unsigned int irq)
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GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
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}
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static int sa1100_high_gpio_wake(unsigned int irq, unsigned int on)
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static int sa1100_high_gpio_wake(struct irq_data *d, unsigned int on)
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{
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if (on)
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PWER |= GPIO11_27_MASK(irq);
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PWER |= GPIO11_27_MASK(d->irq);
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else
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PWER &= ~GPIO11_27_MASK(irq);
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PWER &= ~GPIO11_27_MASK(d->irq);
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return 0;
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}
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static struct irq_chip sa1100_high_gpio_chip = {
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.name = "GPIO-h",
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.ack = sa1100_high_gpio_ack,
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.mask = sa1100_high_gpio_mask,
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.unmask = sa1100_high_gpio_unmask,
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.set_type = sa1100_gpio_type,
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.set_wake = sa1100_high_gpio_wake,
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.irq_ack = sa1100_high_gpio_ack,
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.irq_mask = sa1100_high_gpio_mask,
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.irq_unmask = sa1100_high_gpio_unmask,
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.irq_set_type = sa1100_gpio_type,
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.irq_set_wake = sa1100_high_gpio_wake,
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};
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/*
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* We don't need to ACK IRQs on the SA1100 unless they're GPIOs
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* this is for internal IRQs i.e. from 11 to 31.
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*/
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static void sa1100_mask_irq(unsigned int irq)
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static void sa1100_mask_irq(struct irq_data *d)
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{
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ICMR &= ~(1 << irq);
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ICMR &= ~(1 << d->irq);
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}
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static void sa1100_unmask_irq(unsigned int irq)
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static void sa1100_unmask_irq(struct irq_data *d)
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{
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ICMR |= (1 << irq);
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ICMR |= (1 << d->irq);
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}
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/*
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* Apart form GPIOs, only the RTC alarm can be a wakeup event.
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*/
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static int sa1100_set_wake(unsigned int irq, unsigned int on)
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static int sa1100_set_wake(struct irq_data *d, unsigned int on)
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{
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if (irq == IRQ_RTCAlrm) {
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if (d->irq == IRQ_RTCAlrm) {
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if (on)
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PWER |= PWER_RTC;
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else
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@ -215,10 +215,10 @@ static int sa1100_set_wake(unsigned int irq, unsigned int on)
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static struct irq_chip sa1100_normal_chip = {
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.name = "SC",
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.ack = sa1100_mask_irq,
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.mask = sa1100_mask_irq,
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.unmask = sa1100_unmask_irq,
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.set_wake = sa1100_set_wake,
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.irq_ack = sa1100_mask_irq,
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.irq_mask = sa1100_mask_irq,
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.irq_unmask = sa1100_unmask_irq,
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.irq_set_wake = sa1100_set_wake,
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};
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static struct resource irq_resource = {
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@ -35,7 +35,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
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/*
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* Acknowledge the parent IRQ.
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*/
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desc->chip->ack(irq);
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desc->irq_data.chip->irq_ack(&desc->irq_data);
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/*
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* Read the interrupt reason register. Let's have all
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@ -53,7 +53,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
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* recheck the register for any pending IRQs.
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*/
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if (irr & (IRR_ETHERNET | IRR_USAR)) {
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desc->chip->mask(irq);
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desc->irq_data.chip->irq_mask(&desc->irq_data);
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/*
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* Ack the interrupt now to prevent re-entering
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@ -61,7 +61,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
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* since we'll check the IRR register prior to
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* leaving.
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*/
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desc->chip->ack(irq);
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desc->irq_data.chip->irq_ack(&desc->irq_data);
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if (irr & IRR_ETHERNET) {
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generic_handle_irq(IRQ_NEPONSET_SMC9196);
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@ -71,7 +71,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
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generic_handle_irq(IRQ_NEPONSET_USAR);
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}
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desc->chip->unmask(irq);
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desc->irq_data.chip->irq_unmask(&desc->irq_data);
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}
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if (irr & IRR_SA1111) {
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