ACPICA: Save current masks of enabled GPEs after enable register writes
There is a race condition between acpi_hw_disable_all_gpes() or acpi_enable_all_wakeup_gpes() and acpi_ev_asynch_enable_gpe() such that if the latter wins the race, it may mistakenly enable a GPE disabled by the former. This may lead to premature system wakeups during system suspend and potentially to more serious consequences. The source of the problem is how acpi_hw_low_set_gpe() works when passed ACPI_GPE_CONDITIONAL_ENABLE as the second argument. In that case, the GPE will be enabled if the corresponding bit is set in the enable_for_run mask of the GPE enable register containing that bit. However, acpi_hw_disable_all_gpes() and acpi_enable_all_wakeup_gpes() don't modify the enable_for_run masks of GPE registers when writing to them. In consequence, if acpi_ev_asynch_enable_gpe(), which eventually calls acpi_hw_low_set_gpe() with the second argument equal to ACPI_GPE_CONDITIONAL_ENABLE, is executed in parallel with one of these functions, it may reverse changes made by them. To fix the problem, introduce a new enable_mask field in struct acpi_gpe_register_info in which to store the current mask of enabled GPEs and modify acpi_hw_low_set_gpe() to take this mask into account instead of enable_for_run when its second argument is equal to ACPI_GPE_CONDITIONAL_ENABLE. Also modify the low-level routines called by acpi_hw_disable_all_gpes(), acpi_enable_all_wakeup_gpes() and acpi_enable_all_runtime_gpes() to update the enable_mask masks of GPE registers after all (successful) writes to those registers. Acked-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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c50f13c672
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@ -454,6 +454,7 @@ struct acpi_gpe_register_info {
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u16 base_gpe_number; /* Base GPE number for this register */
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u16 base_gpe_number; /* Base GPE number for this register */
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u8 enable_for_wake; /* GPEs to keep enabled when sleeping */
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u8 enable_for_wake; /* GPEs to keep enabled when sleeping */
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u8 enable_for_run; /* GPEs to keep enabled when running */
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u8 enable_for_run; /* GPEs to keep enabled when running */
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u8 enable_mask; /* Current mask of enabled GPEs */
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};
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};
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/*
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/*
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@ -134,7 +134,7 @@ acpi_status acpi_ev_enable_gpe(struct acpi_gpe_event_info *gpe_event_info)
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/* Enable the requested GPE */
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/* Enable the requested GPE */
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status = acpi_hw_low_set_gpe(gpe_event_info, ACPI_GPE_ENABLE);
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status = acpi_hw_low_set_gpe(gpe_event_info, ACPI_GPE_ENABLE_SAVE);
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return_ACPI_STATUS(status);
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return_ACPI_STATUS(status);
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}
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}
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@ -213,7 +213,7 @@ acpi_ev_remove_gpe_reference(struct acpi_gpe_event_info *gpe_event_info)
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if (ACPI_SUCCESS(status)) {
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if (ACPI_SUCCESS(status)) {
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status =
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status =
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acpi_hw_low_set_gpe(gpe_event_info,
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acpi_hw_low_set_gpe(gpe_event_info,
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ACPI_GPE_DISABLE);
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ACPI_GPE_DISABLE_SAVE);
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}
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}
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if (ACPI_FAILURE(status)) {
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if (ACPI_FAILURE(status)) {
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@ -655,7 +655,7 @@ acpi_status acpi_ev_finish_gpe(struct acpi_gpe_event_info * gpe_event_info)
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/*
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/*
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* Enable this GPE, conditionally. This means that the GPE will
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* Enable this GPE, conditionally. This means that the GPE will
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* only be physically enabled if the enable_for_run bit is set
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* only be physically enabled if the enable_mask bit is set
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* in the event_info.
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* in the event_info.
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*/
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*/
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(void)acpi_hw_low_set_gpe(gpe_event_info, ACPI_GPE_CONDITIONAL_ENABLE);
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(void)acpi_hw_low_set_gpe(gpe_event_info, ACPI_GPE_CONDITIONAL_ENABLE);
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@ -115,12 +115,12 @@ acpi_hw_low_set_gpe(struct acpi_gpe_event_info *gpe_event_info, u32 action)
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/* Set or clear just the bit that corresponds to this GPE */
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/* Set or clear just the bit that corresponds to this GPE */
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register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info);
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register_bit = acpi_hw_get_gpe_register_bit(gpe_event_info);
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switch (action) {
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switch (action & ~ACPI_GPE_SAVE_MASK) {
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case ACPI_GPE_CONDITIONAL_ENABLE:
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case ACPI_GPE_CONDITIONAL_ENABLE:
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/* Only enable if the enable_for_run bit is set */
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/* Only enable if the corresponding enable_mask bit is set */
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if (!(register_bit & gpe_register_info->enable_for_run)) {
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if (!(register_bit & gpe_register_info->enable_mask)) {
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return (AE_BAD_PARAMETER);
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return (AE_BAD_PARAMETER);
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}
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}
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@ -145,6 +145,9 @@ acpi_hw_low_set_gpe(struct acpi_gpe_event_info *gpe_event_info, u32 action)
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/* Write the updated enable mask */
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/* Write the updated enable mask */
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status = acpi_hw_write(enable_mask, &gpe_register_info->enable_address);
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status = acpi_hw_write(enable_mask, &gpe_register_info->enable_address);
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if (ACPI_SUCCESS(status) && (action & ACPI_GPE_SAVE_MASK)) {
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gpe_register_info->enable_mask = enable_mask;
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}
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return (status);
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return (status);
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}
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}
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@ -260,6 +263,32 @@ acpi_hw_get_gpe_status(struct acpi_gpe_event_info * gpe_event_info,
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return (AE_OK);
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return (AE_OK);
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}
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}
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/******************************************************************************
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*
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* FUNCTION: acpi_hw_gpe_enable_write
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*
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* PARAMETERS: enable_mask - Bit mask to write to the GPE register
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* gpe_register_info - Gpe Register info
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*
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* RETURN: Status
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*
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* DESCRIPTION: Write the enable mask byte to the given GPE register.
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*
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******************************************************************************/
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static acpi_status
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acpi_hw_gpe_enable_write(u8 enable_mask,
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struct acpi_gpe_register_info *gpe_register_info)
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{
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acpi_status status;
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status = acpi_hw_write(enable_mask, &gpe_register_info->enable_address);
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if (ACPI_SUCCESS(status)) {
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gpe_register_info->enable_mask = enable_mask;
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}
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return (status);
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}
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/******************************************************************************
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/******************************************************************************
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*
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*
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* FUNCTION: acpi_hw_disable_gpe_block
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* FUNCTION: acpi_hw_disable_gpe_block
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@ -287,8 +316,8 @@ acpi_hw_disable_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
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/* Disable all GPEs in this register */
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/* Disable all GPEs in this register */
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status =
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status =
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acpi_hw_write(0x00,
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acpi_hw_gpe_enable_write(0x00,
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&gpe_block->register_info[i].enable_address);
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&gpe_block->register_info[i]);
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if (ACPI_FAILURE(status)) {
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if (ACPI_FAILURE(status)) {
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return (status);
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return (status);
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}
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}
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@ -355,21 +384,23 @@ acpi_hw_enable_runtime_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
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{
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{
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u32 i;
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u32 i;
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acpi_status status;
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acpi_status status;
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struct acpi_gpe_register_info *gpe_register_info;
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/* NOTE: assumes that all GPEs are currently disabled */
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/* NOTE: assumes that all GPEs are currently disabled */
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/* Examine each GPE Register within the block */
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/* Examine each GPE Register within the block */
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for (i = 0; i < gpe_block->register_count; i++) {
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for (i = 0; i < gpe_block->register_count; i++) {
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if (!gpe_block->register_info[i].enable_for_run) {
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gpe_register_info = &gpe_block->register_info[i];
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if (!gpe_register_info->enable_for_run) {
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continue;
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continue;
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}
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}
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/* Enable all "runtime" GPEs in this register */
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/* Enable all "runtime" GPEs in this register */
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status =
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status =
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acpi_hw_write(gpe_block->register_info[i].enable_for_run,
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acpi_hw_gpe_enable_write(gpe_register_info->enable_for_run,
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&gpe_block->register_info[i].enable_address);
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gpe_register_info);
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if (ACPI_FAILURE(status)) {
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if (ACPI_FAILURE(status)) {
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return (status);
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return (status);
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}
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}
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@ -399,10 +430,12 @@ acpi_hw_enable_wakeup_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
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{
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{
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u32 i;
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u32 i;
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acpi_status status;
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acpi_status status;
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struct acpi_gpe_register_info *gpe_register_info;
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/* Examine each GPE Register within the block */
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/* Examine each GPE Register within the block */
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for (i = 0; i < gpe_block->register_count; i++) {
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for (i = 0; i < gpe_block->register_count; i++) {
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gpe_register_info = &gpe_block->register_info[i];
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/*
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/*
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* Enable all "wake" GPEs in this register and disable the
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* Enable all "wake" GPEs in this register and disable the
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@ -410,8 +443,8 @@ acpi_hw_enable_wakeup_gpe_block(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
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*/
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*/
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status =
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status =
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acpi_hw_write(gpe_block->register_info[i].enable_for_wake,
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acpi_hw_gpe_enable_write(gpe_register_info->enable_for_wake,
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&gpe_block->register_info[i].enable_address);
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gpe_register_info);
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if (ACPI_FAILURE(status)) {
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if (ACPI_FAILURE(status)) {
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return (status);
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return (status);
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}
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}
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@ -736,6 +736,10 @@ typedef u32 acpi_event_status;
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#define ACPI_GPE_ENABLE 0
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#define ACPI_GPE_ENABLE 0
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#define ACPI_GPE_DISABLE 1
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#define ACPI_GPE_DISABLE 1
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#define ACPI_GPE_CONDITIONAL_ENABLE 2
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#define ACPI_GPE_CONDITIONAL_ENABLE 2
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#define ACPI_GPE_SAVE_MASK 4
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#define ACPI_GPE_ENABLE_SAVE (ACPI_GPE_ENABLE | ACPI_GPE_SAVE_MASK)
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#define ACPI_GPE_DISABLE_SAVE (ACPI_GPE_DISABLE | ACPI_GPE_SAVE_MASK)
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/*
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/*
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* GPE info flags - Per GPE
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* GPE info flags - Per GPE
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